Commit | Line | Data |
---|---|---|
d3561b7f RR |
1 | #ifndef __ASM_PARAVIRT_H |
2 | #define __ASM_PARAVIRT_H | |
3 | /* Various instructions on x86 need to be replaced for | |
4 | * para-virtualization: those hooks are defined here. */ | |
5 | #include <linux/linkage.h> | |
139ec7c4 | 6 | #include <linux/stringify.h> |
da181a8b | 7 | #include <asm/page.h> |
d3561b7f RR |
8 | |
9 | #ifdef CONFIG_PARAVIRT | |
139ec7c4 RR |
10 | /* These are the most performance critical ops, so we want to be able to patch |
11 | * callers */ | |
12 | #define PARAVIRT_IRQ_DISABLE 0 | |
13 | #define PARAVIRT_IRQ_ENABLE 1 | |
14 | #define PARAVIRT_RESTORE_FLAGS 2 | |
15 | #define PARAVIRT_SAVE_FLAGS 3 | |
16 | #define PARAVIRT_SAVE_FLAGS_IRQ_DISABLE 4 | |
17 | #define PARAVIRT_INTERRUPT_RETURN 5 | |
18 | #define PARAVIRT_STI_SYSEXIT 6 | |
19 | ||
20 | /* Bitmask of what can be clobbered: usually at least eax. */ | |
21 | #define CLBR_NONE 0x0 | |
22 | #define CLBR_EAX 0x1 | |
23 | #define CLBR_ECX 0x2 | |
24 | #define CLBR_EDX 0x4 | |
25 | #define CLBR_ANY 0x7 | |
26 | ||
d3561b7f RR |
27 | #ifndef __ASSEMBLY__ |
28 | struct thread_struct; | |
29 | struct Xgt_desc_struct; | |
30 | struct tss_struct; | |
da181a8b | 31 | struct mm_struct; |
d3561b7f RR |
32 | struct paravirt_ops |
33 | { | |
34 | unsigned int kernel_rpl; | |
35 | int paravirt_enabled; | |
36 | const char *name; | |
37 | ||
139ec7c4 RR |
38 | /* |
39 | * Patch may replace one of the defined code sequences with arbitrary | |
40 | * code, subject to the same register constraints. This generally | |
41 | * means the code is not free to clobber any registers other than EAX. | |
42 | * The patch function should return the number of bytes of code | |
43 | * generated, as we nop pad the rest in generic code. | |
44 | */ | |
45 | unsigned (*patch)(u8 type, u16 clobber, void *firstinsn, unsigned len); | |
46 | ||
d3561b7f RR |
47 | void (*arch_setup)(void); |
48 | char *(*memory_setup)(void); | |
49 | void (*init_IRQ)(void); | |
50 | ||
51 | void (*banner)(void); | |
52 | ||
53 | unsigned long (*get_wallclock)(void); | |
54 | int (*set_wallclock)(unsigned long); | |
55 | void (*time_init)(void); | |
56 | ||
57 | /* All the function pointers here are declared as "fastcall" | |
58 | so that we get a specific register-based calling | |
59 | convention. This makes it easier to implement inline | |
60 | assembler replacements. */ | |
61 | ||
1a1eecd1 | 62 | void (*cpuid)(unsigned int *eax, unsigned int *ebx, |
d3561b7f RR |
63 | unsigned int *ecx, unsigned int *edx); |
64 | ||
1a1eecd1 AK |
65 | unsigned long (*get_debugreg)(int regno); |
66 | void (*set_debugreg)(int regno, unsigned long value); | |
d3561b7f | 67 | |
1a1eecd1 | 68 | void (*clts)(void); |
d3561b7f | 69 | |
1a1eecd1 AK |
70 | unsigned long (*read_cr0)(void); |
71 | void (*write_cr0)(unsigned long); | |
d3561b7f | 72 | |
1a1eecd1 AK |
73 | unsigned long (*read_cr2)(void); |
74 | void (*write_cr2)(unsigned long); | |
d3561b7f | 75 | |
1a1eecd1 AK |
76 | unsigned long (*read_cr3)(void); |
77 | void (*write_cr3)(unsigned long); | |
d3561b7f | 78 | |
1a1eecd1 AK |
79 | unsigned long (*read_cr4_safe)(void); |
80 | unsigned long (*read_cr4)(void); | |
81 | void (*write_cr4)(unsigned long); | |
d3561b7f | 82 | |
1a1eecd1 AK |
83 | unsigned long (*save_fl)(void); |
84 | void (*restore_fl)(unsigned long); | |
85 | void (*irq_disable)(void); | |
86 | void (*irq_enable)(void); | |
87 | void (*safe_halt)(void); | |
88 | void (*halt)(void); | |
89 | void (*wbinvd)(void); | |
d3561b7f RR |
90 | |
91 | /* err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */ | |
1a1eecd1 AK |
92 | u64 (*read_msr)(unsigned int msr, int *err); |
93 | int (*write_msr)(unsigned int msr, u64 val); | |
94 | ||
95 | u64 (*read_tsc)(void); | |
96 | u64 (*read_pmc)(void); | |
6cb9a835 | 97 | u64 (*get_scheduled_cycles)(void); |
1182d852 | 98 | unsigned long (*get_cpu_khz)(void); |
1a1eecd1 AK |
99 | |
100 | void (*load_tr_desc)(void); | |
101 | void (*load_gdt)(const struct Xgt_desc_struct *); | |
102 | void (*load_idt)(const struct Xgt_desc_struct *); | |
103 | void (*store_gdt)(struct Xgt_desc_struct *); | |
104 | void (*store_idt)(struct Xgt_desc_struct *); | |
105 | void (*set_ldt)(const void *desc, unsigned entries); | |
106 | unsigned long (*store_tr)(void); | |
107 | void (*load_tls)(struct thread_struct *t, unsigned int cpu); | |
108 | void (*write_ldt_entry)(void *dt, int entrynum, | |
d3561b7f | 109 | u32 low, u32 high); |
1a1eecd1 | 110 | void (*write_gdt_entry)(void *dt, int entrynum, |
d3561b7f | 111 | u32 low, u32 high); |
1a1eecd1 | 112 | void (*write_idt_entry)(void *dt, int entrynum, |
d3561b7f | 113 | u32 low, u32 high); |
1a1eecd1 | 114 | void (*load_esp0)(struct tss_struct *tss, |
d3561b7f RR |
115 | struct thread_struct *thread); |
116 | ||
1a1eecd1 | 117 | void (*set_iopl_mask)(unsigned mask); |
d3561b7f | 118 | |
1a1eecd1 | 119 | void (*io_delay)(void); |
d3561b7f | 120 | |
13623d79 | 121 | #ifdef CONFIG_X86_LOCAL_APIC |
1a1eecd1 AK |
122 | void (*apic_write)(unsigned long reg, unsigned long v); |
123 | void (*apic_write_atomic)(unsigned long reg, unsigned long v); | |
124 | unsigned long (*apic_read)(unsigned long reg); | |
bbab4f3b ZA |
125 | void (*setup_boot_clock)(void); |
126 | void (*setup_secondary_clock)(void); | |
13623d79 RR |
127 | #endif |
128 | ||
1a1eecd1 AK |
129 | void (*flush_tlb_user)(void); |
130 | void (*flush_tlb_kernel)(void); | |
131 | void (*flush_tlb_single)(u32 addr); | |
132 | ||
9a1c13e9 ZA |
133 | void (fastcall *map_pt_hook)(int type, pte_t *va, u32 pfn); |
134 | ||
1a1eecd1 AK |
135 | void (*alloc_pt)(u32 pfn); |
136 | void (*alloc_pd)(u32 pfn); | |
137 | void (*alloc_pd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count); | |
138 | void (*release_pt)(u32 pfn); | |
139 | void (*release_pd)(u32 pfn); | |
140 | ||
141 | void (*set_pte)(pte_t *ptep, pte_t pteval); | |
142 | void (*set_pte_at)(struct mm_struct *mm, u32 addr, pte_t *ptep, pte_t pteval); | |
143 | void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval); | |
144 | void (*pte_update)(struct mm_struct *mm, u32 addr, pte_t *ptep); | |
145 | void (*pte_update_defer)(struct mm_struct *mm, u32 addr, pte_t *ptep); | |
da181a8b | 146 | #ifdef CONFIG_X86_PAE |
1a1eecd1 AK |
147 | void (*set_pte_atomic)(pte_t *ptep, pte_t pteval); |
148 | void (*set_pte_present)(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte); | |
149 | void (*set_pud)(pud_t *pudp, pud_t pudval); | |
150 | void (*pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep); | |
151 | void (*pmd_clear)(pmd_t *pmdp); | |
da181a8b RR |
152 | #endif |
153 | ||
1a1eecd1 | 154 | void (*set_lazy_mode)(int mode); |
9226d125 | 155 | |
d3561b7f | 156 | /* These two are jmp to, not actually called. */ |
1a1eecd1 AK |
157 | void (*irq_enable_sysexit)(void); |
158 | void (*iret)(void); | |
ae5da273 | 159 | |
1a1eecd1 | 160 | void (*startup_ipi_hook)(int phys_apicid, unsigned long start_eip, unsigned long start_esp); |
d3561b7f RR |
161 | }; |
162 | ||
c9ccf30d RR |
163 | /* Mark a paravirt probe function. */ |
164 | #define paravirt_probe(fn) \ | |
165 | static asmlinkage void (*__paravirtprobe_##fn)(void) __attribute_used__ \ | |
166 | __attribute__((__section__(".paravirtprobe"))) = fn | |
167 | ||
d3561b7f RR |
168 | extern struct paravirt_ops paravirt_ops; |
169 | ||
170 | #define paravirt_enabled() (paravirt_ops.paravirt_enabled) | |
171 | ||
172 | static inline void load_esp0(struct tss_struct *tss, | |
173 | struct thread_struct *thread) | |
174 | { | |
175 | paravirt_ops.load_esp0(tss, thread); | |
176 | } | |
177 | ||
178 | #define ARCH_SETUP paravirt_ops.arch_setup(); | |
179 | static inline unsigned long get_wallclock(void) | |
180 | { | |
181 | return paravirt_ops.get_wallclock(); | |
182 | } | |
183 | ||
184 | static inline int set_wallclock(unsigned long nowtime) | |
185 | { | |
186 | return paravirt_ops.set_wallclock(nowtime); | |
187 | } | |
188 | ||
189 | static inline void do_time_init(void) | |
190 | { | |
191 | return paravirt_ops.time_init(); | |
192 | } | |
193 | ||
194 | /* The paravirtualized CPUID instruction. */ | |
195 | static inline void __cpuid(unsigned int *eax, unsigned int *ebx, | |
196 | unsigned int *ecx, unsigned int *edx) | |
197 | { | |
198 | paravirt_ops.cpuid(eax, ebx, ecx, edx); | |
199 | } | |
200 | ||
201 | /* | |
202 | * These special macros can be used to get or set a debugging register | |
203 | */ | |
204 | #define get_debugreg(var, reg) var = paravirt_ops.get_debugreg(reg) | |
205 | #define set_debugreg(val, reg) paravirt_ops.set_debugreg(reg, val) | |
206 | ||
207 | #define clts() paravirt_ops.clts() | |
208 | ||
209 | #define read_cr0() paravirt_ops.read_cr0() | |
210 | #define write_cr0(x) paravirt_ops.write_cr0(x) | |
211 | ||
212 | #define read_cr2() paravirt_ops.read_cr2() | |
213 | #define write_cr2(x) paravirt_ops.write_cr2(x) | |
214 | ||
215 | #define read_cr3() paravirt_ops.read_cr3() | |
216 | #define write_cr3(x) paravirt_ops.write_cr3(x) | |
217 | ||
218 | #define read_cr4() paravirt_ops.read_cr4() | |
219 | #define read_cr4_safe(x) paravirt_ops.read_cr4_safe() | |
220 | #define write_cr4(x) paravirt_ops.write_cr4(x) | |
221 | ||
d3561b7f RR |
222 | static inline void raw_safe_halt(void) |
223 | { | |
224 | paravirt_ops.safe_halt(); | |
225 | } | |
226 | ||
227 | static inline void halt(void) | |
228 | { | |
229 | paravirt_ops.safe_halt(); | |
230 | } | |
231 | #define wbinvd() paravirt_ops.wbinvd() | |
232 | ||
233 | #define get_kernel_rpl() (paravirt_ops.kernel_rpl) | |
234 | ||
235 | #define rdmsr(msr,val1,val2) do { \ | |
236 | int _err; \ | |
237 | u64 _l = paravirt_ops.read_msr(msr,&_err); \ | |
238 | val1 = (u32)_l; \ | |
239 | val2 = _l >> 32; \ | |
240 | } while(0) | |
241 | ||
242 | #define wrmsr(msr,val1,val2) do { \ | |
243 | u64 _l = ((u64)(val2) << 32) | (val1); \ | |
244 | paravirt_ops.write_msr((msr), _l); \ | |
245 | } while(0) | |
246 | ||
247 | #define rdmsrl(msr,val) do { \ | |
248 | int _err; \ | |
249 | val = paravirt_ops.read_msr((msr),&_err); \ | |
250 | } while(0) | |
251 | ||
252 | #define wrmsrl(msr,val) (paravirt_ops.write_msr((msr),(val))) | |
253 | #define wrmsr_safe(msr,a,b) ({ \ | |
254 | u64 _l = ((u64)(b) << 32) | (a); \ | |
255 | paravirt_ops.write_msr((msr),_l); \ | |
256 | }) | |
257 | ||
258 | /* rdmsr with exception handling */ | |
259 | #define rdmsr_safe(msr,a,b) ({ \ | |
260 | int _err; \ | |
261 | u64 _l = paravirt_ops.read_msr(msr,&_err); \ | |
262 | (*a) = (u32)_l; \ | |
263 | (*b) = _l >> 32; \ | |
264 | _err; }) | |
265 | ||
266 | #define rdtsc(low,high) do { \ | |
267 | u64 _l = paravirt_ops.read_tsc(); \ | |
268 | low = (u32)_l; \ | |
269 | high = _l >> 32; \ | |
270 | } while(0) | |
271 | ||
272 | #define rdtscl(low) do { \ | |
273 | u64 _l = paravirt_ops.read_tsc(); \ | |
274 | low = (int)_l; \ | |
275 | } while(0) | |
276 | ||
277 | #define rdtscll(val) (val = paravirt_ops.read_tsc()) | |
278 | ||
6cb9a835 | 279 | #define get_scheduled_cycles(val) (val = paravirt_ops.get_scheduled_cycles()) |
1182d852 | 280 | #define calculate_cpu_khz() (paravirt_ops.get_cpu_khz()) |
6cb9a835 | 281 | |
d3561b7f RR |
282 | #define write_tsc(val1,val2) wrmsr(0x10, val1, val2) |
283 | ||
284 | #define rdpmc(counter,low,high) do { \ | |
285 | u64 _l = paravirt_ops.read_pmc(); \ | |
286 | low = (u32)_l; \ | |
287 | high = _l >> 32; \ | |
288 | } while(0) | |
289 | ||
290 | #define load_TR_desc() (paravirt_ops.load_tr_desc()) | |
291 | #define load_gdt(dtr) (paravirt_ops.load_gdt(dtr)) | |
292 | #define load_idt(dtr) (paravirt_ops.load_idt(dtr)) | |
293 | #define set_ldt(addr, entries) (paravirt_ops.set_ldt((addr), (entries))) | |
294 | #define store_gdt(dtr) (paravirt_ops.store_gdt(dtr)) | |
295 | #define store_idt(dtr) (paravirt_ops.store_idt(dtr)) | |
296 | #define store_tr(tr) ((tr) = paravirt_ops.store_tr()) | |
297 | #define load_TLS(t,cpu) (paravirt_ops.load_tls((t),(cpu))) | |
298 | #define write_ldt_entry(dt, entry, low, high) \ | |
299 | (paravirt_ops.write_ldt_entry((dt), (entry), (low), (high))) | |
300 | #define write_gdt_entry(dt, entry, low, high) \ | |
301 | (paravirt_ops.write_gdt_entry((dt), (entry), (low), (high))) | |
302 | #define write_idt_entry(dt, entry, low, high) \ | |
303 | (paravirt_ops.write_idt_entry((dt), (entry), (low), (high))) | |
304 | #define set_iopl_mask(mask) (paravirt_ops.set_iopl_mask(mask)) | |
305 | ||
306 | /* The paravirtualized I/O functions */ | |
307 | static inline void slow_down_io(void) { | |
308 | paravirt_ops.io_delay(); | |
309 | #ifdef REALLY_SLOW_IO | |
310 | paravirt_ops.io_delay(); | |
311 | paravirt_ops.io_delay(); | |
312 | paravirt_ops.io_delay(); | |
313 | #endif | |
314 | } | |
315 | ||
13623d79 RR |
316 | #ifdef CONFIG_X86_LOCAL_APIC |
317 | /* | |
318 | * Basic functions accessing APICs. | |
319 | */ | |
320 | static inline void apic_write(unsigned long reg, unsigned long v) | |
321 | { | |
322 | paravirt_ops.apic_write(reg,v); | |
323 | } | |
324 | ||
325 | static inline void apic_write_atomic(unsigned long reg, unsigned long v) | |
326 | { | |
327 | paravirt_ops.apic_write_atomic(reg,v); | |
328 | } | |
329 | ||
330 | static inline unsigned long apic_read(unsigned long reg) | |
331 | { | |
332 | return paravirt_ops.apic_read(reg); | |
333 | } | |
bbab4f3b ZA |
334 | |
335 | static inline void setup_boot_clock(void) | |
336 | { | |
337 | paravirt_ops.setup_boot_clock(); | |
338 | } | |
339 | ||
340 | static inline void setup_secondary_clock(void) | |
341 | { | |
342 | paravirt_ops.setup_secondary_clock(); | |
343 | } | |
13623d79 RR |
344 | #endif |
345 | ||
ae5da273 ZA |
346 | #ifdef CONFIG_SMP |
347 | static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip, | |
348 | unsigned long start_esp) | |
349 | { | |
350 | return paravirt_ops.startup_ipi_hook(phys_apicid, start_eip, start_esp); | |
351 | } | |
352 | #endif | |
13623d79 | 353 | |
da181a8b RR |
354 | #define __flush_tlb() paravirt_ops.flush_tlb_user() |
355 | #define __flush_tlb_global() paravirt_ops.flush_tlb_kernel() | |
356 | #define __flush_tlb_single(addr) paravirt_ops.flush_tlb_single(addr) | |
357 | ||
9a1c13e9 ZA |
358 | #define paravirt_map_pt_hook(type, va, pfn) paravirt_ops.map_pt_hook(type, va, pfn) |
359 | ||
c119ecce ZA |
360 | #define paravirt_alloc_pt(pfn) paravirt_ops.alloc_pt(pfn) |
361 | #define paravirt_release_pt(pfn) paravirt_ops.release_pt(pfn) | |
362 | ||
363 | #define paravirt_alloc_pd(pfn) paravirt_ops.alloc_pd(pfn) | |
364 | #define paravirt_alloc_pd_clone(pfn, clonepfn, start, count) \ | |
365 | paravirt_ops.alloc_pd_clone(pfn, clonepfn, start, count) | |
366 | #define paravirt_release_pd(pfn) paravirt_ops.release_pd(pfn) | |
367 | ||
da181a8b RR |
368 | static inline void set_pte(pte_t *ptep, pte_t pteval) |
369 | { | |
370 | paravirt_ops.set_pte(ptep, pteval); | |
371 | } | |
372 | ||
373 | static inline void set_pte_at(struct mm_struct *mm, u32 addr, pte_t *ptep, pte_t pteval) | |
374 | { | |
375 | paravirt_ops.set_pte_at(mm, addr, ptep, pteval); | |
376 | } | |
377 | ||
378 | static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval) | |
379 | { | |
380 | paravirt_ops.set_pmd(pmdp, pmdval); | |
381 | } | |
382 | ||
383 | static inline void pte_update(struct mm_struct *mm, u32 addr, pte_t *ptep) | |
384 | { | |
385 | paravirt_ops.pte_update(mm, addr, ptep); | |
386 | } | |
387 | ||
388 | static inline void pte_update_defer(struct mm_struct *mm, u32 addr, pte_t *ptep) | |
389 | { | |
390 | paravirt_ops.pte_update_defer(mm, addr, ptep); | |
391 | } | |
392 | ||
393 | #ifdef CONFIG_X86_PAE | |
394 | static inline void set_pte_atomic(pte_t *ptep, pte_t pteval) | |
395 | { | |
396 | paravirt_ops.set_pte_atomic(ptep, pteval); | |
397 | } | |
398 | ||
399 | static inline void set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte) | |
400 | { | |
401 | paravirt_ops.set_pte_present(mm, addr, ptep, pte); | |
402 | } | |
403 | ||
404 | static inline void set_pud(pud_t *pudp, pud_t pudval) | |
405 | { | |
406 | paravirt_ops.set_pud(pudp, pudval); | |
407 | } | |
408 | ||
409 | static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | |
410 | { | |
411 | paravirt_ops.pte_clear(mm, addr, ptep); | |
412 | } | |
413 | ||
414 | static inline void pmd_clear(pmd_t *pmdp) | |
415 | { | |
416 | paravirt_ops.pmd_clear(pmdp); | |
417 | } | |
418 | #endif | |
419 | ||
9226d125 ZA |
420 | /* Lazy mode for batching updates / context switch */ |
421 | #define PARAVIRT_LAZY_NONE 0 | |
422 | #define PARAVIRT_LAZY_MMU 1 | |
423 | #define PARAVIRT_LAZY_CPU 2 | |
424 | ||
425 | #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE | |
426 | #define arch_enter_lazy_cpu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_CPU) | |
427 | #define arch_leave_lazy_cpu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_NONE) | |
428 | ||
429 | #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE | |
430 | #define arch_enter_lazy_mmu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_MMU) | |
431 | #define arch_leave_lazy_mmu_mode() paravirt_ops.set_lazy_mode(PARAVIRT_LAZY_NONE) | |
432 | ||
139ec7c4 RR |
433 | /* These all sit in the .parainstructions section to tell us what to patch. */ |
434 | struct paravirt_patch { | |
435 | u8 *instr; /* original instructions */ | |
436 | u8 instrtype; /* type of this instruction */ | |
437 | u8 len; /* length of original instruction */ | |
438 | u16 clobbers; /* what registers you may clobber */ | |
439 | }; | |
440 | ||
441 | #define paravirt_alt(insn_string, typenum, clobber) \ | |
442 | "771:\n\t" insn_string "\n" "772:\n" \ | |
443 | ".pushsection .parainstructions,\"a\"\n" \ | |
444 | " .long 771b\n" \ | |
445 | " .byte " __stringify(typenum) "\n" \ | |
446 | " .byte 772b-771b\n" \ | |
447 | " .short " __stringify(clobber) "\n" \ | |
448 | ".popsection" | |
449 | ||
450 | static inline unsigned long __raw_local_save_flags(void) | |
451 | { | |
452 | unsigned long f; | |
453 | ||
454 | __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;" | |
455 | "call *%1;" | |
456 | "popl %%edx; popl %%ecx", | |
457 | PARAVIRT_SAVE_FLAGS, CLBR_NONE) | |
458 | : "=a"(f): "m"(paravirt_ops.save_fl) | |
459 | : "memory", "cc"); | |
460 | return f; | |
461 | } | |
462 | ||
463 | static inline void raw_local_irq_restore(unsigned long f) | |
464 | { | |
465 | __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;" | |
466 | "call *%1;" | |
467 | "popl %%edx; popl %%ecx", | |
468 | PARAVIRT_RESTORE_FLAGS, CLBR_EAX) | |
469 | : "=a"(f) : "m" (paravirt_ops.restore_fl), "0"(f) | |
470 | : "memory", "cc"); | |
471 | } | |
472 | ||
473 | static inline void raw_local_irq_disable(void) | |
474 | { | |
475 | __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;" | |
476 | "call *%0;" | |
477 | "popl %%edx; popl %%ecx", | |
478 | PARAVIRT_IRQ_DISABLE, CLBR_EAX) | |
479 | : : "m" (paravirt_ops.irq_disable) | |
480 | : "memory", "eax", "cc"); | |
481 | } | |
482 | ||
483 | static inline void raw_local_irq_enable(void) | |
484 | { | |
485 | __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;" | |
486 | "call *%0;" | |
487 | "popl %%edx; popl %%ecx", | |
488 | PARAVIRT_IRQ_ENABLE, CLBR_EAX) | |
489 | : : "m" (paravirt_ops.irq_enable) | |
490 | : "memory", "eax", "cc"); | |
491 | } | |
492 | ||
493 | static inline unsigned long __raw_local_irq_save(void) | |
494 | { | |
495 | unsigned long f; | |
496 | ||
497 | __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;" | |
498 | "call *%1; pushl %%eax;" | |
499 | "call *%2; popl %%eax;" | |
500 | "popl %%edx; popl %%ecx", | |
501 | PARAVIRT_SAVE_FLAGS_IRQ_DISABLE, | |
502 | CLBR_NONE) | |
503 | : "=a"(f) | |
504 | : "m" (paravirt_ops.save_fl), | |
505 | "m" (paravirt_ops.irq_disable) | |
506 | : "memory", "cc"); | |
507 | return f; | |
508 | } | |
509 | ||
510 | #define CLI_STRING paravirt_alt("pushl %%ecx; pushl %%edx;" \ | |
511 | "call *paravirt_ops+%c[irq_disable];" \ | |
512 | "popl %%edx; popl %%ecx", \ | |
513 | PARAVIRT_IRQ_DISABLE, CLBR_EAX) | |
514 | ||
515 | #define STI_STRING paravirt_alt("pushl %%ecx; pushl %%edx;" \ | |
516 | "call *paravirt_ops+%c[irq_enable];" \ | |
517 | "popl %%edx; popl %%ecx", \ | |
518 | PARAVIRT_IRQ_ENABLE, CLBR_EAX) | |
519 | #define CLI_STI_CLOBBERS , "%eax" | |
520 | #define CLI_STI_INPUT_ARGS \ | |
521 | , \ | |
522 | [irq_disable] "i" (offsetof(struct paravirt_ops, irq_disable)), \ | |
523 | [irq_enable] "i" (offsetof(struct paravirt_ops, irq_enable)) | |
524 | ||
d3561b7f RR |
525 | #else /* __ASSEMBLY__ */ |
526 | ||
139ec7c4 RR |
527 | #define PARA_PATCH(ptype, clobbers, ops) \ |
528 | 771:; \ | |
529 | ops; \ | |
530 | 772:; \ | |
531 | .pushsection .parainstructions,"a"; \ | |
532 | .long 771b; \ | |
533 | .byte ptype; \ | |
534 | .byte 772b-771b; \ | |
535 | .short clobbers; \ | |
536 | .popsection | |
537 | ||
538 | #define INTERRUPT_RETURN \ | |
539 | PARA_PATCH(PARAVIRT_INTERRUPT_RETURN, CLBR_ANY, \ | |
540 | jmp *%cs:paravirt_ops+PARAVIRT_iret) | |
541 | ||
542 | #define DISABLE_INTERRUPTS(clobbers) \ | |
543 | PARA_PATCH(PARAVIRT_IRQ_DISABLE, clobbers, \ | |
544 | pushl %ecx; pushl %edx; \ | |
545 | call *paravirt_ops+PARAVIRT_irq_disable; \ | |
546 | popl %edx; popl %ecx) \ | |
547 | ||
548 | #define ENABLE_INTERRUPTS(clobbers) \ | |
549 | PARA_PATCH(PARAVIRT_IRQ_ENABLE, clobbers, \ | |
550 | pushl %ecx; pushl %edx; \ | |
551 | call *%cs:paravirt_ops+PARAVIRT_irq_enable; \ | |
552 | popl %edx; popl %ecx) | |
553 | ||
554 | #define ENABLE_INTERRUPTS_SYSEXIT \ | |
555 | PARA_PATCH(PARAVIRT_STI_SYSEXIT, CLBR_ANY, \ | |
556 | jmp *%cs:paravirt_ops+PARAVIRT_irq_enable_sysexit) | |
557 | ||
558 | #define GET_CR0_INTO_EAX \ | |
559 | call *paravirt_ops+PARAVIRT_read_cr0 | |
560 | ||
d3561b7f RR |
561 | #endif /* __ASSEMBLY__ */ |
562 | #endif /* CONFIG_PARAVIRT */ | |
563 | #endif /* __ASM_PARAVIRT_H */ |