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d3561b7f RR |
1 | #ifndef __ASM_PARAVIRT_H |
2 | #define __ASM_PARAVIRT_H | |
3 | /* Various instructions on x86 need to be replaced for | |
4 | * para-virtualization: those hooks are defined here. */ | |
b239fb25 JF |
5 | |
6 | #ifdef CONFIG_PARAVIRT | |
da181a8b | 7 | #include <asm/page.h> |
d3561b7f | 8 | |
139ec7c4 RR |
9 | /* Bitmask of what can be clobbered: usually at least eax. */ |
10 | #define CLBR_NONE 0x0 | |
11 | #define CLBR_EAX 0x1 | |
12 | #define CLBR_ECX 0x2 | |
13 | #define CLBR_EDX 0x4 | |
14 | #define CLBR_ANY 0x7 | |
15 | ||
d3561b7f | 16 | #ifndef __ASSEMBLY__ |
3dc494e8 | 17 | #include <linux/types.h> |
d4c10477 | 18 | #include <linux/cpumask.h> |
ce6234b5 | 19 | #include <asm/kmap_types.h> |
3dc494e8 | 20 | |
ce6234b5 | 21 | struct page; |
d3561b7f RR |
22 | struct thread_struct; |
23 | struct Xgt_desc_struct; | |
24 | struct tss_struct; | |
da181a8b | 25 | struct mm_struct; |
90a0a06a | 26 | struct desc_struct; |
294688c0 JF |
27 | |
28 | /* Lazy mode for batching updates / context switch */ | |
29 | enum paravirt_lazy_mode { | |
30 | PARAVIRT_LAZY_NONE = 0, | |
31 | PARAVIRT_LAZY_MMU = 1, | |
32 | PARAVIRT_LAZY_CPU = 2, | |
4e0fa856 | 33 | PARAVIRT_LAZY_FLUSH = 3, |
294688c0 JF |
34 | }; |
35 | ||
d3561b7f RR |
36 | struct paravirt_ops |
37 | { | |
38 | unsigned int kernel_rpl; | |
5311ab62 | 39 | int shared_kernel_pmd; |
d3561b7f RR |
40 | int paravirt_enabled; |
41 | const char *name; | |
42 | ||
139ec7c4 RR |
43 | /* |
44 | * Patch may replace one of the defined code sequences with arbitrary | |
45 | * code, subject to the same register constraints. This generally | |
46 | * means the code is not free to clobber any registers other than EAX. | |
47 | * The patch function should return the number of bytes of code | |
48 | * generated, as we nop pad the rest in generic code. | |
49 | */ | |
50 | unsigned (*patch)(u8 type, u16 clobber, void *firstinsn, unsigned len); | |
51 | ||
294688c0 | 52 | /* Basic arch-specific setup */ |
d3561b7f RR |
53 | void (*arch_setup)(void); |
54 | char *(*memory_setup)(void); | |
6996d3b6 JF |
55 | void (*post_allocator_init)(void); |
56 | ||
d3561b7f | 57 | void (*init_IRQ)(void); |
294688c0 | 58 | void (*time_init)(void); |
d3561b7f | 59 | |
294688c0 JF |
60 | /* |
61 | * Called before/after init_mm pagetable setup. setup_start | |
62 | * may reset %cr3, and may pre-install parts of the pagetable; | |
63 | * pagetable setup is expected to preserve any existing | |
64 | * mapping. | |
65 | */ | |
b239fb25 JF |
66 | void (*pagetable_setup_start)(pgd_t *pgd_base); |
67 | void (*pagetable_setup_done)(pgd_t *pgd_base); | |
68 | ||
294688c0 | 69 | /* Print a banner to identify the environment */ |
d3561b7f RR |
70 | void (*banner)(void); |
71 | ||
294688c0 | 72 | /* Set and set time of day */ |
d3561b7f RR |
73 | unsigned long (*get_wallclock)(void); |
74 | int (*set_wallclock)(unsigned long); | |
d3561b7f | 75 | |
294688c0 | 76 | /* cpuid emulation, mostly so that caps bits can be disabled */ |
1a1eecd1 | 77 | void (*cpuid)(unsigned int *eax, unsigned int *ebx, |
d3561b7f RR |
78 | unsigned int *ecx, unsigned int *edx); |
79 | ||
294688c0 | 80 | /* hooks for various privileged instructions */ |
1a1eecd1 AK |
81 | unsigned long (*get_debugreg)(int regno); |
82 | void (*set_debugreg)(int regno, unsigned long value); | |
d3561b7f | 83 | |
1a1eecd1 | 84 | void (*clts)(void); |
d3561b7f | 85 | |
1a1eecd1 AK |
86 | unsigned long (*read_cr0)(void); |
87 | void (*write_cr0)(unsigned long); | |
d3561b7f | 88 | |
1a1eecd1 AK |
89 | unsigned long (*read_cr2)(void); |
90 | void (*write_cr2)(unsigned long); | |
d3561b7f | 91 | |
1a1eecd1 AK |
92 | unsigned long (*read_cr3)(void); |
93 | void (*write_cr3)(unsigned long); | |
d3561b7f | 94 | |
1a1eecd1 AK |
95 | unsigned long (*read_cr4_safe)(void); |
96 | unsigned long (*read_cr4)(void); | |
97 | void (*write_cr4)(unsigned long); | |
d3561b7f | 98 | |
294688c0 JF |
99 | /* |
100 | * Get/set interrupt state. save_fl and restore_fl are only | |
101 | * expected to use X86_EFLAGS_IF; all other bits | |
102 | * returned from save_fl are undefined, and may be ignored by | |
103 | * restore_fl. | |
104 | */ | |
1a1eecd1 AK |
105 | unsigned long (*save_fl)(void); |
106 | void (*restore_fl)(unsigned long); | |
107 | void (*irq_disable)(void); | |
108 | void (*irq_enable)(void); | |
109 | void (*safe_halt)(void); | |
110 | void (*halt)(void); | |
294688c0 | 111 | |
1a1eecd1 | 112 | void (*wbinvd)(void); |
d3561b7f | 113 | |
294688c0 JF |
114 | /* MSR, PMC and TSR operations. |
115 | err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */ | |
1a1eecd1 AK |
116 | u64 (*read_msr)(unsigned int msr, int *err); |
117 | int (*write_msr)(unsigned int msr, u64 val); | |
118 | ||
119 | u64 (*read_tsc)(void); | |
120 | u64 (*read_pmc)(void); | |
688340ea | 121 | unsigned long long (*sched_clock)(void); |
1182d852 | 122 | unsigned long (*get_cpu_khz)(void); |
1a1eecd1 | 123 | |
294688c0 | 124 | /* Segment descriptor handling */ |
1a1eecd1 AK |
125 | void (*load_tr_desc)(void); |
126 | void (*load_gdt)(const struct Xgt_desc_struct *); | |
127 | void (*load_idt)(const struct Xgt_desc_struct *); | |
128 | void (*store_gdt)(struct Xgt_desc_struct *); | |
129 | void (*store_idt)(struct Xgt_desc_struct *); | |
130 | void (*set_ldt)(const void *desc, unsigned entries); | |
131 | unsigned long (*store_tr)(void); | |
132 | void (*load_tls)(struct thread_struct *t, unsigned int cpu); | |
90a0a06a RR |
133 | void (*write_ldt_entry)(struct desc_struct *, |
134 | int entrynum, u32 low, u32 high); | |
135 | void (*write_gdt_entry)(struct desc_struct *, | |
136 | int entrynum, u32 low, u32 high); | |
137 | void (*write_idt_entry)(struct desc_struct *, | |
138 | int entrynum, u32 low, u32 high); | |
139 | void (*load_esp0)(struct tss_struct *tss, struct thread_struct *t); | |
d3561b7f | 140 | |
1a1eecd1 | 141 | void (*set_iopl_mask)(unsigned mask); |
1a1eecd1 | 142 | void (*io_delay)(void); |
d3561b7f | 143 | |
294688c0 JF |
144 | /* |
145 | * Hooks for intercepting the creation/use/destruction of an | |
146 | * mm_struct. | |
147 | */ | |
d6dd61c8 JF |
148 | void (*activate_mm)(struct mm_struct *prev, |
149 | struct mm_struct *next); | |
150 | void (*dup_mmap)(struct mm_struct *oldmm, | |
151 | struct mm_struct *mm); | |
152 | void (*exit_mmap)(struct mm_struct *mm); | |
153 | ||
13623d79 | 154 | #ifdef CONFIG_X86_LOCAL_APIC |
294688c0 JF |
155 | /* |
156 | * Direct APIC operations, principally for VMI. Ideally | |
157 | * these shouldn't be in this interface. | |
158 | */ | |
1a1eecd1 AK |
159 | void (*apic_write)(unsigned long reg, unsigned long v); |
160 | void (*apic_write_atomic)(unsigned long reg, unsigned long v); | |
161 | unsigned long (*apic_read)(unsigned long reg); | |
bbab4f3b ZA |
162 | void (*setup_boot_clock)(void); |
163 | void (*setup_secondary_clock)(void); | |
294688c0 JF |
164 | |
165 | void (*startup_ipi_hook)(int phys_apicid, | |
166 | unsigned long start_eip, | |
167 | unsigned long start_esp); | |
13623d79 RR |
168 | #endif |
169 | ||
294688c0 | 170 | /* TLB operations */ |
1a1eecd1 AK |
171 | void (*flush_tlb_user)(void); |
172 | void (*flush_tlb_kernel)(void); | |
f8822f42 | 173 | void (*flush_tlb_single)(unsigned long addr); |
d4c10477 JF |
174 | void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm, |
175 | unsigned long va); | |
1a1eecd1 | 176 | |
294688c0 | 177 | /* Hooks for allocating/releasing pagetable pages */ |
fdb4c338 | 178 | void (*alloc_pt)(struct mm_struct *mm, u32 pfn); |
1a1eecd1 AK |
179 | void (*alloc_pd)(u32 pfn); |
180 | void (*alloc_pd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count); | |
181 | void (*release_pt)(u32 pfn); | |
182 | void (*release_pd)(u32 pfn); | |
183 | ||
294688c0 | 184 | /* Pagetable manipulation functions */ |
1a1eecd1 | 185 | void (*set_pte)(pte_t *ptep, pte_t pteval); |
294688c0 JF |
186 | void (*set_pte_at)(struct mm_struct *mm, unsigned long addr, |
187 | pte_t *ptep, pte_t pteval); | |
1a1eecd1 | 188 | void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval); |
3dc494e8 | 189 | void (*pte_update)(struct mm_struct *mm, unsigned long addr, pte_t *ptep); |
294688c0 JF |
190 | void (*pte_update_defer)(struct mm_struct *mm, |
191 | unsigned long addr, pte_t *ptep); | |
3dc494e8 | 192 | |
ce6234b5 JF |
193 | #ifdef CONFIG_HIGHPTE |
194 | void *(*kmap_atomic_pte)(struct page *page, enum km_type type); | |
195 | #endif | |
196 | ||
da181a8b | 197 | #ifdef CONFIG_X86_PAE |
1a1eecd1 | 198 | void (*set_pte_atomic)(pte_t *ptep, pte_t pteval); |
3dc494e8 | 199 | void (*set_pte_present)(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte); |
1a1eecd1 | 200 | void (*set_pud)(pud_t *pudp, pud_t pudval); |
3dc494e8 | 201 | void (*pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep); |
1a1eecd1 | 202 | void (*pmd_clear)(pmd_t *pmdp); |
3dc494e8 JF |
203 | |
204 | unsigned long long (*pte_val)(pte_t); | |
205 | unsigned long long (*pmd_val)(pmd_t); | |
206 | unsigned long long (*pgd_val)(pgd_t); | |
207 | ||
208 | pte_t (*make_pte)(unsigned long long pte); | |
209 | pmd_t (*make_pmd)(unsigned long long pmd); | |
210 | pgd_t (*make_pgd)(unsigned long long pgd); | |
211 | #else | |
212 | unsigned long (*pte_val)(pte_t); | |
213 | unsigned long (*pgd_val)(pgd_t); | |
214 | ||
215 | pte_t (*make_pte)(unsigned long pte); | |
216 | pgd_t (*make_pgd)(unsigned long pgd); | |
da181a8b RR |
217 | #endif |
218 | ||
294688c0 JF |
219 | /* Set deferred update mode, used for batching operations. */ |
220 | void (*set_lazy_mode)(enum paravirt_lazy_mode mode); | |
9226d125 | 221 | |
d3561b7f | 222 | /* These two are jmp to, not actually called. */ |
1a1eecd1 AK |
223 | void (*irq_enable_sysexit)(void); |
224 | void (*iret)(void); | |
d3561b7f RR |
225 | }; |
226 | ||
227 | extern struct paravirt_ops paravirt_ops; | |
228 | ||
d5822035 JF |
229 | #define PARAVIRT_PATCH(x) \ |
230 | (offsetof(struct paravirt_ops, x) / sizeof(void *)) | |
231 | ||
232 | #define paravirt_type(type) \ | |
233 | [paravirt_typenum] "i" (PARAVIRT_PATCH(type)) | |
234 | #define paravirt_clobber(clobber) \ | |
235 | [paravirt_clobber] "i" (clobber) | |
236 | ||
294688c0 JF |
237 | /* |
238 | * Generate some code, and mark it as patchable by the | |
239 | * apply_paravirt() alternate instruction patcher. | |
240 | */ | |
d5822035 JF |
241 | #define _paravirt_alt(insn_string, type, clobber) \ |
242 | "771:\n\t" insn_string "\n" "772:\n" \ | |
243 | ".pushsection .parainstructions,\"a\"\n" \ | |
244 | " .long 771b\n" \ | |
245 | " .byte " type "\n" \ | |
246 | " .byte 772b-771b\n" \ | |
247 | " .short " clobber "\n" \ | |
248 | ".popsection\n" | |
249 | ||
294688c0 | 250 | /* Generate patchable code, with the default asm parameters. */ |
f8822f42 | 251 | #define paravirt_alt(insn_string) \ |
d5822035 JF |
252 | _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]") |
253 | ||
63f70270 JF |
254 | unsigned paravirt_patch_nop(void); |
255 | unsigned paravirt_patch_ignore(unsigned len); | |
256 | unsigned paravirt_patch_call(void *target, u16 tgt_clobbers, | |
257 | void *site, u16 site_clobbers, | |
258 | unsigned len); | |
259 | unsigned paravirt_patch_jmp(void *target, void *site, unsigned len); | |
260 | unsigned paravirt_patch_default(u8 type, u16 clobbers, void *site, unsigned len); | |
261 | ||
262 | unsigned paravirt_patch_insns(void *site, unsigned len, | |
263 | const char *start, const char *end); | |
264 | ||
d572929c | 265 | int paravirt_disable_iospace(void); |
63f70270 | 266 | |
294688c0 JF |
267 | /* |
268 | * This generates an indirect call based on the operation type number. | |
269 | * The type number, computed in PARAVIRT_PATCH, is derived from the | |
270 | * offset into the paravirt_ops structure, and can therefore be freely | |
271 | * converted back into a structure offset. | |
272 | */ | |
273 | #define PARAVIRT_CALL "call *(paravirt_ops+%c[paravirt_typenum]*4);" | |
274 | ||
275 | /* | |
276 | * These macros are intended to wrap calls into a paravirt_ops | |
277 | * operation, so that they can be later identified and patched at | |
278 | * runtime. | |
279 | * | |
280 | * Normally, a call to a pv_op function is a simple indirect call: | |
281 | * (paravirt_ops.operations)(args...). | |
282 | * | |
283 | * Unfortunately, this is a relatively slow operation for modern CPUs, | |
284 | * because it cannot necessarily determine what the destination | |
285 | * address is. In this case, the address is a runtime constant, so at | |
286 | * the very least we can patch the call to e a simple direct call, or | |
287 | * ideally, patch an inline implementation into the callsite. (Direct | |
288 | * calls are essentially free, because the call and return addresses | |
289 | * are completely predictable.) | |
290 | * | |
291 | * These macros rely on the standard gcc "regparm(3)" calling | |
292 | * convention, in which the first three arguments are placed in %eax, | |
293 | * %edx, %ecx (in that order), and the remaining arguments are placed | |
294 | * on the stack. All caller-save registers (eax,edx,ecx) are expected | |
295 | * to be modified (either clobbered or used for return values). | |
296 | * | |
297 | * The call instruction itself is marked by placing its start address | |
298 | * and size into the .parainstructions section, so that | |
299 | * apply_paravirt() in arch/i386/kernel/alternative.c can do the | |
300 | * appropriate patching under the control of the backend paravirt_ops | |
301 | * implementation. | |
302 | * | |
303 | * Unfortunately there's no way to get gcc to generate the args setup | |
304 | * for the call, and then allow the call itself to be generated by an | |
305 | * inline asm. Because of this, we must do the complete arg setup and | |
306 | * return value handling from within these macros. This is fairly | |
307 | * cumbersome. | |
308 | * | |
309 | * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments. | |
310 | * It could be extended to more arguments, but there would be little | |
311 | * to be gained from that. For each number of arguments, there are | |
312 | * the two VCALL and CALL variants for void and non-void functions. | |
313 | * | |
314 | * When there is a return value, the invoker of the macro must specify | |
315 | * the return type. The macro then uses sizeof() on that type to | |
316 | * determine whether its a 32 or 64 bit value, and places the return | |
317 | * in the right register(s) (just %eax for 32-bit, and %edx:%eax for | |
318 | * 64-bit). | |
319 | * | |
320 | * 64-bit arguments are passed as a pair of adjacent 32-bit arguments | |
321 | * in low,high order. | |
322 | * | |
323 | * Small structures are passed and returned in registers. The macro | |
324 | * calling convention can't directly deal with this, so the wrapper | |
325 | * functions must do this. | |
326 | * | |
327 | * These PVOP_* macros are only defined within this header. This | |
328 | * means that all uses must be wrapped in inline functions. This also | |
329 | * makes sure the incoming and outgoing types are always correct. | |
330 | */ | |
1a45b7aa | 331 | #define __PVOP_CALL(rettype, op, pre, post, ...) \ |
f8822f42 | 332 | ({ \ |
1a45b7aa | 333 | rettype __ret; \ |
f8822f42 | 334 | unsigned long __eax, __edx, __ecx; \ |
1a45b7aa JF |
335 | if (sizeof(rettype) > sizeof(unsigned long)) { \ |
336 | asm volatile(pre \ | |
337 | paravirt_alt(PARAVIRT_CALL) \ | |
338 | post \ | |
339 | : "=a" (__eax), "=d" (__edx), \ | |
f8822f42 | 340 | "=c" (__ecx) \ |
1a45b7aa JF |
341 | : paravirt_type(op), \ |
342 | paravirt_clobber(CLBR_ANY), \ | |
343 | ##__VA_ARGS__ \ | |
f8822f42 | 344 | : "memory", "cc"); \ |
1a45b7aa | 345 | __ret = (rettype)((((u64)__edx) << 32) | __eax); \ |
f8822f42 | 346 | } else { \ |
1a45b7aa | 347 | asm volatile(pre \ |
f8822f42 | 348 | paravirt_alt(PARAVIRT_CALL) \ |
1a45b7aa JF |
349 | post \ |
350 | : "=a" (__eax), "=d" (__edx), \ | |
351 | "=c" (__ecx) \ | |
352 | : paravirt_type(op), \ | |
353 | paravirt_clobber(CLBR_ANY), \ | |
354 | ##__VA_ARGS__ \ | |
f8822f42 | 355 | : "memory", "cc"); \ |
1a45b7aa | 356 | __ret = (rettype)__eax; \ |
f8822f42 JF |
357 | } \ |
358 | __ret; \ | |
359 | }) | |
1a45b7aa | 360 | #define __PVOP_VCALL(op, pre, post, ...) \ |
f8822f42 JF |
361 | ({ \ |
362 | unsigned long __eax, __edx, __ecx; \ | |
1a45b7aa | 363 | asm volatile(pre \ |
f8822f42 | 364 | paravirt_alt(PARAVIRT_CALL) \ |
1a45b7aa | 365 | post \ |
f8822f42 | 366 | : "=a" (__eax), "=d" (__edx), "=c" (__ecx) \ |
1a45b7aa JF |
367 | : paravirt_type(op), \ |
368 | paravirt_clobber(CLBR_ANY), \ | |
369 | ##__VA_ARGS__ \ | |
f8822f42 JF |
370 | : "memory", "cc"); \ |
371 | }) | |
372 | ||
1a45b7aa JF |
373 | #define PVOP_CALL0(rettype, op) \ |
374 | __PVOP_CALL(rettype, op, "", "") | |
375 | #define PVOP_VCALL0(op) \ | |
376 | __PVOP_VCALL(op, "", "") | |
377 | ||
378 | #define PVOP_CALL1(rettype, op, arg1) \ | |
379 | __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1))) | |
380 | #define PVOP_VCALL1(op, arg1) \ | |
381 | __PVOP_VCALL(op, "", "", "0" ((u32)(arg1))) | |
382 | ||
383 | #define PVOP_CALL2(rettype, op, arg1, arg2) \ | |
384 | __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)), "1" ((u32)(arg2))) | |
385 | #define PVOP_VCALL2(op, arg1, arg2) \ | |
386 | __PVOP_VCALL(op, "", "", "0" ((u32)(arg1)), "1" ((u32)(arg2))) | |
387 | ||
388 | #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \ | |
389 | __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)), \ | |
390 | "1"((u32)(arg2)), "2"((u32)(arg3))) | |
391 | #define PVOP_VCALL3(op, arg1, arg2, arg3) \ | |
392 | __PVOP_VCALL(op, "", "", "0" ((u32)(arg1)), "1"((u32)(arg2)), \ | |
393 | "2"((u32)(arg3))) | |
394 | ||
395 | #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ | |
396 | __PVOP_CALL(rettype, op, \ | |
397 | "push %[_arg4];", "lea 4(%%esp),%%esp;", \ | |
398 | "0" ((u32)(arg1)), "1" ((u32)(arg2)), \ | |
399 | "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) | |
400 | #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ | |
401 | __PVOP_VCALL(op, \ | |
402 | "push %[_arg4];", "lea 4(%%esp),%%esp;", \ | |
403 | "0" ((u32)(arg1)), "1" ((u32)(arg2)), \ | |
404 | "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) | |
405 | ||
f8822f42 JF |
406 | static inline int paravirt_enabled(void) |
407 | { | |
408 | return paravirt_ops.paravirt_enabled; | |
409 | } | |
d3561b7f RR |
410 | |
411 | static inline void load_esp0(struct tss_struct *tss, | |
412 | struct thread_struct *thread) | |
413 | { | |
f8822f42 | 414 | PVOP_VCALL2(load_esp0, tss, thread); |
d3561b7f RR |
415 | } |
416 | ||
417 | #define ARCH_SETUP paravirt_ops.arch_setup(); | |
418 | static inline unsigned long get_wallclock(void) | |
419 | { | |
f8822f42 | 420 | return PVOP_CALL0(unsigned long, get_wallclock); |
d3561b7f RR |
421 | } |
422 | ||
423 | static inline int set_wallclock(unsigned long nowtime) | |
424 | { | |
f8822f42 | 425 | return PVOP_CALL1(int, set_wallclock, nowtime); |
d3561b7f RR |
426 | } |
427 | ||
e30fab3a | 428 | static inline void (*choose_time_init(void))(void) |
d3561b7f | 429 | { |
e30fab3a | 430 | return paravirt_ops.time_init; |
d3561b7f RR |
431 | } |
432 | ||
433 | /* The paravirtualized CPUID instruction. */ | |
434 | static inline void __cpuid(unsigned int *eax, unsigned int *ebx, | |
435 | unsigned int *ecx, unsigned int *edx) | |
436 | { | |
f8822f42 | 437 | PVOP_VCALL4(cpuid, eax, ebx, ecx, edx); |
d3561b7f RR |
438 | } |
439 | ||
440 | /* | |
441 | * These special macros can be used to get or set a debugging register | |
442 | */ | |
f8822f42 JF |
443 | static inline unsigned long paravirt_get_debugreg(int reg) |
444 | { | |
445 | return PVOP_CALL1(unsigned long, get_debugreg, reg); | |
446 | } | |
447 | #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg) | |
448 | static inline void set_debugreg(unsigned long val, int reg) | |
449 | { | |
450 | PVOP_VCALL2(set_debugreg, reg, val); | |
451 | } | |
d3561b7f | 452 | |
f8822f42 JF |
453 | static inline void clts(void) |
454 | { | |
455 | PVOP_VCALL0(clts); | |
456 | } | |
d3561b7f | 457 | |
f8822f42 JF |
458 | static inline unsigned long read_cr0(void) |
459 | { | |
460 | return PVOP_CALL0(unsigned long, read_cr0); | |
461 | } | |
d3561b7f | 462 | |
f8822f42 JF |
463 | static inline void write_cr0(unsigned long x) |
464 | { | |
465 | PVOP_VCALL1(write_cr0, x); | |
466 | } | |
467 | ||
468 | static inline unsigned long read_cr2(void) | |
469 | { | |
470 | return PVOP_CALL0(unsigned long, read_cr2); | |
471 | } | |
472 | ||
473 | static inline void write_cr2(unsigned long x) | |
474 | { | |
475 | PVOP_VCALL1(write_cr2, x); | |
476 | } | |
477 | ||
478 | static inline unsigned long read_cr3(void) | |
479 | { | |
480 | return PVOP_CALL0(unsigned long, read_cr3); | |
481 | } | |
d3561b7f | 482 | |
f8822f42 JF |
483 | static inline void write_cr3(unsigned long x) |
484 | { | |
485 | PVOP_VCALL1(write_cr3, x); | |
486 | } | |
d3561b7f | 487 | |
f8822f42 JF |
488 | static inline unsigned long read_cr4(void) |
489 | { | |
490 | return PVOP_CALL0(unsigned long, read_cr4); | |
491 | } | |
492 | static inline unsigned long read_cr4_safe(void) | |
493 | { | |
494 | return PVOP_CALL0(unsigned long, read_cr4_safe); | |
495 | } | |
d3561b7f | 496 | |
f8822f42 JF |
497 | static inline void write_cr4(unsigned long x) |
498 | { | |
499 | PVOP_VCALL1(write_cr4, x); | |
500 | } | |
3dc494e8 | 501 | |
d3561b7f RR |
502 | static inline void raw_safe_halt(void) |
503 | { | |
f8822f42 | 504 | PVOP_VCALL0(safe_halt); |
d3561b7f RR |
505 | } |
506 | ||
507 | static inline void halt(void) | |
508 | { | |
f8822f42 JF |
509 | PVOP_VCALL0(safe_halt); |
510 | } | |
511 | ||
512 | static inline void wbinvd(void) | |
513 | { | |
514 | PVOP_VCALL0(wbinvd); | |
d3561b7f | 515 | } |
d3561b7f RR |
516 | |
517 | #define get_kernel_rpl() (paravirt_ops.kernel_rpl) | |
518 | ||
f8822f42 JF |
519 | static inline u64 paravirt_read_msr(unsigned msr, int *err) |
520 | { | |
521 | return PVOP_CALL2(u64, read_msr, msr, err); | |
522 | } | |
523 | static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high) | |
524 | { | |
525 | return PVOP_CALL3(int, write_msr, msr, low, high); | |
526 | } | |
527 | ||
90a0a06a | 528 | /* These should all do BUG_ON(_err), but our headers are too tangled. */ |
f8822f42 JF |
529 | #define rdmsr(msr,val1,val2) do { \ |
530 | int _err; \ | |
531 | u64 _l = paravirt_read_msr(msr, &_err); \ | |
532 | val1 = (u32)_l; \ | |
533 | val2 = _l >> 32; \ | |
d3561b7f RR |
534 | } while(0) |
535 | ||
f8822f42 JF |
536 | #define wrmsr(msr,val1,val2) do { \ |
537 | paravirt_write_msr(msr, val1, val2); \ | |
d3561b7f RR |
538 | } while(0) |
539 | ||
f8822f42 JF |
540 | #define rdmsrl(msr,val) do { \ |
541 | int _err; \ | |
542 | val = paravirt_read_msr(msr, &_err); \ | |
d3561b7f RR |
543 | } while(0) |
544 | ||
b9e3614f | 545 | #define wrmsrl(msr,val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32) |
f8822f42 | 546 | #define wrmsr_safe(msr,a,b) paravirt_write_msr(msr, a, b) |
d3561b7f RR |
547 | |
548 | /* rdmsr with exception handling */ | |
f8822f42 JF |
549 | #define rdmsr_safe(msr,a,b) ({ \ |
550 | int _err; \ | |
551 | u64 _l = paravirt_read_msr(msr, &_err); \ | |
552 | (*a) = (u32)_l; \ | |
553 | (*b) = _l >> 32; \ | |
d3561b7f RR |
554 | _err; }) |
555 | ||
f8822f42 JF |
556 | |
557 | static inline u64 paravirt_read_tsc(void) | |
558 | { | |
559 | return PVOP_CALL0(u64, read_tsc); | |
560 | } | |
d3561b7f | 561 | |
f8822f42 JF |
562 | #define rdtscl(low) do { \ |
563 | u64 _l = paravirt_read_tsc(); \ | |
564 | low = (int)_l; \ | |
d3561b7f RR |
565 | } while(0) |
566 | ||
f8822f42 | 567 | #define rdtscll(val) (val = paravirt_read_tsc()) |
d3561b7f | 568 | |
688340ea JF |
569 | static inline unsigned long long paravirt_sched_clock(void) |
570 | { | |
571 | return PVOP_CALL0(unsigned long long, sched_clock); | |
572 | } | |
1182d852 | 573 | #define calculate_cpu_khz() (paravirt_ops.get_cpu_khz()) |
6cb9a835 | 574 | |
d3561b7f RR |
575 | #define write_tsc(val1,val2) wrmsr(0x10, val1, val2) |
576 | ||
f8822f42 JF |
577 | static inline unsigned long long paravirt_read_pmc(int counter) |
578 | { | |
579 | return PVOP_CALL1(u64, read_pmc, counter); | |
580 | } | |
d3561b7f | 581 | |
f8822f42 JF |
582 | #define rdpmc(counter,low,high) do { \ |
583 | u64 _l = paravirt_read_pmc(counter); \ | |
584 | low = (u32)_l; \ | |
585 | high = _l >> 32; \ | |
586 | } while(0) | |
3dc494e8 | 587 | |
f8822f42 JF |
588 | static inline void load_TR_desc(void) |
589 | { | |
590 | PVOP_VCALL0(load_tr_desc); | |
591 | } | |
592 | static inline void load_gdt(const struct Xgt_desc_struct *dtr) | |
593 | { | |
594 | PVOP_VCALL1(load_gdt, dtr); | |
595 | } | |
596 | static inline void load_idt(const struct Xgt_desc_struct *dtr) | |
597 | { | |
598 | PVOP_VCALL1(load_idt, dtr); | |
599 | } | |
600 | static inline void set_ldt(const void *addr, unsigned entries) | |
601 | { | |
602 | PVOP_VCALL2(set_ldt, addr, entries); | |
603 | } | |
604 | static inline void store_gdt(struct Xgt_desc_struct *dtr) | |
605 | { | |
606 | PVOP_VCALL1(store_gdt, dtr); | |
607 | } | |
608 | static inline void store_idt(struct Xgt_desc_struct *dtr) | |
609 | { | |
610 | PVOP_VCALL1(store_idt, dtr); | |
611 | } | |
612 | static inline unsigned long paravirt_store_tr(void) | |
613 | { | |
614 | return PVOP_CALL0(unsigned long, store_tr); | |
615 | } | |
616 | #define store_tr(tr) ((tr) = paravirt_store_tr()) | |
617 | static inline void load_TLS(struct thread_struct *t, unsigned cpu) | |
618 | { | |
619 | PVOP_VCALL2(load_tls, t, cpu); | |
620 | } | |
621 | static inline void write_ldt_entry(void *dt, int entry, u32 low, u32 high) | |
622 | { | |
623 | PVOP_VCALL4(write_ldt_entry, dt, entry, low, high); | |
624 | } | |
625 | static inline void write_gdt_entry(void *dt, int entry, u32 low, u32 high) | |
626 | { | |
627 | PVOP_VCALL4(write_gdt_entry, dt, entry, low, high); | |
628 | } | |
629 | static inline void write_idt_entry(void *dt, int entry, u32 low, u32 high) | |
630 | { | |
631 | PVOP_VCALL4(write_idt_entry, dt, entry, low, high); | |
632 | } | |
633 | static inline void set_iopl_mask(unsigned mask) | |
634 | { | |
635 | PVOP_VCALL1(set_iopl_mask, mask); | |
636 | } | |
3dc494e8 | 637 | |
d3561b7f RR |
638 | /* The paravirtualized I/O functions */ |
639 | static inline void slow_down_io(void) { | |
640 | paravirt_ops.io_delay(); | |
641 | #ifdef REALLY_SLOW_IO | |
642 | paravirt_ops.io_delay(); | |
643 | paravirt_ops.io_delay(); | |
644 | paravirt_ops.io_delay(); | |
645 | #endif | |
646 | } | |
647 | ||
13623d79 RR |
648 | #ifdef CONFIG_X86_LOCAL_APIC |
649 | /* | |
650 | * Basic functions accessing APICs. | |
651 | */ | |
652 | static inline void apic_write(unsigned long reg, unsigned long v) | |
653 | { | |
f8822f42 | 654 | PVOP_VCALL2(apic_write, reg, v); |
13623d79 RR |
655 | } |
656 | ||
657 | static inline void apic_write_atomic(unsigned long reg, unsigned long v) | |
658 | { | |
f8822f42 | 659 | PVOP_VCALL2(apic_write_atomic, reg, v); |
13623d79 RR |
660 | } |
661 | ||
662 | static inline unsigned long apic_read(unsigned long reg) | |
663 | { | |
f8822f42 | 664 | return PVOP_CALL1(unsigned long, apic_read, reg); |
13623d79 | 665 | } |
bbab4f3b ZA |
666 | |
667 | static inline void setup_boot_clock(void) | |
668 | { | |
f8822f42 | 669 | PVOP_VCALL0(setup_boot_clock); |
bbab4f3b ZA |
670 | } |
671 | ||
672 | static inline void setup_secondary_clock(void) | |
673 | { | |
f8822f42 | 674 | PVOP_VCALL0(setup_secondary_clock); |
bbab4f3b | 675 | } |
13623d79 RR |
676 | #endif |
677 | ||
6996d3b6 JF |
678 | static inline void paravirt_post_allocator_init(void) |
679 | { | |
680 | if (paravirt_ops.post_allocator_init) | |
681 | (*paravirt_ops.post_allocator_init)(); | |
682 | } | |
683 | ||
b239fb25 JF |
684 | static inline void paravirt_pagetable_setup_start(pgd_t *base) |
685 | { | |
686 | if (paravirt_ops.pagetable_setup_start) | |
687 | (*paravirt_ops.pagetable_setup_start)(base); | |
688 | } | |
689 | ||
690 | static inline void paravirt_pagetable_setup_done(pgd_t *base) | |
691 | { | |
692 | if (paravirt_ops.pagetable_setup_done) | |
693 | (*paravirt_ops.pagetable_setup_done)(base); | |
694 | } | |
3dc494e8 | 695 | |
ae5da273 ZA |
696 | #ifdef CONFIG_SMP |
697 | static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip, | |
698 | unsigned long start_esp) | |
699 | { | |
f8822f42 | 700 | PVOP_VCALL3(startup_ipi_hook, phys_apicid, start_eip, start_esp); |
ae5da273 ZA |
701 | } |
702 | #endif | |
13623d79 | 703 | |
d6dd61c8 JF |
704 | static inline void paravirt_activate_mm(struct mm_struct *prev, |
705 | struct mm_struct *next) | |
706 | { | |
f8822f42 | 707 | PVOP_VCALL2(activate_mm, prev, next); |
d6dd61c8 JF |
708 | } |
709 | ||
710 | static inline void arch_dup_mmap(struct mm_struct *oldmm, | |
711 | struct mm_struct *mm) | |
712 | { | |
f8822f42 | 713 | PVOP_VCALL2(dup_mmap, oldmm, mm); |
d6dd61c8 JF |
714 | } |
715 | ||
716 | static inline void arch_exit_mmap(struct mm_struct *mm) | |
717 | { | |
f8822f42 | 718 | PVOP_VCALL1(exit_mmap, mm); |
d6dd61c8 JF |
719 | } |
720 | ||
f8822f42 JF |
721 | static inline void __flush_tlb(void) |
722 | { | |
723 | PVOP_VCALL0(flush_tlb_user); | |
724 | } | |
725 | static inline void __flush_tlb_global(void) | |
726 | { | |
727 | PVOP_VCALL0(flush_tlb_kernel); | |
728 | } | |
729 | static inline void __flush_tlb_single(unsigned long addr) | |
730 | { | |
731 | PVOP_VCALL1(flush_tlb_single, addr); | |
732 | } | |
da181a8b | 733 | |
d4c10477 JF |
734 | static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm, |
735 | unsigned long va) | |
736 | { | |
737 | PVOP_VCALL3(flush_tlb_others, &cpumask, mm, va); | |
738 | } | |
739 | ||
fdb4c338 | 740 | static inline void paravirt_alloc_pt(struct mm_struct *mm, unsigned pfn) |
f8822f42 | 741 | { |
fdb4c338 | 742 | PVOP_VCALL2(alloc_pt, mm, pfn); |
f8822f42 JF |
743 | } |
744 | static inline void paravirt_release_pt(unsigned pfn) | |
745 | { | |
746 | PVOP_VCALL1(release_pt, pfn); | |
747 | } | |
c119ecce | 748 | |
f8822f42 JF |
749 | static inline void paravirt_alloc_pd(unsigned pfn) |
750 | { | |
751 | PVOP_VCALL1(alloc_pd, pfn); | |
752 | } | |
c119ecce | 753 | |
f8822f42 JF |
754 | static inline void paravirt_alloc_pd_clone(unsigned pfn, unsigned clonepfn, |
755 | unsigned start, unsigned count) | |
756 | { | |
757 | PVOP_VCALL4(alloc_pd_clone, pfn, clonepfn, start, count); | |
758 | } | |
759 | static inline void paravirt_release_pd(unsigned pfn) | |
da181a8b | 760 | { |
f8822f42 | 761 | PVOP_VCALL1(release_pd, pfn); |
da181a8b RR |
762 | } |
763 | ||
ce6234b5 JF |
764 | #ifdef CONFIG_HIGHPTE |
765 | static inline void *kmap_atomic_pte(struct page *page, enum km_type type) | |
766 | { | |
767 | unsigned long ret; | |
768 | ret = PVOP_CALL2(unsigned long, kmap_atomic_pte, page, type); | |
769 | return (void *)ret; | |
770 | } | |
771 | #endif | |
772 | ||
f8822f42 JF |
773 | static inline void pte_update(struct mm_struct *mm, unsigned long addr, |
774 | pte_t *ptep) | |
da181a8b | 775 | { |
f8822f42 | 776 | PVOP_VCALL3(pte_update, mm, addr, ptep); |
da181a8b RR |
777 | } |
778 | ||
f8822f42 JF |
779 | static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr, |
780 | pte_t *ptep) | |
da181a8b | 781 | { |
f8822f42 | 782 | PVOP_VCALL3(pte_update_defer, mm, addr, ptep); |
da181a8b RR |
783 | } |
784 | ||
f8822f42 JF |
785 | #ifdef CONFIG_X86_PAE |
786 | static inline pte_t __pte(unsigned long long val) | |
da181a8b | 787 | { |
f8822f42 JF |
788 | unsigned long long ret = PVOP_CALL2(unsigned long long, make_pte, |
789 | val, val >> 32); | |
790 | return (pte_t) { ret, ret >> 32 }; | |
da181a8b RR |
791 | } |
792 | ||
f8822f42 | 793 | static inline pmd_t __pmd(unsigned long long val) |
da181a8b | 794 | { |
f8822f42 JF |
795 | return (pmd_t) { PVOP_CALL2(unsigned long long, make_pmd, val, val >> 32) }; |
796 | } | |
797 | ||
798 | static inline pgd_t __pgd(unsigned long long val) | |
799 | { | |
800 | return (pgd_t) { PVOP_CALL2(unsigned long long, make_pgd, val, val >> 32) }; | |
801 | } | |
802 | ||
803 | static inline unsigned long long pte_val(pte_t x) | |
804 | { | |
805 | return PVOP_CALL2(unsigned long long, pte_val, x.pte_low, x.pte_high); | |
806 | } | |
807 | ||
808 | static inline unsigned long long pmd_val(pmd_t x) | |
809 | { | |
810 | return PVOP_CALL2(unsigned long long, pmd_val, x.pmd, x.pmd >> 32); | |
811 | } | |
812 | ||
813 | static inline unsigned long long pgd_val(pgd_t x) | |
814 | { | |
815 | return PVOP_CALL2(unsigned long long, pgd_val, x.pgd, x.pgd >> 32); | |
816 | } | |
817 | ||
818 | static inline void set_pte(pte_t *ptep, pte_t pteval) | |
819 | { | |
820 | PVOP_VCALL3(set_pte, ptep, pteval.pte_low, pteval.pte_high); | |
821 | } | |
822 | ||
823 | static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, | |
824 | pte_t *ptep, pte_t pteval) | |
825 | { | |
826 | /* 5 arg words */ | |
827 | paravirt_ops.set_pte_at(mm, addr, ptep, pteval); | |
da181a8b RR |
828 | } |
829 | ||
da181a8b RR |
830 | static inline void set_pte_atomic(pte_t *ptep, pte_t pteval) |
831 | { | |
f8822f42 | 832 | PVOP_VCALL3(set_pte_atomic, ptep, pteval.pte_low, pteval.pte_high); |
da181a8b RR |
833 | } |
834 | ||
f8822f42 JF |
835 | static inline void set_pte_present(struct mm_struct *mm, unsigned long addr, |
836 | pte_t *ptep, pte_t pte) | |
da181a8b | 837 | { |
f8822f42 | 838 | /* 5 arg words */ |
da181a8b RR |
839 | paravirt_ops.set_pte_present(mm, addr, ptep, pte); |
840 | } | |
841 | ||
f8822f42 JF |
842 | static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval) |
843 | { | |
844 | PVOP_VCALL3(set_pmd, pmdp, pmdval.pmd, pmdval.pmd >> 32); | |
845 | } | |
846 | ||
da181a8b RR |
847 | static inline void set_pud(pud_t *pudp, pud_t pudval) |
848 | { | |
f8822f42 | 849 | PVOP_VCALL3(set_pud, pudp, pudval.pgd.pgd, pudval.pgd.pgd >> 32); |
da181a8b RR |
850 | } |
851 | ||
852 | static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | |
853 | { | |
f8822f42 | 854 | PVOP_VCALL3(pte_clear, mm, addr, ptep); |
da181a8b RR |
855 | } |
856 | ||
857 | static inline void pmd_clear(pmd_t *pmdp) | |
858 | { | |
f8822f42 JF |
859 | PVOP_VCALL1(pmd_clear, pmdp); |
860 | } | |
861 | ||
f8822f42 | 862 | #else /* !CONFIG_X86_PAE */ |
4cdd9c89 | 863 | |
f8822f42 JF |
864 | static inline pte_t __pte(unsigned long val) |
865 | { | |
866 | return (pte_t) { PVOP_CALL1(unsigned long, make_pte, val) }; | |
da181a8b | 867 | } |
f8822f42 JF |
868 | |
869 | static inline pgd_t __pgd(unsigned long val) | |
870 | { | |
871 | return (pgd_t) { PVOP_CALL1(unsigned long, make_pgd, val) }; | |
872 | } | |
873 | ||
874 | static inline unsigned long pte_val(pte_t x) | |
875 | { | |
876 | return PVOP_CALL1(unsigned long, pte_val, x.pte_low); | |
877 | } | |
878 | ||
879 | static inline unsigned long pgd_val(pgd_t x) | |
880 | { | |
881 | return PVOP_CALL1(unsigned long, pgd_val, x.pgd); | |
882 | } | |
883 | ||
884 | static inline void set_pte(pte_t *ptep, pte_t pteval) | |
885 | { | |
886 | PVOP_VCALL2(set_pte, ptep, pteval.pte_low); | |
887 | } | |
888 | ||
889 | static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, | |
890 | pte_t *ptep, pte_t pteval) | |
891 | { | |
892 | PVOP_VCALL4(set_pte_at, mm, addr, ptep, pteval.pte_low); | |
893 | } | |
894 | ||
895 | static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval) | |
896 | { | |
897 | PVOP_VCALL2(set_pmd, pmdp, pmdval.pud.pgd.pgd); | |
898 | } | |
f8822f42 | 899 | #endif /* CONFIG_X86_PAE */ |
da181a8b | 900 | |
9226d125 | 901 | #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE |
f8822f42 JF |
902 | static inline void arch_enter_lazy_cpu_mode(void) |
903 | { | |
904 | PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_CPU); | |
905 | } | |
906 | ||
907 | static inline void arch_leave_lazy_cpu_mode(void) | |
908 | { | |
909 | PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_NONE); | |
910 | } | |
911 | ||
912 | static inline void arch_flush_lazy_cpu_mode(void) | |
913 | { | |
914 | PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_FLUSH); | |
915 | } | |
916 | ||
9226d125 ZA |
917 | |
918 | #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE | |
f8822f42 JF |
919 | static inline void arch_enter_lazy_mmu_mode(void) |
920 | { | |
921 | PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_MMU); | |
922 | } | |
923 | ||
924 | static inline void arch_leave_lazy_mmu_mode(void) | |
925 | { | |
926 | PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_NONE); | |
927 | } | |
928 | ||
929 | static inline void arch_flush_lazy_mmu_mode(void) | |
930 | { | |
931 | PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_FLUSH); | |
932 | } | |
9226d125 | 933 | |
45876233 JF |
934 | void _paravirt_nop(void); |
935 | #define paravirt_nop ((void *)_paravirt_nop) | |
936 | ||
139ec7c4 | 937 | /* These all sit in the .parainstructions section to tell us what to patch. */ |
98de032b | 938 | struct paravirt_patch_site { |
139ec7c4 RR |
939 | u8 *instr; /* original instructions */ |
940 | u8 instrtype; /* type of this instruction */ | |
941 | u8 len; /* length of original instruction */ | |
942 | u16 clobbers; /* what registers you may clobber */ | |
943 | }; | |
944 | ||
98de032b JF |
945 | extern struct paravirt_patch_site __parainstructions[], |
946 | __parainstructions_end[]; | |
947 | ||
139ec7c4 RR |
948 | static inline unsigned long __raw_local_save_flags(void) |
949 | { | |
950 | unsigned long f; | |
951 | ||
d5822035 JF |
952 | asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;" |
953 | PARAVIRT_CALL | |
954 | "popl %%edx; popl %%ecx") | |
955 | : "=a"(f) | |
956 | : paravirt_type(save_fl), | |
42c24fa2 | 957 | paravirt_clobber(CLBR_EAX) |
d5822035 | 958 | : "memory", "cc"); |
139ec7c4 RR |
959 | return f; |
960 | } | |
961 | ||
962 | static inline void raw_local_irq_restore(unsigned long f) | |
963 | { | |
d5822035 JF |
964 | asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;" |
965 | PARAVIRT_CALL | |
966 | "popl %%edx; popl %%ecx") | |
967 | : "=a"(f) | |
968 | : "0"(f), | |
969 | paravirt_type(restore_fl), | |
970 | paravirt_clobber(CLBR_EAX) | |
971 | : "memory", "cc"); | |
139ec7c4 RR |
972 | } |
973 | ||
974 | static inline void raw_local_irq_disable(void) | |
975 | { | |
d5822035 JF |
976 | asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;" |
977 | PARAVIRT_CALL | |
978 | "popl %%edx; popl %%ecx") | |
979 | : | |
980 | : paravirt_type(irq_disable), | |
981 | paravirt_clobber(CLBR_EAX) | |
982 | : "memory", "eax", "cc"); | |
139ec7c4 RR |
983 | } |
984 | ||
985 | static inline void raw_local_irq_enable(void) | |
986 | { | |
d5822035 JF |
987 | asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;" |
988 | PARAVIRT_CALL | |
989 | "popl %%edx; popl %%ecx") | |
990 | : | |
991 | : paravirt_type(irq_enable), | |
992 | paravirt_clobber(CLBR_EAX) | |
993 | : "memory", "eax", "cc"); | |
139ec7c4 RR |
994 | } |
995 | ||
996 | static inline unsigned long __raw_local_irq_save(void) | |
997 | { | |
998 | unsigned long f; | |
999 | ||
d5822035 JF |
1000 | f = __raw_local_save_flags(); |
1001 | raw_local_irq_disable(); | |
139ec7c4 RR |
1002 | return f; |
1003 | } | |
1004 | ||
d5822035 JF |
1005 | #define CLI_STRING \ |
1006 | _paravirt_alt("pushl %%ecx; pushl %%edx;" \ | |
1007 | "call *paravirt_ops+%c[paravirt_cli_type]*4;" \ | |
1008 | "popl %%edx; popl %%ecx", \ | |
1009 | "%c[paravirt_cli_type]", "%c[paravirt_clobber]") | |
1010 | ||
1011 | #define STI_STRING \ | |
1012 | _paravirt_alt("pushl %%ecx; pushl %%edx;" \ | |
1013 | "call *paravirt_ops+%c[paravirt_sti_type]*4;" \ | |
1014 | "popl %%edx; popl %%ecx", \ | |
1015 | "%c[paravirt_sti_type]", "%c[paravirt_clobber]") | |
139ec7c4 | 1016 | |
139ec7c4 | 1017 | #define CLI_STI_CLOBBERS , "%eax" |
d5822035 | 1018 | #define CLI_STI_INPUT_ARGS \ |
139ec7c4 | 1019 | , \ |
d5822035 JF |
1020 | [paravirt_cli_type] "i" (PARAVIRT_PATCH(irq_disable)), \ |
1021 | [paravirt_sti_type] "i" (PARAVIRT_PATCH(irq_enable)), \ | |
1022 | paravirt_clobber(CLBR_EAX) | |
1023 | ||
294688c0 | 1024 | /* Make sure as little as possible of this mess escapes. */ |
d5822035 | 1025 | #undef PARAVIRT_CALL |
1a45b7aa JF |
1026 | #undef __PVOP_CALL |
1027 | #undef __PVOP_VCALL | |
f8822f42 JF |
1028 | #undef PVOP_VCALL0 |
1029 | #undef PVOP_CALL0 | |
1030 | #undef PVOP_VCALL1 | |
1031 | #undef PVOP_CALL1 | |
1032 | #undef PVOP_VCALL2 | |
1033 | #undef PVOP_CALL2 | |
1034 | #undef PVOP_VCALL3 | |
1035 | #undef PVOP_CALL3 | |
1036 | #undef PVOP_VCALL4 | |
1037 | #undef PVOP_CALL4 | |
139ec7c4 | 1038 | |
d3561b7f RR |
1039 | #else /* __ASSEMBLY__ */ |
1040 | ||
d5822035 JF |
1041 | #define PARA_PATCH(off) ((off) / 4) |
1042 | ||
1043 | #define PARA_SITE(ptype, clobbers, ops) \ | |
139ec7c4 RR |
1044 | 771:; \ |
1045 | ops; \ | |
1046 | 772:; \ | |
1047 | .pushsection .parainstructions,"a"; \ | |
1048 | .long 771b; \ | |
1049 | .byte ptype; \ | |
1050 | .byte 772b-771b; \ | |
1051 | .short clobbers; \ | |
1052 | .popsection | |
1053 | ||
d5822035 | 1054 | #define INTERRUPT_RETURN \ |
42c24fa2 | 1055 | PARA_SITE(PARA_PATCH(PARAVIRT_iret), CLBR_NONE, \ |
d5822035 JF |
1056 | jmp *%cs:paravirt_ops+PARAVIRT_iret) |
1057 | ||
1058 | #define DISABLE_INTERRUPTS(clobbers) \ | |
1059 | PARA_SITE(PARA_PATCH(PARAVIRT_irq_disable), clobbers, \ | |
42c24fa2 | 1060 | pushl %eax; pushl %ecx; pushl %edx; \ |
d5822035 | 1061 | call *%cs:paravirt_ops+PARAVIRT_irq_disable; \ |
42c24fa2 | 1062 | popl %edx; popl %ecx; popl %eax) \ |
d5822035 JF |
1063 | |
1064 | #define ENABLE_INTERRUPTS(clobbers) \ | |
1065 | PARA_SITE(PARA_PATCH(PARAVIRT_irq_enable), clobbers, \ | |
42c24fa2 | 1066 | pushl %eax; pushl %ecx; pushl %edx; \ |
d5822035 | 1067 | call *%cs:paravirt_ops+PARAVIRT_irq_enable; \ |
42c24fa2 | 1068 | popl %edx; popl %ecx; popl %eax) |
d5822035 JF |
1069 | |
1070 | #define ENABLE_INTERRUPTS_SYSEXIT \ | |
42c24fa2 | 1071 | PARA_SITE(PARA_PATCH(PARAVIRT_irq_enable_sysexit), CLBR_NONE, \ |
d5822035 | 1072 | jmp *%cs:paravirt_ops+PARAVIRT_irq_enable_sysexit) |
139ec7c4 RR |
1073 | |
1074 | #define GET_CR0_INTO_EAX \ | |
42c24fa2 JF |
1075 | push %ecx; push %edx; \ |
1076 | call *paravirt_ops+PARAVIRT_read_cr0; \ | |
1077 | pop %edx; pop %ecx | |
139ec7c4 | 1078 | |
d3561b7f RR |
1079 | #endif /* __ASSEMBLY__ */ |
1080 | #endif /* CONFIG_PARAVIRT */ | |
1081 | #endif /* __ASM_PARAVIRT_H */ |