Allocate and free vmalloc areas
[linux-2.6-block.git] / include / asm-i386 / paravirt.h
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1#ifndef __ASM_PARAVIRT_H
2#define __ASM_PARAVIRT_H
3/* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
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5
6#ifdef CONFIG_PARAVIRT
da181a8b 7#include <asm/page.h>
d3561b7f 8
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9/* Bitmask of what can be clobbered: usually at least eax. */
10#define CLBR_NONE 0x0
11#define CLBR_EAX 0x1
12#define CLBR_ECX 0x2
13#define CLBR_EDX 0x4
14#define CLBR_ANY 0x7
15
d3561b7f 16#ifndef __ASSEMBLY__
3dc494e8 17#include <linux/types.h>
d4c10477 18#include <linux/cpumask.h>
ce6234b5 19#include <asm/kmap_types.h>
3dc494e8 20
ce6234b5 21struct page;
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22struct thread_struct;
23struct Xgt_desc_struct;
24struct tss_struct;
da181a8b 25struct mm_struct;
90a0a06a 26struct desc_struct;
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27
28/* Lazy mode for batching updates / context switch */
29enum paravirt_lazy_mode {
30 PARAVIRT_LAZY_NONE = 0,
31 PARAVIRT_LAZY_MMU = 1,
32 PARAVIRT_LAZY_CPU = 2,
4e0fa856 33 PARAVIRT_LAZY_FLUSH = 3,
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34};
35
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36struct paravirt_ops
37{
38 unsigned int kernel_rpl;
5311ab62 39 int shared_kernel_pmd;
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40 int paravirt_enabled;
41 const char *name;
42
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43 /*
44 * Patch may replace one of the defined code sequences with arbitrary
45 * code, subject to the same register constraints. This generally
46 * means the code is not free to clobber any registers other than EAX.
47 * The patch function should return the number of bytes of code
48 * generated, as we nop pad the rest in generic code.
49 */
50 unsigned (*patch)(u8 type, u16 clobber, void *firstinsn, unsigned len);
51
294688c0 52 /* Basic arch-specific setup */
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53 void (*arch_setup)(void);
54 char *(*memory_setup)(void);
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55 void (*post_allocator_init)(void);
56
d3561b7f 57 void (*init_IRQ)(void);
294688c0 58 void (*time_init)(void);
d3561b7f 59
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60 /*
61 * Called before/after init_mm pagetable setup. setup_start
62 * may reset %cr3, and may pre-install parts of the pagetable;
63 * pagetable setup is expected to preserve any existing
64 * mapping.
65 */
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66 void (*pagetable_setup_start)(pgd_t *pgd_base);
67 void (*pagetable_setup_done)(pgd_t *pgd_base);
68
294688c0 69 /* Print a banner to identify the environment */
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70 void (*banner)(void);
71
294688c0 72 /* Set and set time of day */
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73 unsigned long (*get_wallclock)(void);
74 int (*set_wallclock)(unsigned long);
d3561b7f 75
294688c0 76 /* cpuid emulation, mostly so that caps bits can be disabled */
1a1eecd1 77 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
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78 unsigned int *ecx, unsigned int *edx);
79
294688c0 80 /* hooks for various privileged instructions */
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81 unsigned long (*get_debugreg)(int regno);
82 void (*set_debugreg)(int regno, unsigned long value);
d3561b7f 83
1a1eecd1 84 void (*clts)(void);
d3561b7f 85
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86 unsigned long (*read_cr0)(void);
87 void (*write_cr0)(unsigned long);
d3561b7f 88
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89 unsigned long (*read_cr2)(void);
90 void (*write_cr2)(unsigned long);
d3561b7f 91
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92 unsigned long (*read_cr3)(void);
93 void (*write_cr3)(unsigned long);
d3561b7f 94
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95 unsigned long (*read_cr4_safe)(void);
96 unsigned long (*read_cr4)(void);
97 void (*write_cr4)(unsigned long);
d3561b7f 98
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99 /*
100 * Get/set interrupt state. save_fl and restore_fl are only
101 * expected to use X86_EFLAGS_IF; all other bits
102 * returned from save_fl are undefined, and may be ignored by
103 * restore_fl.
104 */
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105 unsigned long (*save_fl)(void);
106 void (*restore_fl)(unsigned long);
107 void (*irq_disable)(void);
108 void (*irq_enable)(void);
109 void (*safe_halt)(void);
110 void (*halt)(void);
294688c0 111
1a1eecd1 112 void (*wbinvd)(void);
d3561b7f 113
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114 /* MSR, PMC and TSR operations.
115 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
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116 u64 (*read_msr)(unsigned int msr, int *err);
117 int (*write_msr)(unsigned int msr, u64 val);
118
119 u64 (*read_tsc)(void);
120 u64 (*read_pmc)(void);
6cb9a835 121 u64 (*get_scheduled_cycles)(void);
1182d852 122 unsigned long (*get_cpu_khz)(void);
1a1eecd1 123
294688c0 124 /* Segment descriptor handling */
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125 void (*load_tr_desc)(void);
126 void (*load_gdt)(const struct Xgt_desc_struct *);
127 void (*load_idt)(const struct Xgt_desc_struct *);
128 void (*store_gdt)(struct Xgt_desc_struct *);
129 void (*store_idt)(struct Xgt_desc_struct *);
130 void (*set_ldt)(const void *desc, unsigned entries);
131 unsigned long (*store_tr)(void);
132 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
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133 void (*write_ldt_entry)(struct desc_struct *,
134 int entrynum, u32 low, u32 high);
135 void (*write_gdt_entry)(struct desc_struct *,
136 int entrynum, u32 low, u32 high);
137 void (*write_idt_entry)(struct desc_struct *,
138 int entrynum, u32 low, u32 high);
139 void (*load_esp0)(struct tss_struct *tss, struct thread_struct *t);
d3561b7f 140
1a1eecd1 141 void (*set_iopl_mask)(unsigned mask);
1a1eecd1 142 void (*io_delay)(void);
d3561b7f 143
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144 /*
145 * Hooks for intercepting the creation/use/destruction of an
146 * mm_struct.
147 */
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148 void (*activate_mm)(struct mm_struct *prev,
149 struct mm_struct *next);
150 void (*dup_mmap)(struct mm_struct *oldmm,
151 struct mm_struct *mm);
152 void (*exit_mmap)(struct mm_struct *mm);
153
13623d79 154#ifdef CONFIG_X86_LOCAL_APIC
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155 /*
156 * Direct APIC operations, principally for VMI. Ideally
157 * these shouldn't be in this interface.
158 */
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159 void (*apic_write)(unsigned long reg, unsigned long v);
160 void (*apic_write_atomic)(unsigned long reg, unsigned long v);
161 unsigned long (*apic_read)(unsigned long reg);
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162 void (*setup_boot_clock)(void);
163 void (*setup_secondary_clock)(void);
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164
165 void (*startup_ipi_hook)(int phys_apicid,
166 unsigned long start_eip,
167 unsigned long start_esp);
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168#endif
169
294688c0 170 /* TLB operations */
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171 void (*flush_tlb_user)(void);
172 void (*flush_tlb_kernel)(void);
f8822f42 173 void (*flush_tlb_single)(unsigned long addr);
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174 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
175 unsigned long va);
1a1eecd1 176
294688c0 177 /* Hooks for allocating/releasing pagetable pages */
fdb4c338 178 void (*alloc_pt)(struct mm_struct *mm, u32 pfn);
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179 void (*alloc_pd)(u32 pfn);
180 void (*alloc_pd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
181 void (*release_pt)(u32 pfn);
182 void (*release_pd)(u32 pfn);
183
294688c0 184 /* Pagetable manipulation functions */
1a1eecd1 185 void (*set_pte)(pte_t *ptep, pte_t pteval);
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186 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
187 pte_t *ptep, pte_t pteval);
1a1eecd1 188 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
3dc494e8 189 void (*pte_update)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
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190 void (*pte_update_defer)(struct mm_struct *mm,
191 unsigned long addr, pte_t *ptep);
3dc494e8 192
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193#ifdef CONFIG_HIGHPTE
194 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
195#endif
196
da181a8b 197#ifdef CONFIG_X86_PAE
1a1eecd1 198 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
3dc494e8 199 void (*set_pte_present)(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte);
1a1eecd1 200 void (*set_pud)(pud_t *pudp, pud_t pudval);
3dc494e8 201 void (*pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
1a1eecd1 202 void (*pmd_clear)(pmd_t *pmdp);
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203
204 unsigned long long (*pte_val)(pte_t);
205 unsigned long long (*pmd_val)(pmd_t);
206 unsigned long long (*pgd_val)(pgd_t);
207
208 pte_t (*make_pte)(unsigned long long pte);
209 pmd_t (*make_pmd)(unsigned long long pmd);
210 pgd_t (*make_pgd)(unsigned long long pgd);
211#else
212 unsigned long (*pte_val)(pte_t);
213 unsigned long (*pgd_val)(pgd_t);
214
215 pte_t (*make_pte)(unsigned long pte);
216 pgd_t (*make_pgd)(unsigned long pgd);
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217#endif
218
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219 /* Set deferred update mode, used for batching operations. */
220 void (*set_lazy_mode)(enum paravirt_lazy_mode mode);
9226d125 221
d3561b7f 222 /* These two are jmp to, not actually called. */
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223 void (*irq_enable_sysexit)(void);
224 void (*iret)(void);
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225};
226
227extern struct paravirt_ops paravirt_ops;
228
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229#define PARAVIRT_PATCH(x) \
230 (offsetof(struct paravirt_ops, x) / sizeof(void *))
231
232#define paravirt_type(type) \
233 [paravirt_typenum] "i" (PARAVIRT_PATCH(type))
234#define paravirt_clobber(clobber) \
235 [paravirt_clobber] "i" (clobber)
236
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237/*
238 * Generate some code, and mark it as patchable by the
239 * apply_paravirt() alternate instruction patcher.
240 */
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241#define _paravirt_alt(insn_string, type, clobber) \
242 "771:\n\t" insn_string "\n" "772:\n" \
243 ".pushsection .parainstructions,\"a\"\n" \
244 " .long 771b\n" \
245 " .byte " type "\n" \
246 " .byte 772b-771b\n" \
247 " .short " clobber "\n" \
248 ".popsection\n"
249
294688c0 250/* Generate patchable code, with the default asm parameters. */
f8822f42 251#define paravirt_alt(insn_string) \
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252 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
253
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254unsigned paravirt_patch_nop(void);
255unsigned paravirt_patch_ignore(unsigned len);
256unsigned paravirt_patch_call(void *target, u16 tgt_clobbers,
257 void *site, u16 site_clobbers,
258 unsigned len);
259unsigned paravirt_patch_jmp(void *target, void *site, unsigned len);
260unsigned paravirt_patch_default(u8 type, u16 clobbers, void *site, unsigned len);
261
262unsigned paravirt_patch_insns(void *site, unsigned len,
263 const char *start, const char *end);
264
265
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266/*
267 * This generates an indirect call based on the operation type number.
268 * The type number, computed in PARAVIRT_PATCH, is derived from the
269 * offset into the paravirt_ops structure, and can therefore be freely
270 * converted back into a structure offset.
271 */
272#define PARAVIRT_CALL "call *(paravirt_ops+%c[paravirt_typenum]*4);"
273
274/*
275 * These macros are intended to wrap calls into a paravirt_ops
276 * operation, so that they can be later identified and patched at
277 * runtime.
278 *
279 * Normally, a call to a pv_op function is a simple indirect call:
280 * (paravirt_ops.operations)(args...).
281 *
282 * Unfortunately, this is a relatively slow operation for modern CPUs,
283 * because it cannot necessarily determine what the destination
284 * address is. In this case, the address is a runtime constant, so at
285 * the very least we can patch the call to e a simple direct call, or
286 * ideally, patch an inline implementation into the callsite. (Direct
287 * calls are essentially free, because the call and return addresses
288 * are completely predictable.)
289 *
290 * These macros rely on the standard gcc "regparm(3)" calling
291 * convention, in which the first three arguments are placed in %eax,
292 * %edx, %ecx (in that order), and the remaining arguments are placed
293 * on the stack. All caller-save registers (eax,edx,ecx) are expected
294 * to be modified (either clobbered or used for return values).
295 *
296 * The call instruction itself is marked by placing its start address
297 * and size into the .parainstructions section, so that
298 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
299 * appropriate patching under the control of the backend paravirt_ops
300 * implementation.
301 *
302 * Unfortunately there's no way to get gcc to generate the args setup
303 * for the call, and then allow the call itself to be generated by an
304 * inline asm. Because of this, we must do the complete arg setup and
305 * return value handling from within these macros. This is fairly
306 * cumbersome.
307 *
308 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
309 * It could be extended to more arguments, but there would be little
310 * to be gained from that. For each number of arguments, there are
311 * the two VCALL and CALL variants for void and non-void functions.
312 *
313 * When there is a return value, the invoker of the macro must specify
314 * the return type. The macro then uses sizeof() on that type to
315 * determine whether its a 32 or 64 bit value, and places the return
316 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
317 * 64-bit).
318 *
319 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
320 * in low,high order.
321 *
322 * Small structures are passed and returned in registers. The macro
323 * calling convention can't directly deal with this, so the wrapper
324 * functions must do this.
325 *
326 * These PVOP_* macros are only defined within this header. This
327 * means that all uses must be wrapped in inline functions. This also
328 * makes sure the incoming and outgoing types are always correct.
329 */
1a45b7aa 330#define __PVOP_CALL(rettype, op, pre, post, ...) \
f8822f42 331 ({ \
1a45b7aa 332 rettype __ret; \
f8822f42 333 unsigned long __eax, __edx, __ecx; \
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334 if (sizeof(rettype) > sizeof(unsigned long)) { \
335 asm volatile(pre \
336 paravirt_alt(PARAVIRT_CALL) \
337 post \
338 : "=a" (__eax), "=d" (__edx), \
f8822f42 339 "=c" (__ecx) \
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340 : paravirt_type(op), \
341 paravirt_clobber(CLBR_ANY), \
342 ##__VA_ARGS__ \
f8822f42 343 : "memory", "cc"); \
1a45b7aa 344 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
f8822f42 345 } else { \
1a45b7aa 346 asm volatile(pre \
f8822f42 347 paravirt_alt(PARAVIRT_CALL) \
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348 post \
349 : "=a" (__eax), "=d" (__edx), \
350 "=c" (__ecx) \
351 : paravirt_type(op), \
352 paravirt_clobber(CLBR_ANY), \
353 ##__VA_ARGS__ \
f8822f42 354 : "memory", "cc"); \
1a45b7aa 355 __ret = (rettype)__eax; \
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356 } \
357 __ret; \
358 })
1a45b7aa 359#define __PVOP_VCALL(op, pre, post, ...) \
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360 ({ \
361 unsigned long __eax, __edx, __ecx; \
1a45b7aa 362 asm volatile(pre \
f8822f42 363 paravirt_alt(PARAVIRT_CALL) \
1a45b7aa 364 post \
f8822f42 365 : "=a" (__eax), "=d" (__edx), "=c" (__ecx) \
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366 : paravirt_type(op), \
367 paravirt_clobber(CLBR_ANY), \
368 ##__VA_ARGS__ \
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369 : "memory", "cc"); \
370 })
371
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372#define PVOP_CALL0(rettype, op) \
373 __PVOP_CALL(rettype, op, "", "")
374#define PVOP_VCALL0(op) \
375 __PVOP_VCALL(op, "", "")
376
377#define PVOP_CALL1(rettype, op, arg1) \
378 __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)))
379#define PVOP_VCALL1(op, arg1) \
380 __PVOP_VCALL(op, "", "", "0" ((u32)(arg1)))
381
382#define PVOP_CALL2(rettype, op, arg1, arg2) \
383 __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)), "1" ((u32)(arg2)))
384#define PVOP_VCALL2(op, arg1, arg2) \
385 __PVOP_VCALL(op, "", "", "0" ((u32)(arg1)), "1" ((u32)(arg2)))
386
387#define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
388 __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)), \
389 "1"((u32)(arg2)), "2"((u32)(arg3)))
390#define PVOP_VCALL3(op, arg1, arg2, arg3) \
391 __PVOP_VCALL(op, "", "", "0" ((u32)(arg1)), "1"((u32)(arg2)), \
392 "2"((u32)(arg3)))
393
394#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
395 __PVOP_CALL(rettype, op, \
396 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
397 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
398 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
399#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
400 __PVOP_VCALL(op, \
401 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
402 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
403 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
404
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405static inline int paravirt_enabled(void)
406{
407 return paravirt_ops.paravirt_enabled;
408}
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409
410static inline void load_esp0(struct tss_struct *tss,
411 struct thread_struct *thread)
412{
f8822f42 413 PVOP_VCALL2(load_esp0, tss, thread);
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414}
415
416#define ARCH_SETUP paravirt_ops.arch_setup();
417static inline unsigned long get_wallclock(void)
418{
f8822f42 419 return PVOP_CALL0(unsigned long, get_wallclock);
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420}
421
422static inline int set_wallclock(unsigned long nowtime)
423{
f8822f42 424 return PVOP_CALL1(int, set_wallclock, nowtime);
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425}
426
e30fab3a 427static inline void (*choose_time_init(void))(void)
d3561b7f 428{
e30fab3a 429 return paravirt_ops.time_init;
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430}
431
432/* The paravirtualized CPUID instruction. */
433static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
434 unsigned int *ecx, unsigned int *edx)
435{
f8822f42 436 PVOP_VCALL4(cpuid, eax, ebx, ecx, edx);
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437}
438
439/*
440 * These special macros can be used to get or set a debugging register
441 */
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442static inline unsigned long paravirt_get_debugreg(int reg)
443{
444 return PVOP_CALL1(unsigned long, get_debugreg, reg);
445}
446#define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
447static inline void set_debugreg(unsigned long val, int reg)
448{
449 PVOP_VCALL2(set_debugreg, reg, val);
450}
d3561b7f 451
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452static inline void clts(void)
453{
454 PVOP_VCALL0(clts);
455}
d3561b7f 456
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457static inline unsigned long read_cr0(void)
458{
459 return PVOP_CALL0(unsigned long, read_cr0);
460}
d3561b7f 461
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462static inline void write_cr0(unsigned long x)
463{
464 PVOP_VCALL1(write_cr0, x);
465}
466
467static inline unsigned long read_cr2(void)
468{
469 return PVOP_CALL0(unsigned long, read_cr2);
470}
471
472static inline void write_cr2(unsigned long x)
473{
474 PVOP_VCALL1(write_cr2, x);
475}
476
477static inline unsigned long read_cr3(void)
478{
479 return PVOP_CALL0(unsigned long, read_cr3);
480}
d3561b7f 481
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482static inline void write_cr3(unsigned long x)
483{
484 PVOP_VCALL1(write_cr3, x);
485}
d3561b7f 486
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487static inline unsigned long read_cr4(void)
488{
489 return PVOP_CALL0(unsigned long, read_cr4);
490}
491static inline unsigned long read_cr4_safe(void)
492{
493 return PVOP_CALL0(unsigned long, read_cr4_safe);
494}
d3561b7f 495
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496static inline void write_cr4(unsigned long x)
497{
498 PVOP_VCALL1(write_cr4, x);
499}
3dc494e8 500
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501static inline void raw_safe_halt(void)
502{
f8822f42 503 PVOP_VCALL0(safe_halt);
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504}
505
506static inline void halt(void)
507{
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508 PVOP_VCALL0(safe_halt);
509}
510
511static inline void wbinvd(void)
512{
513 PVOP_VCALL0(wbinvd);
d3561b7f 514}
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515
516#define get_kernel_rpl() (paravirt_ops.kernel_rpl)
517
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518static inline u64 paravirt_read_msr(unsigned msr, int *err)
519{
520 return PVOP_CALL2(u64, read_msr, msr, err);
521}
522static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
523{
524 return PVOP_CALL3(int, write_msr, msr, low, high);
525}
526
90a0a06a 527/* These should all do BUG_ON(_err), but our headers are too tangled. */
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528#define rdmsr(msr,val1,val2) do { \
529 int _err; \
530 u64 _l = paravirt_read_msr(msr, &_err); \
531 val1 = (u32)_l; \
532 val2 = _l >> 32; \
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533} while(0)
534
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535#define wrmsr(msr,val1,val2) do { \
536 paravirt_write_msr(msr, val1, val2); \
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537} while(0)
538
f8822f42
JF
539#define rdmsrl(msr,val) do { \
540 int _err; \
541 val = paravirt_read_msr(msr, &_err); \
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RR
542} while(0)
543
b9e3614f 544#define wrmsrl(msr,val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
f8822f42 545#define wrmsr_safe(msr,a,b) paravirt_write_msr(msr, a, b)
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RR
546
547/* rdmsr with exception handling */
f8822f42
JF
548#define rdmsr_safe(msr,a,b) ({ \
549 int _err; \
550 u64 _l = paravirt_read_msr(msr, &_err); \
551 (*a) = (u32)_l; \
552 (*b) = _l >> 32; \
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RR
553 _err; })
554
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JF
555
556static inline u64 paravirt_read_tsc(void)
557{
558 return PVOP_CALL0(u64, read_tsc);
559}
d3561b7f 560
f8822f42
JF
561#define rdtscl(low) do { \
562 u64 _l = paravirt_read_tsc(); \
563 low = (int)_l; \
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RR
564} while(0)
565
f8822f42 566#define rdtscll(val) (val = paravirt_read_tsc())
d3561b7f 567
6cb9a835 568#define get_scheduled_cycles(val) (val = paravirt_ops.get_scheduled_cycles())
1182d852 569#define calculate_cpu_khz() (paravirt_ops.get_cpu_khz())
6cb9a835 570
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571#define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
572
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573static inline unsigned long long paravirt_read_pmc(int counter)
574{
575 return PVOP_CALL1(u64, read_pmc, counter);
576}
d3561b7f 577
f8822f42
JF
578#define rdpmc(counter,low,high) do { \
579 u64 _l = paravirt_read_pmc(counter); \
580 low = (u32)_l; \
581 high = _l >> 32; \
582} while(0)
3dc494e8 583
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JF
584static inline void load_TR_desc(void)
585{
586 PVOP_VCALL0(load_tr_desc);
587}
588static inline void load_gdt(const struct Xgt_desc_struct *dtr)
589{
590 PVOP_VCALL1(load_gdt, dtr);
591}
592static inline void load_idt(const struct Xgt_desc_struct *dtr)
593{
594 PVOP_VCALL1(load_idt, dtr);
595}
596static inline void set_ldt(const void *addr, unsigned entries)
597{
598 PVOP_VCALL2(set_ldt, addr, entries);
599}
600static inline void store_gdt(struct Xgt_desc_struct *dtr)
601{
602 PVOP_VCALL1(store_gdt, dtr);
603}
604static inline void store_idt(struct Xgt_desc_struct *dtr)
605{
606 PVOP_VCALL1(store_idt, dtr);
607}
608static inline unsigned long paravirt_store_tr(void)
609{
610 return PVOP_CALL0(unsigned long, store_tr);
611}
612#define store_tr(tr) ((tr) = paravirt_store_tr())
613static inline void load_TLS(struct thread_struct *t, unsigned cpu)
614{
615 PVOP_VCALL2(load_tls, t, cpu);
616}
617static inline void write_ldt_entry(void *dt, int entry, u32 low, u32 high)
618{
619 PVOP_VCALL4(write_ldt_entry, dt, entry, low, high);
620}
621static inline void write_gdt_entry(void *dt, int entry, u32 low, u32 high)
622{
623 PVOP_VCALL4(write_gdt_entry, dt, entry, low, high);
624}
625static inline void write_idt_entry(void *dt, int entry, u32 low, u32 high)
626{
627 PVOP_VCALL4(write_idt_entry, dt, entry, low, high);
628}
629static inline void set_iopl_mask(unsigned mask)
630{
631 PVOP_VCALL1(set_iopl_mask, mask);
632}
3dc494e8 633
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634/* The paravirtualized I/O functions */
635static inline void slow_down_io(void) {
636 paravirt_ops.io_delay();
637#ifdef REALLY_SLOW_IO
638 paravirt_ops.io_delay();
639 paravirt_ops.io_delay();
640 paravirt_ops.io_delay();
641#endif
642}
643
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644#ifdef CONFIG_X86_LOCAL_APIC
645/*
646 * Basic functions accessing APICs.
647 */
648static inline void apic_write(unsigned long reg, unsigned long v)
649{
f8822f42 650 PVOP_VCALL2(apic_write, reg, v);
13623d79
RR
651}
652
653static inline void apic_write_atomic(unsigned long reg, unsigned long v)
654{
f8822f42 655 PVOP_VCALL2(apic_write_atomic, reg, v);
13623d79
RR
656}
657
658static inline unsigned long apic_read(unsigned long reg)
659{
f8822f42 660 return PVOP_CALL1(unsigned long, apic_read, reg);
13623d79 661}
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ZA
662
663static inline void setup_boot_clock(void)
664{
f8822f42 665 PVOP_VCALL0(setup_boot_clock);
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ZA
666}
667
668static inline void setup_secondary_clock(void)
669{
f8822f42 670 PVOP_VCALL0(setup_secondary_clock);
bbab4f3b 671}
13623d79
RR
672#endif
673
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JF
674static inline void paravirt_post_allocator_init(void)
675{
676 if (paravirt_ops.post_allocator_init)
677 (*paravirt_ops.post_allocator_init)();
678}
679
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JF
680static inline void paravirt_pagetable_setup_start(pgd_t *base)
681{
682 if (paravirt_ops.pagetable_setup_start)
683 (*paravirt_ops.pagetable_setup_start)(base);
684}
685
686static inline void paravirt_pagetable_setup_done(pgd_t *base)
687{
688 if (paravirt_ops.pagetable_setup_done)
689 (*paravirt_ops.pagetable_setup_done)(base);
690}
3dc494e8 691
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692#ifdef CONFIG_SMP
693static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
694 unsigned long start_esp)
695{
f8822f42 696 PVOP_VCALL3(startup_ipi_hook, phys_apicid, start_eip, start_esp);
ae5da273
ZA
697}
698#endif
13623d79 699
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JF
700static inline void paravirt_activate_mm(struct mm_struct *prev,
701 struct mm_struct *next)
702{
f8822f42 703 PVOP_VCALL2(activate_mm, prev, next);
d6dd61c8
JF
704}
705
706static inline void arch_dup_mmap(struct mm_struct *oldmm,
707 struct mm_struct *mm)
708{
f8822f42 709 PVOP_VCALL2(dup_mmap, oldmm, mm);
d6dd61c8
JF
710}
711
712static inline void arch_exit_mmap(struct mm_struct *mm)
713{
f8822f42 714 PVOP_VCALL1(exit_mmap, mm);
d6dd61c8
JF
715}
716
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JF
717static inline void __flush_tlb(void)
718{
719 PVOP_VCALL0(flush_tlb_user);
720}
721static inline void __flush_tlb_global(void)
722{
723 PVOP_VCALL0(flush_tlb_kernel);
724}
725static inline void __flush_tlb_single(unsigned long addr)
726{
727 PVOP_VCALL1(flush_tlb_single, addr);
728}
da181a8b 729
d4c10477
JF
730static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
731 unsigned long va)
732{
733 PVOP_VCALL3(flush_tlb_others, &cpumask, mm, va);
734}
735
fdb4c338 736static inline void paravirt_alloc_pt(struct mm_struct *mm, unsigned pfn)
f8822f42 737{
fdb4c338 738 PVOP_VCALL2(alloc_pt, mm, pfn);
f8822f42
JF
739}
740static inline void paravirt_release_pt(unsigned pfn)
741{
742 PVOP_VCALL1(release_pt, pfn);
743}
c119ecce 744
f8822f42
JF
745static inline void paravirt_alloc_pd(unsigned pfn)
746{
747 PVOP_VCALL1(alloc_pd, pfn);
748}
c119ecce 749
f8822f42
JF
750static inline void paravirt_alloc_pd_clone(unsigned pfn, unsigned clonepfn,
751 unsigned start, unsigned count)
752{
753 PVOP_VCALL4(alloc_pd_clone, pfn, clonepfn, start, count);
754}
755static inline void paravirt_release_pd(unsigned pfn)
da181a8b 756{
f8822f42 757 PVOP_VCALL1(release_pd, pfn);
da181a8b
RR
758}
759
ce6234b5
JF
760#ifdef CONFIG_HIGHPTE
761static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
762{
763 unsigned long ret;
764 ret = PVOP_CALL2(unsigned long, kmap_atomic_pte, page, type);
765 return (void *)ret;
766}
767#endif
768
f8822f42
JF
769static inline void pte_update(struct mm_struct *mm, unsigned long addr,
770 pte_t *ptep)
da181a8b 771{
f8822f42 772 PVOP_VCALL3(pte_update, mm, addr, ptep);
da181a8b
RR
773}
774
f8822f42
JF
775static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
776 pte_t *ptep)
da181a8b 777{
f8822f42 778 PVOP_VCALL3(pte_update_defer, mm, addr, ptep);
da181a8b
RR
779}
780
f8822f42
JF
781#ifdef CONFIG_X86_PAE
782static inline pte_t __pte(unsigned long long val)
da181a8b 783{
f8822f42
JF
784 unsigned long long ret = PVOP_CALL2(unsigned long long, make_pte,
785 val, val >> 32);
786 return (pte_t) { ret, ret >> 32 };
da181a8b
RR
787}
788
f8822f42 789static inline pmd_t __pmd(unsigned long long val)
da181a8b 790{
f8822f42
JF
791 return (pmd_t) { PVOP_CALL2(unsigned long long, make_pmd, val, val >> 32) };
792}
793
794static inline pgd_t __pgd(unsigned long long val)
795{
796 return (pgd_t) { PVOP_CALL2(unsigned long long, make_pgd, val, val >> 32) };
797}
798
799static inline unsigned long long pte_val(pte_t x)
800{
801 return PVOP_CALL2(unsigned long long, pte_val, x.pte_low, x.pte_high);
802}
803
804static inline unsigned long long pmd_val(pmd_t x)
805{
806 return PVOP_CALL2(unsigned long long, pmd_val, x.pmd, x.pmd >> 32);
807}
808
809static inline unsigned long long pgd_val(pgd_t x)
810{
811 return PVOP_CALL2(unsigned long long, pgd_val, x.pgd, x.pgd >> 32);
812}
813
814static inline void set_pte(pte_t *ptep, pte_t pteval)
815{
816 PVOP_VCALL3(set_pte, ptep, pteval.pte_low, pteval.pte_high);
817}
818
819static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
820 pte_t *ptep, pte_t pteval)
821{
822 /* 5 arg words */
823 paravirt_ops.set_pte_at(mm, addr, ptep, pteval);
da181a8b
RR
824}
825
da181a8b
RR
826static inline void set_pte_atomic(pte_t *ptep, pte_t pteval)
827{
f8822f42 828 PVOP_VCALL3(set_pte_atomic, ptep, pteval.pte_low, pteval.pte_high);
da181a8b
RR
829}
830
f8822f42
JF
831static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
832 pte_t *ptep, pte_t pte)
da181a8b 833{
f8822f42 834 /* 5 arg words */
da181a8b
RR
835 paravirt_ops.set_pte_present(mm, addr, ptep, pte);
836}
837
f8822f42
JF
838static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
839{
840 PVOP_VCALL3(set_pmd, pmdp, pmdval.pmd, pmdval.pmd >> 32);
841}
842
da181a8b
RR
843static inline void set_pud(pud_t *pudp, pud_t pudval)
844{
f8822f42 845 PVOP_VCALL3(set_pud, pudp, pudval.pgd.pgd, pudval.pgd.pgd >> 32);
da181a8b
RR
846}
847
848static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
849{
f8822f42 850 PVOP_VCALL3(pte_clear, mm, addr, ptep);
da181a8b
RR
851}
852
853static inline void pmd_clear(pmd_t *pmdp)
854{
f8822f42
JF
855 PVOP_VCALL1(pmd_clear, pmdp);
856}
857
f8822f42 858#else /* !CONFIG_X86_PAE */
4cdd9c89 859
f8822f42
JF
860static inline pte_t __pte(unsigned long val)
861{
862 return (pte_t) { PVOP_CALL1(unsigned long, make_pte, val) };
da181a8b 863}
f8822f42
JF
864
865static inline pgd_t __pgd(unsigned long val)
866{
867 return (pgd_t) { PVOP_CALL1(unsigned long, make_pgd, val) };
868}
869
870static inline unsigned long pte_val(pte_t x)
871{
872 return PVOP_CALL1(unsigned long, pte_val, x.pte_low);
873}
874
875static inline unsigned long pgd_val(pgd_t x)
876{
877 return PVOP_CALL1(unsigned long, pgd_val, x.pgd);
878}
879
880static inline void set_pte(pte_t *ptep, pte_t pteval)
881{
882 PVOP_VCALL2(set_pte, ptep, pteval.pte_low);
883}
884
885static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
886 pte_t *ptep, pte_t pteval)
887{
888 PVOP_VCALL4(set_pte_at, mm, addr, ptep, pteval.pte_low);
889}
890
891static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
892{
893 PVOP_VCALL2(set_pmd, pmdp, pmdval.pud.pgd.pgd);
894}
f8822f42 895#endif /* CONFIG_X86_PAE */
da181a8b 896
9226d125 897#define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
f8822f42
JF
898static inline void arch_enter_lazy_cpu_mode(void)
899{
900 PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_CPU);
901}
902
903static inline void arch_leave_lazy_cpu_mode(void)
904{
905 PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_NONE);
906}
907
908static inline void arch_flush_lazy_cpu_mode(void)
909{
910 PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_FLUSH);
911}
912
9226d125
ZA
913
914#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
f8822f42
JF
915static inline void arch_enter_lazy_mmu_mode(void)
916{
917 PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_MMU);
918}
919
920static inline void arch_leave_lazy_mmu_mode(void)
921{
922 PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_NONE);
923}
924
925static inline void arch_flush_lazy_mmu_mode(void)
926{
927 PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_FLUSH);
928}
9226d125 929
45876233
JF
930void _paravirt_nop(void);
931#define paravirt_nop ((void *)_paravirt_nop)
932
139ec7c4 933/* These all sit in the .parainstructions section to tell us what to patch. */
98de032b 934struct paravirt_patch_site {
139ec7c4
RR
935 u8 *instr; /* original instructions */
936 u8 instrtype; /* type of this instruction */
937 u8 len; /* length of original instruction */
938 u16 clobbers; /* what registers you may clobber */
939};
940
98de032b
JF
941extern struct paravirt_patch_site __parainstructions[],
942 __parainstructions_end[];
943
139ec7c4
RR
944static inline unsigned long __raw_local_save_flags(void)
945{
946 unsigned long f;
947
d5822035
JF
948 asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
949 PARAVIRT_CALL
950 "popl %%edx; popl %%ecx")
951 : "=a"(f)
952 : paravirt_type(save_fl),
42c24fa2 953 paravirt_clobber(CLBR_EAX)
d5822035 954 : "memory", "cc");
139ec7c4
RR
955 return f;
956}
957
958static inline void raw_local_irq_restore(unsigned long f)
959{
d5822035
JF
960 asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
961 PARAVIRT_CALL
962 "popl %%edx; popl %%ecx")
963 : "=a"(f)
964 : "0"(f),
965 paravirt_type(restore_fl),
966 paravirt_clobber(CLBR_EAX)
967 : "memory", "cc");
139ec7c4
RR
968}
969
970static inline void raw_local_irq_disable(void)
971{
d5822035
JF
972 asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
973 PARAVIRT_CALL
974 "popl %%edx; popl %%ecx")
975 :
976 : paravirt_type(irq_disable),
977 paravirt_clobber(CLBR_EAX)
978 : "memory", "eax", "cc");
139ec7c4
RR
979}
980
981static inline void raw_local_irq_enable(void)
982{
d5822035
JF
983 asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
984 PARAVIRT_CALL
985 "popl %%edx; popl %%ecx")
986 :
987 : paravirt_type(irq_enable),
988 paravirt_clobber(CLBR_EAX)
989 : "memory", "eax", "cc");
139ec7c4
RR
990}
991
992static inline unsigned long __raw_local_irq_save(void)
993{
994 unsigned long f;
995
d5822035
JF
996 f = __raw_local_save_flags();
997 raw_local_irq_disable();
139ec7c4
RR
998 return f;
999}
1000
d5822035
JF
1001#define CLI_STRING \
1002 _paravirt_alt("pushl %%ecx; pushl %%edx;" \
1003 "call *paravirt_ops+%c[paravirt_cli_type]*4;" \
1004 "popl %%edx; popl %%ecx", \
1005 "%c[paravirt_cli_type]", "%c[paravirt_clobber]")
1006
1007#define STI_STRING \
1008 _paravirt_alt("pushl %%ecx; pushl %%edx;" \
1009 "call *paravirt_ops+%c[paravirt_sti_type]*4;" \
1010 "popl %%edx; popl %%ecx", \
1011 "%c[paravirt_sti_type]", "%c[paravirt_clobber]")
139ec7c4 1012
139ec7c4 1013#define CLI_STI_CLOBBERS , "%eax"
d5822035 1014#define CLI_STI_INPUT_ARGS \
139ec7c4 1015 , \
d5822035
JF
1016 [paravirt_cli_type] "i" (PARAVIRT_PATCH(irq_disable)), \
1017 [paravirt_sti_type] "i" (PARAVIRT_PATCH(irq_enable)), \
1018 paravirt_clobber(CLBR_EAX)
1019
294688c0 1020/* Make sure as little as possible of this mess escapes. */
d5822035 1021#undef PARAVIRT_CALL
1a45b7aa
JF
1022#undef __PVOP_CALL
1023#undef __PVOP_VCALL
f8822f42
JF
1024#undef PVOP_VCALL0
1025#undef PVOP_CALL0
1026#undef PVOP_VCALL1
1027#undef PVOP_CALL1
1028#undef PVOP_VCALL2
1029#undef PVOP_CALL2
1030#undef PVOP_VCALL3
1031#undef PVOP_CALL3
1032#undef PVOP_VCALL4
1033#undef PVOP_CALL4
139ec7c4 1034
d3561b7f
RR
1035#else /* __ASSEMBLY__ */
1036
d5822035
JF
1037#define PARA_PATCH(off) ((off) / 4)
1038
1039#define PARA_SITE(ptype, clobbers, ops) \
139ec7c4
RR
1040771:; \
1041 ops; \
1042772:; \
1043 .pushsection .parainstructions,"a"; \
1044 .long 771b; \
1045 .byte ptype; \
1046 .byte 772b-771b; \
1047 .short clobbers; \
1048 .popsection
1049
d5822035 1050#define INTERRUPT_RETURN \
42c24fa2 1051 PARA_SITE(PARA_PATCH(PARAVIRT_iret), CLBR_NONE, \
d5822035
JF
1052 jmp *%cs:paravirt_ops+PARAVIRT_iret)
1053
1054#define DISABLE_INTERRUPTS(clobbers) \
1055 PARA_SITE(PARA_PATCH(PARAVIRT_irq_disable), clobbers, \
42c24fa2 1056 pushl %eax; pushl %ecx; pushl %edx; \
d5822035 1057 call *%cs:paravirt_ops+PARAVIRT_irq_disable; \
42c24fa2 1058 popl %edx; popl %ecx; popl %eax) \
d5822035
JF
1059
1060#define ENABLE_INTERRUPTS(clobbers) \
1061 PARA_SITE(PARA_PATCH(PARAVIRT_irq_enable), clobbers, \
42c24fa2 1062 pushl %eax; pushl %ecx; pushl %edx; \
d5822035 1063 call *%cs:paravirt_ops+PARAVIRT_irq_enable; \
42c24fa2 1064 popl %edx; popl %ecx; popl %eax)
d5822035
JF
1065
1066#define ENABLE_INTERRUPTS_SYSEXIT \
42c24fa2 1067 PARA_SITE(PARA_PATCH(PARAVIRT_irq_enable_sysexit), CLBR_NONE, \
d5822035 1068 jmp *%cs:paravirt_ops+PARAVIRT_irq_enable_sysexit)
139ec7c4
RR
1069
1070#define GET_CR0_INTO_EAX \
42c24fa2
JF
1071 push %ecx; push %edx; \
1072 call *paravirt_ops+PARAVIRT_read_cr0; \
1073 pop %edx; pop %ecx
139ec7c4 1074
d3561b7f
RR
1075#endif /* __ASSEMBLY__ */
1076#endif /* CONFIG_PARAVIRT */
1077#endif /* __ASM_PARAVIRT_H */