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d3561b7f RR |
1 | #ifndef __ASM_PARAVIRT_H |
2 | #define __ASM_PARAVIRT_H | |
3 | /* Various instructions on x86 need to be replaced for | |
4 | * para-virtualization: those hooks are defined here. */ | |
5 | #include <linux/linkage.h> | |
139ec7c4 | 6 | #include <linux/stringify.h> |
d3561b7f RR |
7 | |
8 | #ifdef CONFIG_PARAVIRT | |
139ec7c4 RR |
9 | /* These are the most performance critical ops, so we want to be able to patch |
10 | * callers */ | |
11 | #define PARAVIRT_IRQ_DISABLE 0 | |
12 | #define PARAVIRT_IRQ_ENABLE 1 | |
13 | #define PARAVIRT_RESTORE_FLAGS 2 | |
14 | #define PARAVIRT_SAVE_FLAGS 3 | |
15 | #define PARAVIRT_SAVE_FLAGS_IRQ_DISABLE 4 | |
16 | #define PARAVIRT_INTERRUPT_RETURN 5 | |
17 | #define PARAVIRT_STI_SYSEXIT 6 | |
18 | ||
19 | /* Bitmask of what can be clobbered: usually at least eax. */ | |
20 | #define CLBR_NONE 0x0 | |
21 | #define CLBR_EAX 0x1 | |
22 | #define CLBR_ECX 0x2 | |
23 | #define CLBR_EDX 0x4 | |
24 | #define CLBR_ANY 0x7 | |
25 | ||
d3561b7f RR |
26 | #ifndef __ASSEMBLY__ |
27 | struct thread_struct; | |
28 | struct Xgt_desc_struct; | |
29 | struct tss_struct; | |
30 | struct paravirt_ops | |
31 | { | |
32 | unsigned int kernel_rpl; | |
33 | int paravirt_enabled; | |
34 | const char *name; | |
35 | ||
139ec7c4 RR |
36 | /* |
37 | * Patch may replace one of the defined code sequences with arbitrary | |
38 | * code, subject to the same register constraints. This generally | |
39 | * means the code is not free to clobber any registers other than EAX. | |
40 | * The patch function should return the number of bytes of code | |
41 | * generated, as we nop pad the rest in generic code. | |
42 | */ | |
43 | unsigned (*patch)(u8 type, u16 clobber, void *firstinsn, unsigned len); | |
44 | ||
d3561b7f RR |
45 | void (*arch_setup)(void); |
46 | char *(*memory_setup)(void); | |
47 | void (*init_IRQ)(void); | |
48 | ||
49 | void (*banner)(void); | |
50 | ||
51 | unsigned long (*get_wallclock)(void); | |
52 | int (*set_wallclock)(unsigned long); | |
53 | void (*time_init)(void); | |
54 | ||
55 | /* All the function pointers here are declared as "fastcall" | |
56 | so that we get a specific register-based calling | |
57 | convention. This makes it easier to implement inline | |
58 | assembler replacements. */ | |
59 | ||
60 | void (fastcall *cpuid)(unsigned int *eax, unsigned int *ebx, | |
61 | unsigned int *ecx, unsigned int *edx); | |
62 | ||
63 | unsigned long (fastcall *get_debugreg)(int regno); | |
64 | void (fastcall *set_debugreg)(int regno, unsigned long value); | |
65 | ||
66 | void (fastcall *clts)(void); | |
67 | ||
68 | unsigned long (fastcall *read_cr0)(void); | |
69 | void (fastcall *write_cr0)(unsigned long); | |
70 | ||
71 | unsigned long (fastcall *read_cr2)(void); | |
72 | void (fastcall *write_cr2)(unsigned long); | |
73 | ||
74 | unsigned long (fastcall *read_cr3)(void); | |
75 | void (fastcall *write_cr3)(unsigned long); | |
76 | ||
77 | unsigned long (fastcall *read_cr4_safe)(void); | |
78 | unsigned long (fastcall *read_cr4)(void); | |
79 | void (fastcall *write_cr4)(unsigned long); | |
80 | ||
81 | unsigned long (fastcall *save_fl)(void); | |
82 | void (fastcall *restore_fl)(unsigned long); | |
83 | void (fastcall *irq_disable)(void); | |
84 | void (fastcall *irq_enable)(void); | |
85 | void (fastcall *safe_halt)(void); | |
86 | void (fastcall *halt)(void); | |
87 | void (fastcall *wbinvd)(void); | |
88 | ||
89 | /* err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */ | |
90 | u64 (fastcall *read_msr)(unsigned int msr, int *err); | |
91 | int (fastcall *write_msr)(unsigned int msr, u64 val); | |
92 | ||
93 | u64 (fastcall *read_tsc)(void); | |
94 | u64 (fastcall *read_pmc)(void); | |
95 | ||
96 | void (fastcall *load_tr_desc)(void); | |
97 | void (fastcall *load_gdt)(const struct Xgt_desc_struct *); | |
98 | void (fastcall *load_idt)(const struct Xgt_desc_struct *); | |
99 | void (fastcall *store_gdt)(struct Xgt_desc_struct *); | |
100 | void (fastcall *store_idt)(struct Xgt_desc_struct *); | |
101 | void (fastcall *set_ldt)(const void *desc, unsigned entries); | |
102 | unsigned long (fastcall *store_tr)(void); | |
103 | void (fastcall *load_tls)(struct thread_struct *t, unsigned int cpu); | |
104 | void (fastcall *write_ldt_entry)(void *dt, int entrynum, | |
105 | u32 low, u32 high); | |
106 | void (fastcall *write_gdt_entry)(void *dt, int entrynum, | |
107 | u32 low, u32 high); | |
108 | void (fastcall *write_idt_entry)(void *dt, int entrynum, | |
109 | u32 low, u32 high); | |
110 | void (fastcall *load_esp0)(struct tss_struct *tss, | |
111 | struct thread_struct *thread); | |
112 | ||
113 | void (fastcall *set_iopl_mask)(unsigned mask); | |
114 | ||
115 | void (fastcall *io_delay)(void); | |
116 | void (*const_udelay)(unsigned long loops); | |
117 | ||
13623d79 RR |
118 | #ifdef CONFIG_X86_LOCAL_APIC |
119 | void (fastcall *apic_write)(unsigned long reg, unsigned long v); | |
120 | void (fastcall *apic_write_atomic)(unsigned long reg, unsigned long v); | |
121 | unsigned long (fastcall *apic_read)(unsigned long reg); | |
122 | #endif | |
123 | ||
d3561b7f RR |
124 | /* These two are jmp to, not actually called. */ |
125 | void (fastcall *irq_enable_sysexit)(void); | |
126 | void (fastcall *iret)(void); | |
127 | }; | |
128 | ||
c9ccf30d RR |
129 | /* Mark a paravirt probe function. */ |
130 | #define paravirt_probe(fn) \ | |
131 | static asmlinkage void (*__paravirtprobe_##fn)(void) __attribute_used__ \ | |
132 | __attribute__((__section__(".paravirtprobe"))) = fn | |
133 | ||
d3561b7f RR |
134 | extern struct paravirt_ops paravirt_ops; |
135 | ||
136 | #define paravirt_enabled() (paravirt_ops.paravirt_enabled) | |
137 | ||
138 | static inline void load_esp0(struct tss_struct *tss, | |
139 | struct thread_struct *thread) | |
140 | { | |
141 | paravirt_ops.load_esp0(tss, thread); | |
142 | } | |
143 | ||
144 | #define ARCH_SETUP paravirt_ops.arch_setup(); | |
145 | static inline unsigned long get_wallclock(void) | |
146 | { | |
147 | return paravirt_ops.get_wallclock(); | |
148 | } | |
149 | ||
150 | static inline int set_wallclock(unsigned long nowtime) | |
151 | { | |
152 | return paravirt_ops.set_wallclock(nowtime); | |
153 | } | |
154 | ||
155 | static inline void do_time_init(void) | |
156 | { | |
157 | return paravirt_ops.time_init(); | |
158 | } | |
159 | ||
160 | /* The paravirtualized CPUID instruction. */ | |
161 | static inline void __cpuid(unsigned int *eax, unsigned int *ebx, | |
162 | unsigned int *ecx, unsigned int *edx) | |
163 | { | |
164 | paravirt_ops.cpuid(eax, ebx, ecx, edx); | |
165 | } | |
166 | ||
167 | /* | |
168 | * These special macros can be used to get or set a debugging register | |
169 | */ | |
170 | #define get_debugreg(var, reg) var = paravirt_ops.get_debugreg(reg) | |
171 | #define set_debugreg(val, reg) paravirt_ops.set_debugreg(reg, val) | |
172 | ||
173 | #define clts() paravirt_ops.clts() | |
174 | ||
175 | #define read_cr0() paravirt_ops.read_cr0() | |
176 | #define write_cr0(x) paravirt_ops.write_cr0(x) | |
177 | ||
178 | #define read_cr2() paravirt_ops.read_cr2() | |
179 | #define write_cr2(x) paravirt_ops.write_cr2(x) | |
180 | ||
181 | #define read_cr3() paravirt_ops.read_cr3() | |
182 | #define write_cr3(x) paravirt_ops.write_cr3(x) | |
183 | ||
184 | #define read_cr4() paravirt_ops.read_cr4() | |
185 | #define read_cr4_safe(x) paravirt_ops.read_cr4_safe() | |
186 | #define write_cr4(x) paravirt_ops.write_cr4(x) | |
187 | ||
d3561b7f RR |
188 | static inline void raw_safe_halt(void) |
189 | { | |
190 | paravirt_ops.safe_halt(); | |
191 | } | |
192 | ||
193 | static inline void halt(void) | |
194 | { | |
195 | paravirt_ops.safe_halt(); | |
196 | } | |
197 | #define wbinvd() paravirt_ops.wbinvd() | |
198 | ||
199 | #define get_kernel_rpl() (paravirt_ops.kernel_rpl) | |
200 | ||
201 | #define rdmsr(msr,val1,val2) do { \ | |
202 | int _err; \ | |
203 | u64 _l = paravirt_ops.read_msr(msr,&_err); \ | |
204 | val1 = (u32)_l; \ | |
205 | val2 = _l >> 32; \ | |
206 | } while(0) | |
207 | ||
208 | #define wrmsr(msr,val1,val2) do { \ | |
209 | u64 _l = ((u64)(val2) << 32) | (val1); \ | |
210 | paravirt_ops.write_msr((msr), _l); \ | |
211 | } while(0) | |
212 | ||
213 | #define rdmsrl(msr,val) do { \ | |
214 | int _err; \ | |
215 | val = paravirt_ops.read_msr((msr),&_err); \ | |
216 | } while(0) | |
217 | ||
218 | #define wrmsrl(msr,val) (paravirt_ops.write_msr((msr),(val))) | |
219 | #define wrmsr_safe(msr,a,b) ({ \ | |
220 | u64 _l = ((u64)(b) << 32) | (a); \ | |
221 | paravirt_ops.write_msr((msr),_l); \ | |
222 | }) | |
223 | ||
224 | /* rdmsr with exception handling */ | |
225 | #define rdmsr_safe(msr,a,b) ({ \ | |
226 | int _err; \ | |
227 | u64 _l = paravirt_ops.read_msr(msr,&_err); \ | |
228 | (*a) = (u32)_l; \ | |
229 | (*b) = _l >> 32; \ | |
230 | _err; }) | |
231 | ||
232 | #define rdtsc(low,high) do { \ | |
233 | u64 _l = paravirt_ops.read_tsc(); \ | |
234 | low = (u32)_l; \ | |
235 | high = _l >> 32; \ | |
236 | } while(0) | |
237 | ||
238 | #define rdtscl(low) do { \ | |
239 | u64 _l = paravirt_ops.read_tsc(); \ | |
240 | low = (int)_l; \ | |
241 | } while(0) | |
242 | ||
243 | #define rdtscll(val) (val = paravirt_ops.read_tsc()) | |
244 | ||
245 | #define write_tsc(val1,val2) wrmsr(0x10, val1, val2) | |
246 | ||
247 | #define rdpmc(counter,low,high) do { \ | |
248 | u64 _l = paravirt_ops.read_pmc(); \ | |
249 | low = (u32)_l; \ | |
250 | high = _l >> 32; \ | |
251 | } while(0) | |
252 | ||
253 | #define load_TR_desc() (paravirt_ops.load_tr_desc()) | |
254 | #define load_gdt(dtr) (paravirt_ops.load_gdt(dtr)) | |
255 | #define load_idt(dtr) (paravirt_ops.load_idt(dtr)) | |
256 | #define set_ldt(addr, entries) (paravirt_ops.set_ldt((addr), (entries))) | |
257 | #define store_gdt(dtr) (paravirt_ops.store_gdt(dtr)) | |
258 | #define store_idt(dtr) (paravirt_ops.store_idt(dtr)) | |
259 | #define store_tr(tr) ((tr) = paravirt_ops.store_tr()) | |
260 | #define load_TLS(t,cpu) (paravirt_ops.load_tls((t),(cpu))) | |
261 | #define write_ldt_entry(dt, entry, low, high) \ | |
262 | (paravirt_ops.write_ldt_entry((dt), (entry), (low), (high))) | |
263 | #define write_gdt_entry(dt, entry, low, high) \ | |
264 | (paravirt_ops.write_gdt_entry((dt), (entry), (low), (high))) | |
265 | #define write_idt_entry(dt, entry, low, high) \ | |
266 | (paravirt_ops.write_idt_entry((dt), (entry), (low), (high))) | |
267 | #define set_iopl_mask(mask) (paravirt_ops.set_iopl_mask(mask)) | |
268 | ||
269 | /* The paravirtualized I/O functions */ | |
270 | static inline void slow_down_io(void) { | |
271 | paravirt_ops.io_delay(); | |
272 | #ifdef REALLY_SLOW_IO | |
273 | paravirt_ops.io_delay(); | |
274 | paravirt_ops.io_delay(); | |
275 | paravirt_ops.io_delay(); | |
276 | #endif | |
277 | } | |
278 | ||
13623d79 RR |
279 | #ifdef CONFIG_X86_LOCAL_APIC |
280 | /* | |
281 | * Basic functions accessing APICs. | |
282 | */ | |
283 | static inline void apic_write(unsigned long reg, unsigned long v) | |
284 | { | |
285 | paravirt_ops.apic_write(reg,v); | |
286 | } | |
287 | ||
288 | static inline void apic_write_atomic(unsigned long reg, unsigned long v) | |
289 | { | |
290 | paravirt_ops.apic_write_atomic(reg,v); | |
291 | } | |
292 | ||
293 | static inline unsigned long apic_read(unsigned long reg) | |
294 | { | |
295 | return paravirt_ops.apic_read(reg); | |
296 | } | |
297 | #endif | |
298 | ||
299 | ||
139ec7c4 RR |
300 | /* These all sit in the .parainstructions section to tell us what to patch. */ |
301 | struct paravirt_patch { | |
302 | u8 *instr; /* original instructions */ | |
303 | u8 instrtype; /* type of this instruction */ | |
304 | u8 len; /* length of original instruction */ | |
305 | u16 clobbers; /* what registers you may clobber */ | |
306 | }; | |
307 | ||
308 | #define paravirt_alt(insn_string, typenum, clobber) \ | |
309 | "771:\n\t" insn_string "\n" "772:\n" \ | |
310 | ".pushsection .parainstructions,\"a\"\n" \ | |
311 | " .long 771b\n" \ | |
312 | " .byte " __stringify(typenum) "\n" \ | |
313 | " .byte 772b-771b\n" \ | |
314 | " .short " __stringify(clobber) "\n" \ | |
315 | ".popsection" | |
316 | ||
317 | static inline unsigned long __raw_local_save_flags(void) | |
318 | { | |
319 | unsigned long f; | |
320 | ||
321 | __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;" | |
322 | "call *%1;" | |
323 | "popl %%edx; popl %%ecx", | |
324 | PARAVIRT_SAVE_FLAGS, CLBR_NONE) | |
325 | : "=a"(f): "m"(paravirt_ops.save_fl) | |
326 | : "memory", "cc"); | |
327 | return f; | |
328 | } | |
329 | ||
330 | static inline void raw_local_irq_restore(unsigned long f) | |
331 | { | |
332 | __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;" | |
333 | "call *%1;" | |
334 | "popl %%edx; popl %%ecx", | |
335 | PARAVIRT_RESTORE_FLAGS, CLBR_EAX) | |
336 | : "=a"(f) : "m" (paravirt_ops.restore_fl), "0"(f) | |
337 | : "memory", "cc"); | |
338 | } | |
339 | ||
340 | static inline void raw_local_irq_disable(void) | |
341 | { | |
342 | __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;" | |
343 | "call *%0;" | |
344 | "popl %%edx; popl %%ecx", | |
345 | PARAVIRT_IRQ_DISABLE, CLBR_EAX) | |
346 | : : "m" (paravirt_ops.irq_disable) | |
347 | : "memory", "eax", "cc"); | |
348 | } | |
349 | ||
350 | static inline void raw_local_irq_enable(void) | |
351 | { | |
352 | __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;" | |
353 | "call *%0;" | |
354 | "popl %%edx; popl %%ecx", | |
355 | PARAVIRT_IRQ_ENABLE, CLBR_EAX) | |
356 | : : "m" (paravirt_ops.irq_enable) | |
357 | : "memory", "eax", "cc"); | |
358 | } | |
359 | ||
360 | static inline unsigned long __raw_local_irq_save(void) | |
361 | { | |
362 | unsigned long f; | |
363 | ||
364 | __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;" | |
365 | "call *%1; pushl %%eax;" | |
366 | "call *%2; popl %%eax;" | |
367 | "popl %%edx; popl %%ecx", | |
368 | PARAVIRT_SAVE_FLAGS_IRQ_DISABLE, | |
369 | CLBR_NONE) | |
370 | : "=a"(f) | |
371 | : "m" (paravirt_ops.save_fl), | |
372 | "m" (paravirt_ops.irq_disable) | |
373 | : "memory", "cc"); | |
374 | return f; | |
375 | } | |
376 | ||
377 | #define CLI_STRING paravirt_alt("pushl %%ecx; pushl %%edx;" \ | |
378 | "call *paravirt_ops+%c[irq_disable];" \ | |
379 | "popl %%edx; popl %%ecx", \ | |
380 | PARAVIRT_IRQ_DISABLE, CLBR_EAX) | |
381 | ||
382 | #define STI_STRING paravirt_alt("pushl %%ecx; pushl %%edx;" \ | |
383 | "call *paravirt_ops+%c[irq_enable];" \ | |
384 | "popl %%edx; popl %%ecx", \ | |
385 | PARAVIRT_IRQ_ENABLE, CLBR_EAX) | |
386 | #define CLI_STI_CLOBBERS , "%eax" | |
387 | #define CLI_STI_INPUT_ARGS \ | |
388 | , \ | |
389 | [irq_disable] "i" (offsetof(struct paravirt_ops, irq_disable)), \ | |
390 | [irq_enable] "i" (offsetof(struct paravirt_ops, irq_enable)) | |
391 | ||
d3561b7f RR |
392 | #else /* __ASSEMBLY__ */ |
393 | ||
139ec7c4 RR |
394 | #define PARA_PATCH(ptype, clobbers, ops) \ |
395 | 771:; \ | |
396 | ops; \ | |
397 | 772:; \ | |
398 | .pushsection .parainstructions,"a"; \ | |
399 | .long 771b; \ | |
400 | .byte ptype; \ | |
401 | .byte 772b-771b; \ | |
402 | .short clobbers; \ | |
403 | .popsection | |
404 | ||
405 | #define INTERRUPT_RETURN \ | |
406 | PARA_PATCH(PARAVIRT_INTERRUPT_RETURN, CLBR_ANY, \ | |
407 | jmp *%cs:paravirt_ops+PARAVIRT_iret) | |
408 | ||
409 | #define DISABLE_INTERRUPTS(clobbers) \ | |
410 | PARA_PATCH(PARAVIRT_IRQ_DISABLE, clobbers, \ | |
411 | pushl %ecx; pushl %edx; \ | |
412 | call *paravirt_ops+PARAVIRT_irq_disable; \ | |
413 | popl %edx; popl %ecx) \ | |
414 | ||
415 | #define ENABLE_INTERRUPTS(clobbers) \ | |
416 | PARA_PATCH(PARAVIRT_IRQ_ENABLE, clobbers, \ | |
417 | pushl %ecx; pushl %edx; \ | |
418 | call *%cs:paravirt_ops+PARAVIRT_irq_enable; \ | |
419 | popl %edx; popl %ecx) | |
420 | ||
421 | #define ENABLE_INTERRUPTS_SYSEXIT \ | |
422 | PARA_PATCH(PARAVIRT_STI_SYSEXIT, CLBR_ANY, \ | |
423 | jmp *%cs:paravirt_ops+PARAVIRT_irq_enable_sysexit) | |
424 | ||
425 | #define GET_CR0_INTO_EAX \ | |
426 | call *paravirt_ops+PARAVIRT_read_cr0 | |
427 | ||
d3561b7f RR |
428 | #endif /* __ASSEMBLY__ */ |
429 | #endif /* CONFIG_PARAVIRT */ | |
430 | #endif /* __ASM_PARAVIRT_H */ |