mm: make the __PAGETABLE_PxD_FOLDED defines non-empty
[linux-block.git] / include / asm-generic / pgtable.h
CommitLineData
b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
1da177e4
LT
2#ifndef _ASM_GENERIC_PGTABLE_H
3#define _ASM_GENERIC_PGTABLE_H
4
f25748e3
DW
5#include <linux/pfn.h>
6
673eae82 7#ifndef __ASSEMBLY__
9535239f 8#ifdef CONFIG_MMU
673eae82 9
fbd71844 10#include <linux/mm_types.h>
187f1882 11#include <linux/bug.h>
e61ce6ad 12#include <linux/errno.h>
fbd71844 13
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KS
14#if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \
15 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS
16#error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED
235a8f02
KS
17#endif
18
6ee8630e
HD
19/*
20 * On almost all architectures and configurations, 0 can be used as the
21 * upper ceiling to free_pgtables(): on many architectures it has the same
22 * effect as using TASK_SIZE. However, there is one configuration which
23 * must impose a more careful limit, to avoid freeing kernel pgtables.
24 */
25#ifndef USER_PGTABLES_CEILING
26#define USER_PGTABLES_CEILING 0UL
27#endif
28
1da177e4 29#ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
e2cda322
AA
30extern int ptep_set_access_flags(struct vm_area_struct *vma,
31 unsigned long address, pte_t *ptep,
32 pte_t entry, int dirty);
33#endif
34
35#ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
bd5e88ad 36#ifdef CONFIG_TRANSPARENT_HUGEPAGE
e2cda322
AA
37extern int pmdp_set_access_flags(struct vm_area_struct *vma,
38 unsigned long address, pmd_t *pmdp,
39 pmd_t entry, int dirty);
a00cc7d9
MW
40extern int pudp_set_access_flags(struct vm_area_struct *vma,
41 unsigned long address, pud_t *pudp,
42 pud_t entry, int dirty);
bd5e88ad
VG
43#else
44static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
45 unsigned long address, pmd_t *pmdp,
46 pmd_t entry, int dirty)
47{
48 BUILD_BUG();
49 return 0;
50}
a00cc7d9
MW
51static inline int pudp_set_access_flags(struct vm_area_struct *vma,
52 unsigned long address, pud_t *pudp,
53 pud_t entry, int dirty)
54{
55 BUILD_BUG();
56 return 0;
57}
bd5e88ad 58#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1da177e4
LT
59#endif
60
61#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
e2cda322
AA
62static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
63 unsigned long address,
64 pte_t *ptep)
65{
66 pte_t pte = *ptep;
67 int r = 1;
68 if (!pte_young(pte))
69 r = 0;
70 else
71 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
72 return r;
73}
74#endif
75
76#ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
77#ifdef CONFIG_TRANSPARENT_HUGEPAGE
78static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
79 unsigned long address,
80 pmd_t *pmdp)
81{
82 pmd_t pmd = *pmdp;
83 int r = 1;
84 if (!pmd_young(pmd))
85 r = 0;
86 else
87 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
88 return r;
89}
bd5e88ad 90#else
e2cda322
AA
91static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
92 unsigned long address,
93 pmd_t *pmdp)
94{
bd5e88ad 95 BUILD_BUG();
e2cda322
AA
96 return 0;
97}
98#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1da177e4
LT
99#endif
100
101#ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
e2cda322
AA
102int ptep_clear_flush_young(struct vm_area_struct *vma,
103 unsigned long address, pte_t *ptep);
104#endif
105
106#ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
bd5e88ad
VG
107#ifdef CONFIG_TRANSPARENT_HUGEPAGE
108extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
109 unsigned long address, pmd_t *pmdp);
110#else
111/*
112 * Despite relevant to THP only, this API is called from generic rmap code
113 * under PageTransHuge(), hence needs a dummy implementation for !THP
114 */
115static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
116 unsigned long address, pmd_t *pmdp)
117{
118 BUILD_BUG();
119 return 0;
120}
121#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1da177e4
LT
122#endif
123
1da177e4 124#ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
e2cda322
AA
125static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
126 unsigned long address,
127 pte_t *ptep)
128{
129 pte_t pte = *ptep;
130 pte_clear(mm, address, ptep);
131 return pte;
132}
133#endif
134
e2cda322 135#ifdef CONFIG_TRANSPARENT_HUGEPAGE
a00cc7d9 136#ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
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137static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
138 unsigned long address,
139 pmd_t *pmdp)
e2cda322
AA
140{
141 pmd_t pmd = *pmdp;
2d28a227 142 pmd_clear(pmdp);
e2cda322 143 return pmd;
49b24d6b 144}
a00cc7d9
MW
145#endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */
146#ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
147static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
148 unsigned long address,
149 pud_t *pudp)
150{
151 pud_t pud = *pudp;
152
153 pud_clear(pudp);
154 return pud;
155}
156#endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */
e2cda322 157#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1da177e4 158
fcbe08d6 159#ifdef CONFIG_TRANSPARENT_HUGEPAGE
a00cc7d9 160#ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
8809aa2d 161static inline pmd_t pmdp_huge_get_and_clear_full(struct mm_struct *mm,
fcbe08d6
MS
162 unsigned long address, pmd_t *pmdp,
163 int full)
164{
8809aa2d 165 return pmdp_huge_get_and_clear(mm, address, pmdp);
fcbe08d6 166}
fcbe08d6
MS
167#endif
168
a00cc7d9
MW
169#ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL
170static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm,
171 unsigned long address, pud_t *pudp,
172 int full)
173{
174 return pudp_huge_get_and_clear(mm, address, pudp);
175}
176#endif
177#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
178
a600388d 179#ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
e2cda322
AA
180static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
181 unsigned long address, pte_t *ptep,
182 int full)
183{
184 pte_t pte;
185 pte = ptep_get_and_clear(mm, address, ptep);
186 return pte;
187}
a600388d
ZA
188#endif
189
9888a1ca
ZA
190/*
191 * Some architectures may be able to avoid expensive synchronization
192 * primitives when modifications are made to PTE's which are already
193 * not present, or in the process of an address space destruction.
194 */
195#ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
e2cda322
AA
196static inline void pte_clear_not_present_full(struct mm_struct *mm,
197 unsigned long address,
198 pte_t *ptep,
199 int full)
200{
201 pte_clear(mm, address, ptep);
202}
a600388d
ZA
203#endif
204
1da177e4 205#ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
e2cda322
AA
206extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
207 unsigned long address,
208 pte_t *ptep);
209#endif
210
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AK
211#ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
212extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
e2cda322
AA
213 unsigned long address,
214 pmd_t *pmdp);
a00cc7d9
MW
215extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma,
216 unsigned long address,
217 pud_t *pudp);
1da177e4
LT
218#endif
219
220#ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
8c65b4a6 221struct mm_struct;
1da177e4
LT
222static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
223{
224 pte_t old_pte = *ptep;
225 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
226}
227#endif
228
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AK
229#ifndef pte_savedwrite
230#define pte_savedwrite pte_write
231#endif
232
233#ifndef pte_mk_savedwrite
234#define pte_mk_savedwrite pte_mkwrite
235#endif
236
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AK
237#ifndef pte_clear_savedwrite
238#define pte_clear_savedwrite pte_wrprotect
239#endif
240
288bc549
AK
241#ifndef pmd_savedwrite
242#define pmd_savedwrite pmd_write
243#endif
244
245#ifndef pmd_mk_savedwrite
246#define pmd_mk_savedwrite pmd_mkwrite
247#endif
248
595cd8f2
AK
249#ifndef pmd_clear_savedwrite
250#define pmd_clear_savedwrite pmd_wrprotect
251#endif
252
e2cda322
AA
253#ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
254#ifdef CONFIG_TRANSPARENT_HUGEPAGE
255static inline void pmdp_set_wrprotect(struct mm_struct *mm,
256 unsigned long address, pmd_t *pmdp)
257{
258 pmd_t old_pmd = *pmdp;
259 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
260}
bd5e88ad 261#else
e2cda322
AA
262static inline void pmdp_set_wrprotect(struct mm_struct *mm,
263 unsigned long address, pmd_t *pmdp)
264{
bd5e88ad 265 BUILD_BUG();
e2cda322
AA
266}
267#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
268#endif
a00cc7d9
MW
269#ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT
270#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
271static inline void pudp_set_wrprotect(struct mm_struct *mm,
272 unsigned long address, pud_t *pudp)
273{
274 pud_t old_pud = *pudp;
275
276 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud));
277}
278#else
279static inline void pudp_set_wrprotect(struct mm_struct *mm,
280 unsigned long address, pud_t *pudp)
281{
282 BUILD_BUG();
283}
284#endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */
285#endif
e2cda322 286
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AK
287#ifndef pmdp_collapse_flush
288#ifdef CONFIG_TRANSPARENT_HUGEPAGE
f28b6ff8
AK
289extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
290 unsigned long address, pmd_t *pmdp);
15a25b2e
AK
291#else
292static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
293 unsigned long address,
294 pmd_t *pmdp)
295{
296 BUILD_BUG();
297 return *pmdp;
298}
299#define pmdp_collapse_flush pmdp_collapse_flush
300#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
301#endif
302
e3ebcf64 303#ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
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AK
304extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
305 pgtable_t pgtable);
e3ebcf64
GS
306#endif
307
308#ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
6b0b50b0 309extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
e3ebcf64
GS
310#endif
311
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KS
312#ifdef CONFIG_TRANSPARENT_HUGEPAGE
313/*
314 * This is an implementation of pmdp_establish() that is only suitable for an
315 * architecture that doesn't have hardware dirty/accessed bits. In this case we
316 * can't race with CPU which sets these bits and non-atomic aproach is fine.
317 */
318static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma,
319 unsigned long address, pmd_t *pmdp, pmd_t pmd)
320{
321 pmd_t old_pmd = *pmdp;
322 set_pmd_at(vma->vm_mm, address, pmdp, pmd);
323 return old_pmd;
324}
325#endif
326
46dcde73 327#ifndef __HAVE_ARCH_PMDP_INVALIDATE
d52605d7 328extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
46dcde73
GS
329 pmd_t *pmdp);
330#endif
331
1da177e4 332#ifndef __HAVE_ARCH_PTE_SAME
e2cda322
AA
333static inline int pte_same(pte_t pte_a, pte_t pte_b)
334{
335 return pte_val(pte_a) == pte_val(pte_b);
336}
337#endif
338
45961722
KW
339#ifndef __HAVE_ARCH_PTE_UNUSED
340/*
341 * Some architectures provide facilities to virtualization guests
342 * so that they can flag allocated pages as unused. This allows the
343 * host to transparently reclaim unused pages. This function returns
344 * whether the pte's page is unused.
345 */
346static inline int pte_unused(pte_t pte)
347{
348 return 0;
349}
350#endif
351
e7884f8e
KS
352#ifndef pte_access_permitted
353#define pte_access_permitted(pte, write) \
354 (pte_present(pte) && (!(write) || pte_write(pte)))
355#endif
356
357#ifndef pmd_access_permitted
358#define pmd_access_permitted(pmd, write) \
359 (pmd_present(pmd) && (!(write) || pmd_write(pmd)))
360#endif
361
362#ifndef pud_access_permitted
363#define pud_access_permitted(pud, write) \
364 (pud_present(pud) && (!(write) || pud_write(pud)))
365#endif
366
367#ifndef p4d_access_permitted
368#define p4d_access_permitted(p4d, write) \
369 (p4d_present(p4d) && (!(write) || p4d_write(p4d)))
370#endif
371
372#ifndef pgd_access_permitted
373#define pgd_access_permitted(pgd, write) \
374 (pgd_present(pgd) && (!(write) || pgd_write(pgd)))
375#endif
376
e2cda322
AA
377#ifndef __HAVE_ARCH_PMD_SAME
378#ifdef CONFIG_TRANSPARENT_HUGEPAGE
379static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
380{
381 return pmd_val(pmd_a) == pmd_val(pmd_b);
382}
a00cc7d9
MW
383
384static inline int pud_same(pud_t pud_a, pud_t pud_b)
385{
386 return pud_val(pud_a) == pud_val(pud_b);
387}
e2cda322
AA
388#else /* CONFIG_TRANSPARENT_HUGEPAGE */
389static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
390{
bd5e88ad 391 BUILD_BUG();
e2cda322
AA
392 return 0;
393}
a00cc7d9
MW
394
395static inline int pud_same(pud_t pud_a, pud_t pud_b)
396{
397 BUILD_BUG();
398 return 0;
399}
e2cda322 400#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1da177e4
LT
401#endif
402
ca827d55
KA
403#ifndef __HAVE_ARCH_DO_SWAP_PAGE
404/*
405 * Some architectures support metadata associated with a page. When a
406 * page is being swapped out, this metadata must be saved so it can be
407 * restored when the page is swapped back in. SPARC M7 and newer
408 * processors support an ADI (Application Data Integrity) tag for the
409 * page as metadata for the page. arch_do_swap_page() can restore this
410 * metadata when a page is swapped back in.
411 */
412static inline void arch_do_swap_page(struct mm_struct *mm,
413 struct vm_area_struct *vma,
414 unsigned long addr,
415 pte_t pte, pte_t oldpte)
416{
417
418}
419#endif
420
421#ifndef __HAVE_ARCH_UNMAP_ONE
422/*
423 * Some architectures support metadata associated with a page. When a
424 * page is being swapped out, this metadata must be saved so it can be
425 * restored when the page is swapped back in. SPARC M7 and newer
426 * processors support an ADI (Application Data Integrity) tag for the
427 * page as metadata for the page. arch_unmap_one() can save this
428 * metadata on a swap-out of a page.
429 */
430static inline int arch_unmap_one(struct mm_struct *mm,
431 struct vm_area_struct *vma,
432 unsigned long addr,
433 pte_t orig_pte)
434{
435 return 0;
436}
437#endif
438
1da177e4
LT
439#ifndef __HAVE_ARCH_PGD_OFFSET_GATE
440#define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
441#endif
442
0b0968a3 443#ifndef __HAVE_ARCH_MOVE_PTE
8b1f3124 444#define move_pte(pte, prot, old_addr, new_addr) (pte)
8b1f3124
NP
445#endif
446
2c3cf556 447#ifndef pte_accessible
20841405 448# define pte_accessible(mm, pte) ((void)(pte), 1)
2c3cf556
RR
449#endif
450
61c77326
SL
451#ifndef flush_tlb_fix_spurious_fault
452#define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
453#endif
454
0634a632
PM
455#ifndef pgprot_noncached
456#define pgprot_noncached(prot) (prot)
457#endif
458
2520bd31 459#ifndef pgprot_writecombine
460#define pgprot_writecombine pgprot_noncached
461#endif
462
d1b4bfbf
TK
463#ifndef pgprot_writethrough
464#define pgprot_writethrough pgprot_noncached
465#endif
466
8b921acf
LD
467#ifndef pgprot_device
468#define pgprot_device pgprot_noncached
469#endif
470
64e45507
PF
471#ifndef pgprot_modify
472#define pgprot_modify pgprot_modify
473static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
474{
475 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
476 newprot = pgprot_noncached(newprot);
477 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
478 newprot = pgprot_writecombine(newprot);
479 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
480 newprot = pgprot_device(newprot);
481 return newprot;
482}
483#endif
484
1da177e4 485/*
8f6c99c1
HD
486 * When walking page tables, get the address of the next boundary,
487 * or the end address of the range if that comes earlier. Although no
488 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
1da177e4
LT
489 */
490
1da177e4
LT
491#define pgd_addr_end(addr, end) \
492({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
493 (__boundary - 1 < (end) - 1)? __boundary: (end); \
494})
1da177e4 495
c2febafc
KS
496#ifndef p4d_addr_end
497#define p4d_addr_end(addr, end) \
498({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \
499 (__boundary - 1 < (end) - 1)? __boundary: (end); \
500})
501#endif
502
1da177e4
LT
503#ifndef pud_addr_end
504#define pud_addr_end(addr, end) \
505({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
506 (__boundary - 1 < (end) - 1)? __boundary: (end); \
507})
508#endif
509
510#ifndef pmd_addr_end
511#define pmd_addr_end(addr, end) \
512({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
513 (__boundary - 1 < (end) - 1)? __boundary: (end); \
514})
515#endif
516
1da177e4
LT
517/*
518 * When walking page tables, we usually want to skip any p?d_none entries;
519 * and any p?d_bad entries - reporting the error before resetting to none.
520 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
521 */
522void pgd_clear_bad(pgd_t *);
c2febafc 523void p4d_clear_bad(p4d_t *);
1da177e4
LT
524void pud_clear_bad(pud_t *);
525void pmd_clear_bad(pmd_t *);
526
527static inline int pgd_none_or_clear_bad(pgd_t *pgd)
528{
529 if (pgd_none(*pgd))
530 return 1;
531 if (unlikely(pgd_bad(*pgd))) {
532 pgd_clear_bad(pgd);
533 return 1;
534 }
535 return 0;
536}
537
c2febafc
KS
538static inline int p4d_none_or_clear_bad(p4d_t *p4d)
539{
540 if (p4d_none(*p4d))
541 return 1;
542 if (unlikely(p4d_bad(*p4d))) {
543 p4d_clear_bad(p4d);
544 return 1;
545 }
546 return 0;
547}
548
1da177e4
LT
549static inline int pud_none_or_clear_bad(pud_t *pud)
550{
551 if (pud_none(*pud))
552 return 1;
553 if (unlikely(pud_bad(*pud))) {
554 pud_clear_bad(pud);
555 return 1;
556 }
557 return 0;
558}
559
560static inline int pmd_none_or_clear_bad(pmd_t *pmd)
561{
562 if (pmd_none(*pmd))
563 return 1;
564 if (unlikely(pmd_bad(*pmd))) {
565 pmd_clear_bad(pmd);
566 return 1;
567 }
568 return 0;
569}
9535239f 570
1ea0704e
JF
571static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm,
572 unsigned long addr,
573 pte_t *ptep)
574{
575 /*
576 * Get the current pte state, but zero it out to make it
577 * non-present, preventing the hardware from asynchronously
578 * updating it.
579 */
580 return ptep_get_and_clear(mm, addr, ptep);
581}
582
583static inline void __ptep_modify_prot_commit(struct mm_struct *mm,
584 unsigned long addr,
585 pte_t *ptep, pte_t pte)
586{
587 /*
588 * The pte is non-present, so there's no hardware state to
589 * preserve.
590 */
591 set_pte_at(mm, addr, ptep, pte);
592}
593
594#ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
595/*
596 * Start a pte protection read-modify-write transaction, which
597 * protects against asynchronous hardware modifications to the pte.
598 * The intention is not to prevent the hardware from making pte
599 * updates, but to prevent any updates it may make from being lost.
600 *
601 * This does not protect against other software modifications of the
602 * pte; the appropriate pte lock must be held over the transation.
603 *
604 * Note that this interface is intended to be batchable, meaning that
605 * ptep_modify_prot_commit may not actually update the pte, but merely
606 * queue the update to be done at some later time. The update must be
607 * actually committed before the pte lock is released, however.
608 */
609static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
610 unsigned long addr,
611 pte_t *ptep)
612{
613 return __ptep_modify_prot_start(mm, addr, ptep);
614}
615
616/*
617 * Commit an update to a pte, leaving any hardware-controlled bits in
618 * the PTE unmodified.
619 */
620static inline void ptep_modify_prot_commit(struct mm_struct *mm,
621 unsigned long addr,
622 pte_t *ptep, pte_t pte)
623{
624 __ptep_modify_prot_commit(mm, addr, ptep, pte);
625}
626#endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
fe1a6875 627#endif /* CONFIG_MMU */
1ea0704e 628
21729f81
TL
629/*
630 * No-op macros that just return the current protection value. Defined here
631 * because these macros can be used used even if CONFIG_MMU is not defined.
632 */
633#ifndef pgprot_encrypted
634#define pgprot_encrypted(prot) (prot)
635#endif
636
637#ifndef pgprot_decrypted
638#define pgprot_decrypted(prot) (prot)
639#endif
640
9535239f
GU
641/*
642 * A facility to provide lazy MMU batching. This allows PTE updates and
643 * page invalidations to be delayed until a call to leave lazy MMU mode
644 * is issued. Some architectures may benefit from doing this, and it is
645 * beneficial for both shadow and direct mode hypervisors, which may batch
646 * the PTE updates which happen during this window. Note that using this
647 * interface requires that read hazards be removed from the code. A read
648 * hazard could result in the direct mode hypervisor case, since the actual
649 * write to the page tables may not yet have taken place, so reads though
650 * a raw PTE pointer after it has been modified are not guaranteed to be
651 * up to date. This mode can only be entered and left under the protection of
652 * the page table locks for all page tables which may be modified. In the UP
653 * case, this is required so that preemption is disabled, and in the SMP case,
654 * it must synchronize the delayed page table writes properly on other CPUs.
655 */
656#ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
657#define arch_enter_lazy_mmu_mode() do {} while (0)
658#define arch_leave_lazy_mmu_mode() do {} while (0)
659#define arch_flush_lazy_mmu_mode() do {} while (0)
660#endif
661
662/*
7fd7d83d
JF
663 * A facility to provide batching of the reload of page tables and
664 * other process state with the actual context switch code for
665 * paravirtualized guests. By convention, only one of the batched
666 * update (lazy) modes (CPU, MMU) should be active at any given time,
667 * entry should never be nested, and entry and exits should always be
668 * paired. This is for sanity of maintaining and reasoning about the
669 * kernel code. In this case, the exit (end of the context switch) is
670 * in architecture-specific code, and so doesn't need a generic
671 * definition.
9535239f 672 */
7fd7d83d 673#ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
224101ed 674#define arch_start_context_switch(prev) do {} while (0)
9535239f
GU
675#endif
676
ab6e3d09
NH
677#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
678#ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION
679static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
680{
681 return pmd;
682}
683
684static inline int pmd_swp_soft_dirty(pmd_t pmd)
685{
686 return 0;
687}
688
689static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
690{
691 return pmd;
692}
693#endif
694#else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */
0f8975ec
PE
695static inline int pte_soft_dirty(pte_t pte)
696{
697 return 0;
698}
699
700static inline int pmd_soft_dirty(pmd_t pmd)
701{
702 return 0;
703}
704
705static inline pte_t pte_mksoft_dirty(pte_t pte)
706{
707 return pte;
708}
709
710static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
711{
712 return pmd;
713}
179ef71c 714
a7b76174
MS
715static inline pte_t pte_clear_soft_dirty(pte_t pte)
716{
717 return pte;
718}
719
720static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
721{
722 return pmd;
723}
724
179ef71c
CG
725static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
726{
727 return pte;
728}
729
730static inline int pte_swp_soft_dirty(pte_t pte)
731{
732 return 0;
733}
734
735static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
736{
737 return pte;
738}
ab6e3d09
NH
739
740static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
741{
742 return pmd;
743}
744
745static inline int pmd_swp_soft_dirty(pmd_t pmd)
746{
747 return 0;
748}
749
750static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
751{
752 return pmd;
753}
0f8975ec
PE
754#endif
755
34801ba9 756#ifndef __HAVE_PFNMAP_TRACKING
757/*
5180da41
SS
758 * Interfaces that can be used by architecture code to keep track of
759 * memory type of pfn mappings specified by the remap_pfn_range,
760 * vm_insert_pfn.
761 */
762
763/*
764 * track_pfn_remap is called when a _new_ pfn mapping is being established
765 * by remap_pfn_range() for physical range indicated by pfn and size.
34801ba9 766 */
5180da41 767static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
b3b9c293
KK
768 unsigned long pfn, unsigned long addr,
769 unsigned long size)
34801ba9 770{
771 return 0;
772}
773
774/*
5180da41
SS
775 * track_pfn_insert is called when a _new_ single pfn is established
776 * by vm_insert_pfn().
777 */
308a047c
BP
778static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
779 pfn_t pfn)
5180da41 780{
5180da41
SS
781}
782
783/*
784 * track_pfn_copy is called when vma that is covering the pfnmap gets
34801ba9 785 * copied through copy_page_range().
786 */
5180da41 787static inline int track_pfn_copy(struct vm_area_struct *vma)
34801ba9 788{
789 return 0;
790}
791
792/*
d9fe4fab 793 * untrack_pfn is called while unmapping a pfnmap for a region.
34801ba9 794 * untrack can be called for a specific region indicated by pfn and size or
5180da41 795 * can be for the entire vma (in which case pfn, size are zero).
34801ba9 796 */
5180da41
SS
797static inline void untrack_pfn(struct vm_area_struct *vma,
798 unsigned long pfn, unsigned long size)
34801ba9 799{
800}
d9fe4fab
TK
801
802/*
803 * untrack_pfn_moved is called while mremapping a pfnmap for a new region.
804 */
805static inline void untrack_pfn_moved(struct vm_area_struct *vma)
806{
807}
34801ba9 808#else
5180da41 809extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
b3b9c293
KK
810 unsigned long pfn, unsigned long addr,
811 unsigned long size);
308a047c
BP
812extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
813 pfn_t pfn);
5180da41
SS
814extern int track_pfn_copy(struct vm_area_struct *vma);
815extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
816 unsigned long size);
d9fe4fab 817extern void untrack_pfn_moved(struct vm_area_struct *vma);
34801ba9 818#endif
819
816422ad
KS
820#ifdef __HAVE_COLOR_ZERO_PAGE
821static inline int is_zero_pfn(unsigned long pfn)
822{
823 extern unsigned long zero_pfn;
824 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
825 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
826}
827
2f91ec8c
KS
828#define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
829
816422ad
KS
830#else
831static inline int is_zero_pfn(unsigned long pfn)
832{
833 extern unsigned long zero_pfn;
834 return pfn == zero_pfn;
835}
836
837static inline unsigned long my_zero_pfn(unsigned long addr)
838{
839 extern unsigned long zero_pfn;
840 return zero_pfn;
841}
842#endif
843
1a5a9906
AA
844#ifdef CONFIG_MMU
845
5f6e8da7
AA
846#ifndef CONFIG_TRANSPARENT_HUGEPAGE
847static inline int pmd_trans_huge(pmd_t pmd)
848{
849 return 0;
850}
e4e40e02 851#ifndef pmd_write
e2cda322
AA
852static inline int pmd_write(pmd_t pmd)
853{
854 BUG();
855 return 0;
856}
e4e40e02 857#endif /* pmd_write */
1a5a9906
AA
858#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
859
1501899a
DW
860#ifndef pud_write
861static inline int pud_write(pud_t pud)
862{
863 BUG();
864 return 0;
865}
866#endif /* pud_write */
867
a00cc7d9
MW
868#if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \
869 (defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
870 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD))
871static inline int pud_trans_huge(pud_t pud)
872{
873 return 0;
874}
875#endif
876
26c19178
AA
877#ifndef pmd_read_atomic
878static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
879{
880 /*
881 * Depend on compiler for an atomic pmd read. NOTE: this is
882 * only going to work, if the pmdval_t isn't larger than
883 * an unsigned long.
884 */
885 return *pmdp;
886}
887#endif
888
953c66c2
AK
889#ifndef arch_needs_pgtable_deposit
890#define arch_needs_pgtable_deposit() (false)
891#endif
1a5a9906
AA
892/*
893 * This function is meant to be used by sites walking pagetables with
894 * the mmap_sem hold in read mode to protect against MADV_DONTNEED and
895 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
896 * into a null pmd and the transhuge page fault can convert a null pmd
897 * into an hugepmd or into a regular pmd (if the hugepage allocation
898 * fails). While holding the mmap_sem in read mode the pmd becomes
899 * stable and stops changing under us only if it's not null and not a
900 * transhuge pmd. When those races occurs and this function makes a
901 * difference vs the standard pmd_none_or_clear_bad, the result is
902 * undefined so behaving like if the pmd was none is safe (because it
903 * can return none anyway). The compiler level barrier() is critically
904 * important to compute the two checks atomically on the same pmdval.
26c19178
AA
905 *
906 * For 32bit kernels with a 64bit large pmd_t this automatically takes
907 * care of reading the pmd atomically to avoid SMP race conditions
908 * against pmd_populate() when the mmap_sem is hold for reading by the
909 * caller (a special atomic read not done by "gcc" as in the generic
910 * version above, is also needed when THP is disabled because the page
911 * fault can populate the pmd from under us).
1a5a9906
AA
912 */
913static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
914{
26c19178 915 pmd_t pmdval = pmd_read_atomic(pmd);
1a5a9906
AA
916 /*
917 * The barrier will stabilize the pmdval in a register or on
918 * the stack so that it will stop changing under the code.
e4eed03f
AA
919 *
920 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
921 * pmd_read_atomic is allowed to return a not atomic pmdval
922 * (for example pointing to an hugepage that has never been
923 * mapped in the pmd). The below checks will only care about
924 * the low part of the pmd with 32bit PAE x86 anyway, with the
925 * exception of pmd_none(). So the important thing is that if
926 * the low part of the pmd is found null, the high part will
927 * be also null or the pmd_none() check below would be
928 * confused.
1a5a9906
AA
929 */
930#ifdef CONFIG_TRANSPARENT_HUGEPAGE
931 barrier();
932#endif
84c3fc4e
ZY
933 /*
934 * !pmd_present() checks for pmd migration entries
935 *
936 * The complete check uses is_pmd_migration_entry() in linux/swapops.h
937 * But using that requires moving current function and pmd_trans_unstable()
938 * to linux/swapops.h to resovle dependency, which is too much code move.
939 *
940 * !pmd_present() is equivalent to is_pmd_migration_entry() currently,
941 * because !pmd_present() pages can only be under migration not swapped
942 * out.
943 *
944 * pmd_none() is preseved for future condition checks on pmd migration
945 * entries and not confusing with this function name, although it is
946 * redundant with !pmd_present().
947 */
948 if (pmd_none(pmdval) || pmd_trans_huge(pmdval) ||
949 (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval)))
1a5a9906
AA
950 return 1;
951 if (unlikely(pmd_bad(pmdval))) {
ee53664b 952 pmd_clear_bad(pmd);
1a5a9906
AA
953 return 1;
954 }
955 return 0;
956}
957
958/*
959 * This is a noop if Transparent Hugepage Support is not built into
960 * the kernel. Otherwise it is equivalent to
961 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
962 * places that already verified the pmd is not none and they want to
963 * walk ptes while holding the mmap sem in read mode (write mode don't
964 * need this). If THP is not enabled, the pmd can't go away under the
965 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
966 * run a pmd_trans_unstable before walking the ptes after
967 * split_huge_page_pmd returns (because it may have run when the pmd
968 * become null, but then a page fault can map in a THP and not a
969 * regular page).
970 */
971static inline int pmd_trans_unstable(pmd_t *pmd)
972{
973#ifdef CONFIG_TRANSPARENT_HUGEPAGE
974 return pmd_none_or_trans_huge_or_clear_bad(pmd);
975#else
976 return 0;
5f6e8da7 977#endif
1a5a9906
AA
978}
979
e7bb4b6d
MG
980#ifndef CONFIG_NUMA_BALANCING
981/*
982 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
983 * the only case the kernel cares is for NUMA balancing and is only ever set
984 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked
985 * _PAGE_PROTNONE so by by default, implement the helper as "always no". It
986 * is the responsibility of the caller to distinguish between PROT_NONE
987 * protections and NUMA hinting fault protections.
988 */
989static inline int pte_protnone(pte_t pte)
990{
991 return 0;
992}
993
994static inline int pmd_protnone(pmd_t pmd)
995{
996 return 0;
997}
998#endif /* CONFIG_NUMA_BALANCING */
999
1a5a9906 1000#endif /* CONFIG_MMU */
5f6e8da7 1001
e61ce6ad 1002#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
c2febafc
KS
1003
1004#ifndef __PAGETABLE_P4D_FOLDED
1005int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot);
1006int p4d_clear_huge(p4d_t *p4d);
1007#else
1008static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1009{
1010 return 0;
1011}
1012static inline int p4d_clear_huge(p4d_t *p4d)
1013{
1014 return 0;
1015}
1016#endif /* !__PAGETABLE_P4D_FOLDED */
1017
e61ce6ad
TK
1018int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
1019int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
b9820d8f
TK
1020int pud_clear_huge(pud_t *pud);
1021int pmd_clear_huge(pmd_t *pmd);
785a19f9
CP
1022int pud_free_pmd_page(pud_t *pud, unsigned long addr);
1023int pmd_free_pte_page(pmd_t *pmd, unsigned long addr);
e61ce6ad 1024#else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
c2febafc
KS
1025static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1026{
1027 return 0;
1028}
e61ce6ad
TK
1029static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
1030{
1031 return 0;
1032}
1033static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
1034{
1035 return 0;
1036}
c2febafc
KS
1037static inline int p4d_clear_huge(p4d_t *p4d)
1038{
1039 return 0;
1040}
b9820d8f
TK
1041static inline int pud_clear_huge(pud_t *pud)
1042{
1043 return 0;
1044}
1045static inline int pmd_clear_huge(pmd_t *pmd)
1046{
1047 return 0;
1048}
785a19f9 1049static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr)
b6bdb751
TK
1050{
1051 return 0;
1052}
785a19f9 1053static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
b6bdb751
TK
1054{
1055 return 0;
1056}
e61ce6ad
TK
1057#endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
1058
458aa76d
AK
1059#ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
1060#ifdef CONFIG_TRANSPARENT_HUGEPAGE
1061/*
1062 * ARCHes with special requirements for evicting THP backing TLB entries can
1063 * implement this. Otherwise also, it can help optimize normal TLB flush in
1064 * THP regime. stock flush_tlb_range() typically has optimization to nuke the
1065 * entire TLB TLB if flush span is greater than a threshold, which will
1066 * likely be true for a single huge page. Thus a single thp flush will
1067 * invalidate the entire TLB which is not desitable.
1068 * e.g. see arch/arc: flush_pmd_tlb_range
1069 */
1070#define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
a00cc7d9 1071#define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
458aa76d
AK
1072#else
1073#define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
a00cc7d9 1074#define flush_pud_tlb_range(vma, addr, end) BUILD_BUG()
458aa76d
AK
1075#endif
1076#endif
1077
08ea8c07
BX
1078struct file;
1079int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
1080 unsigned long size, pgprot_t *vma_prot);
613e396b
TG
1081
1082#ifndef CONFIG_X86_ESPFIX64
1083static inline void init_espfix_bsp(void) { }
1084#endif
1085
6c26fcd2
JK
1086#ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED
1087static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot)
1088{
1089 return true;
1090}
1091
1092static inline bool arch_has_pfn_modify_check(void)
1093{
1094 return false;
1095}
1096#endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */
1097
a3266bd4
LR
1098/*
1099 * Architecture PAGE_KERNEL_* fallbacks
1100 *
1101 * Some architectures don't define certain PAGE_KERNEL_* flags. This is either
1102 * because they really don't support them, or the port needs to be updated to
1103 * reflect the required functionality. Below are a set of relatively safe
1104 * fallbacks, as best effort, which we can count on in lieu of the architectures
1105 * not defining them on their own yet.
1106 */
1107
1108#ifndef PAGE_KERNEL_RO
1109# define PAGE_KERNEL_RO PAGE_KERNEL
1110#endif
1111
1a9b4b3d
LR
1112#ifndef PAGE_KERNEL_EXEC
1113# define PAGE_KERNEL_EXEC PAGE_KERNEL
1114#endif
1115
1da177e4
LT
1116#endif /* !__ASSEMBLY__ */
1117
40d158e6
AV
1118#ifndef io_remap_pfn_range
1119#define io_remap_pfn_range remap_pfn_range
1120#endif
1121
fd8cfd30
HD
1122#ifndef has_transparent_hugepage
1123#ifdef CONFIG_TRANSPARENT_HUGEPAGE
1124#define has_transparent_hugepage() 1
1125#else
1126#define has_transparent_hugepage() 0
1127#endif
1128#endif
1129
1da177e4 1130#endif /* _ASM_GENERIC_PGTABLE_H */