[linux-2.6-block.git] / include / asm-generic / bitops / lock.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_GENERIC_BITOPS_LOCK_H_
#define _ASM_GENERIC_BITOPS_LOCK_H_

#include <linux/atomic.h>
#include <linux/compiler.h>
#include <asm/barrier.h>

/**
 * arch_test_and_set_bit_lock - Set a bit and return its old value, for lock
 * @nr: Bit to set
 * @addr: Address to count from
 *
 * This operation is atomic and provides acquire barrier semantics if
 * the returned value is 0.
 * It can be used to implement bit locks.
 */
static __always_inline int
arch_test_and_set_bit_lock(unsigned int nr, volatile unsigned long *p)
{
	long old;
	unsigned long mask = BIT_MASK(nr);

	p += BIT_WORD(nr);
	if (READ_ONCE(*p) & mask)
		return 1;

	old = raw_atomic_long_fetch_or_acquire(mask, (atomic_long_t *)p);
	return !!(old & mask);
}


/**
 * arch_clear_bit_unlock - Clear a bit in memory, for unlock
 * @nr: the bit to set
 * @addr: the address to start counting from
 *
 * This operation is atomic and provides release barrier semantics.
 */
static __always_inline void
arch_clear_bit_unlock(unsigned int nr, volatile unsigned long *p)
{
	p += BIT_WORD(nr);
	raw_atomic_long_fetch_andnot_release(BIT_MASK(nr), (atomic_long_t *)p);
}

/**
 * arch___clear_bit_unlock - Clear a bit in memory, for unlock
 * @nr: the bit to set
 * @addr: the address to start counting from
 *
 * A weaker form of clear_bit_unlock() as used by __bit_lock_unlock(). If all
 * the bits in the word are protected by this lock some archs can use weaker
 * ops to safely unlock.
 *
 * See for example x86's implementation.
 */
static inline void
arch___clear_bit_unlock(unsigned int nr, volatile unsigned long *p)
{
	unsigned long old;

	p += BIT_WORD(nr);
	old = READ_ONCE(*p);
	old &= ~BIT_MASK(nr);
	raw_atomic_long_set_release((atomic_long_t *)p, old);
}

/**
 * arch_clear_bit_unlock_is_negative_byte - Clear a bit in memory and test if bottom
 *                                          byte is negative, for unlock.
 * @nr: the bit to clear
 * @addr: the address to start counting from
 *
 * This is a bit of a one-trick-pony for the filemap code, which clears
 * PG_locked and tests PG_waiters,
 */
#ifndef arch_clear_bit_unlock_is_negative_byte
static inline bool arch_clear_bit_unlock_is_negative_byte(unsigned int nr,
							  volatile unsigned long *p)
{
	long old;
	unsigned long mask = BIT_MASK(nr);

	p += BIT_WORD(nr);
	old = raw_atomic_long_fetch_andnot_release(mask, (atomic_long_t *)p);
	return !!(old & BIT(7));
}
#define arch_clear_bit_unlock_is_negative_byte arch_clear_bit_unlock_is_negative_byte
#endif

#include <asm-generic/bitops/instrumented-lock.h>

#endif /* _ASM_GENERIC_BITOPS_LOCK_H_ */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
26333576 NP	2	#ifndef _ASM_GENERIC_BITOPS_LOCK_H_
	3	#define _ASM_GENERIC_BITOPS_LOCK_H_
	4
84c65911 WD	5	#include <linux/atomic.h>
	6	#include <linux/compiler.h>
	7	#include <asm/barrier.h>
	8
26333576	9	/**
cf3ee3c8	10	* arch_test_and_set_bit_lock - Set a bit and return its old value, for lock
26333576 NP	11	* @nr: Bit to set
	12	* @addr: Address to count from
	13	*
61e02392 WD	14	* This operation is atomic and provides acquire barrier semantics if
61e02392 WD	15	* the returned value is 0.
26333576 NP	16	* It can be used to implement bit locks.
26333576 NP	17	*/
cf3ee3c8 MR	18	static __always_inline int
cf3ee3c8 MR	19	arch_test_and_set_bit_lock(unsigned int nr, volatile unsigned long *p)
84c65911 WD	20	{
	21	long old;
	22	unsigned long mask = BIT_MASK(nr);
	23
	24	p += BIT_WORD(nr);
	25	if (READ_ONCE(*p) & mask)
	26	return 1;
	27
0f613bfa	28	old = raw_atomic_long_fetch_or_acquire(mask, (atomic_long_t *)p);
84c65911 WD	29	return !!(old & mask);
	30	}
	31
26333576 NP	32
26333576 NP	33	/**
cf3ee3c8	34	* arch_clear_bit_unlock - Clear a bit in memory, for unlock
26333576 NP	35	* @nr: the bit to set
	36	* @addr: the address to start counting from
	37	*
	38	* This operation is atomic and provides release barrier semantics.
	39	*/
cf3ee3c8 MR	40	static __always_inline void
cf3ee3c8 MR	41	arch_clear_bit_unlock(unsigned int nr, volatile unsigned long *p)
84c65911 WD	42	{
84c65911 WD	43	p += BIT_WORD(nr);
0f613bfa	44	raw_atomic_long_fetch_andnot_release(BIT_MASK(nr), (atomic_long_t *)p);
84c65911	45	}
26333576 NP	46
26333576 NP	47	/**
cf3ee3c8	48	* arch___clear_bit_unlock - Clear a bit in memory, for unlock
26333576 NP	49	* @nr: the bit to set
	50	* @addr: the address to start counting from
	51	*
f75d4864 PZ	52	* A weaker form of clear_bit_unlock() as used by __bit_lock_unlock(). If all
	53	* the bits in the word are protected by this lock some archs can use weaker
	54	* ops to safely unlock.
	55	*
	56	* See for example x86's implementation.
26333576	57	*/
cf3ee3c8 MR	58	static inline void
cf3ee3c8 MR	59	arch___clear_bit_unlock(unsigned int nr, volatile unsigned long *p)
84c65911 WD	60	{
84c65911 WD	61	unsigned long old;
26333576	62
84c65911 WD	63	p += BIT_WORD(nr);
	64	old = READ_ONCE(*p);
	65	old &= ~BIT_MASK(nr);
0f613bfa	66	raw_atomic_long_set_release((atomic_long_t *)p, old);
84c65911 WD	67	}
	68
	69	/**
cf3ee3c8 MR	70	* arch_clear_bit_unlock_is_negative_byte - Clear a bit in memory and test if bottom
cf3ee3c8 MR	71	* byte is negative, for unlock.
84c65911 WD	72	* @nr: the bit to clear
	73	* @addr: the address to start counting from
	74	*
	75	* This is a bit of a one-trick-pony for the filemap code, which clears
	76	* PG_locked and tests PG_waiters,
	77	*/
cf3ee3c8 MR	78	#ifndef arch_clear_bit_unlock_is_negative_byte
	79	static inline bool arch_clear_bit_unlock_is_negative_byte(unsigned int nr,
	80	volatile unsigned long *p)
84c65911 WD	81	{
	82	long old;
	83	unsigned long mask = BIT_MASK(nr);
	84
	85	p += BIT_WORD(nr);
0f613bfa	86	old = raw_atomic_long_fetch_andnot_release(mask, (atomic_long_t *)p);
84c65911 WD	87	return !!(old & BIT(7));
84c65911 WD	88	}
cf3ee3c8	89	#define arch_clear_bit_unlock_is_negative_byte arch_clear_bit_unlock_is_negative_byte
84c65911	90	#endif
26333576	91
cf3ee3c8 MR	92	#include <asm-generic/bitops/instrumented-lock.h>
cf3ee3c8 MR	93
84c65911	94	#endif /* _ASM_GENERIC_BITOPS_LOCK_H_ */