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51533b61 MS |
1 | /* Interrupt vector numbers autogenerated by /n/asic/design/tools/rdesc/src/rdes2intr version |
2 | from ../../inst/crisp/doc/cpu_vect.r | |
3 | version . */ | |
4 | ||
5 | #ifndef _______INST_CRISP_DOC_CPU_VECT_R | |
6 | #define _______INST_CRISP_DOC_CPU_VECT_R | |
7 | #define NMI_INTR_VECT 0x00 | |
8 | #define RESERVED_1_INTR_VECT 0x01 | |
9 | #define RESERVED_2_INTR_VECT 0x02 | |
10 | #define SINGLE_STEP_INTR_VECT 0x03 | |
11 | #define INSTR_TLB_REFILL_INTR_VECT 0x04 | |
12 | #define INSTR_TLB_INV_INTR_VECT 0x05 | |
13 | #define INSTR_TLB_ACC_INTR_VECT 0x06 | |
14 | #define TLB_EX_INTR_VECT 0x07 | |
15 | #define DATA_TLB_REFILL_INTR_VECT 0x08 | |
16 | #define DATA_TLB_INV_INTR_VECT 0x09 | |
17 | #define DATA_TLB_ACC_INTR_VECT 0x0a | |
18 | #define DATA_TLB_WE_INTR_VECT 0x0b | |
19 | #define HW_BP_INTR_VECT 0x0c | |
20 | #define RESERVED_D_INTR_VECT 0x0d | |
21 | #define RESERVED_E_INTR_VECT 0x0e | |
22 | #define RESERVED_F_INTR_VECT 0x0f | |
23 | #define BREAK_0_INTR_VECT 0x10 | |
24 | #define BREAK_1_INTR_VECT 0x11 | |
25 | #define BREAK_2_INTR_VECT 0x12 | |
26 | #define BREAK_3_INTR_VECT 0x13 | |
27 | #define BREAK_4_INTR_VECT 0x14 | |
28 | #define BREAK_5_INTR_VECT 0x15 | |
29 | #define BREAK_6_INTR_VECT 0x16 | |
30 | #define BREAK_7_INTR_VECT 0x17 | |
31 | #define BREAK_8_INTR_VECT 0x18 | |
32 | #define BREAK_9_INTR_VECT 0x19 | |
33 | #define BREAK_10_INTR_VECT 0x1a | |
34 | #define BREAK_11_INTR_VECT 0x1b | |
35 | #define BREAK_12_INTR_VECT 0x1c | |
36 | #define BREAK_13_INTR_VECT 0x1d | |
37 | #define BREAK_14_INTR_VECT 0x1e | |
38 | #define BREAK_15_INTR_VECT 0x1f | |
39 | #define MULTIPLE_INTR_VECT 0x30 | |
40 | ||
41 | #endif |