[linux-2.6-block.git] / include / asm-blackfin / system.h

/*
 * File:        include/asm/system.h
 * Based on:
 * Author:      Tony Kou (tonyko@lineo.ca)
 *              Copyright (c) 2002 Arcturus Networks Inc.
 *                    (www.arcturusnetworks.com)
 *              Copyright (c) 2003 Metrowerks (www.metrowerks.com)
 *              Copyright (c) 2004 Analog Device Inc.
 * Created:     25Jan2001 - Tony Kou
 * Description: system.h include file
 *
 * Modified:     22Sep2006 - Robin Getz
 *                - move include blackfin.h down, so I can get access to
 *                   irq functions in other include files.
 *
 * Bugs:         Enter bugs at http://blackfin.uclinux.org/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2, or (at your option)
 * any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; see the file COPYING.
 * If not, write to the Free Software Foundation,
 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 */

#ifndef _BLACKFIN_SYSTEM_H
#define _BLACKFIN_SYSTEM_H

#include <linux/linkage.h>
#include <linux/compiler.h>

/*
 * Interrupt configuring macros.
 */

extern unsigned long irq_flags;

#define local_irq_enable() do {		\
	__asm__ __volatile__ (		\
		"sti %0;"		\
		::"d"(irq_flags));	\
} while (0)

#define local_irq_disable() do {	\
	int _tmp_dummy;			\
	__asm__ __volatile__ (		\
		"cli %0;"		\
		:"=d" (_tmp_dummy):);	\
} while (0)

#if defined(ANOMALY_05000244) && defined (CONFIG_BLKFIN_CACHE)
#define idle_with_irq_disabled() do {   \
        __asm__ __volatile__ (          \
                "nop; nop;\n"           \
                ".align 8;\n"           \
                "sti %0; idle;\n"       \
                ::"d" (irq_flags));     \
} while (0)
#else
#define idle_with_irq_disabled() do {   \
	__asm__ __volatile__ (          \
		".align 8;\n"           \
		"sti %0; idle;\n"       \
		::"d" (irq_flags));     \
} while (0)
#endif

#ifdef CONFIG_DEBUG_HWERR
#define __save_and_cli(x) do {			\
	__asm__ __volatile__ (		        \
		"cli %0;\n\tsti %1;"		\
		:"=&d"(x): "d" (0x3F));		\
} while (0)
#else
#define __save_and_cli(x) do {		\
	__asm__ __volatile__ (          \
		"cli %0;"		\
		:"=&d"(x):);		\
} while (0)
#endif

#define local_save_flags(x) asm volatile ("cli %0;"     \
					  "sti %0;"     \
				    	  :"=d"(x):);

#ifdef CONFIG_DEBUG_HWERR
#define irqs_enabled_from_flags(x) (((x) & ~0x3f) != 0)
#else
#define irqs_enabled_from_flags(x) ((x) != 0x1f)
#endif

#define local_irq_restore(x) do {			\
	if (irqs_enabled_from_flags(x))			\
		local_irq_enable ();			\
} while (0)

/* For spinlocks etc */
#define local_irq_save(x) __save_and_cli(x)

#define	irqs_disabled()				\
({						\
	unsigned long flags;			\
	local_save_flags(flags);		\
	!irqs_enabled_from_flags(flags);	\
})

/*
 * Force strict CPU ordering.
 */
#define nop()  asm volatile ("nop;\n\t"::)
#define mb()   asm volatile (""   : : :"memory")
#define rmb()  asm volatile (""   : : :"memory")
#define wmb()  asm volatile (""   : : :"memory")
#define set_rmb(var, value)    do { (void) xchg(&var, value); } while (0)
#define set_mb(var, value)     set_rmb(var, value)
#define set_wmb(var, value)    do { var = value; wmb(); } while (0)

#define read_barrier_depends() 		do { } while(0)

#ifdef CONFIG_SMP
#define smp_mb()	mb()
#define smp_rmb()	rmb()
#define smp_wmb()	wmb()
#define smp_read_barrier_depends()	read_barrier_depends()
#else
#define smp_mb()	barrier()
#define smp_rmb()	barrier()
#define smp_wmb()	barrier()
#define smp_read_barrier_depends()	do { } while(0)
#endif

#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
#define tas(ptr) ((void)xchg((ptr),1))

struct __xchg_dummy {
	unsigned long a[100];
};
#define __xg(x) ((volatile struct __xchg_dummy *)(x))

static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
				   int size)
{
	unsigned long tmp = 0;
	unsigned long flags = 0;

	local_irq_save(flags);

	switch (size) {
	case 1:
		__asm__ __volatile__
			("%0 = b%2 (z);\n\t"
			 "b%2 = %1;\n\t"
			 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
		break;
	case 2:
		__asm__ __volatile__
			("%0 = w%2 (z);\n\t"
			 "w%2 = %1;\n\t"
			 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
		break;
	case 4:
		__asm__ __volatile__
			("%0 = %2;\n\t"
			 "%2 = %1;\n\t"
			 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
		break;
	}
	local_irq_restore(flags);
	return tmp;
}

/*
 * Atomic compare and exchange.  Compare OLD with MEM, if identical,
 * store NEW in MEM.  Return the initial value in MEM.  Success is
 * indicated by comparing RETURN with OLD.
 */
static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
				      unsigned long new, int size)
{
	unsigned long tmp = 0;
	unsigned long flags = 0;

	local_irq_save(flags);

	switch (size) {
	case 1:
		__asm__ __volatile__
			("%0 = b%3 (z);\n\t"
			 "CC = %1 == %0;\n\t"
			 "IF !CC JUMP 1f;\n\t"
			 "b%3 = %2;\n\t"
			 "1:\n\t"
			 : "=&d" (tmp) : "d" (old), "d" (new), "m" (*__xg(ptr)) : "memory");
		break;
	case 2:
		__asm__ __volatile__
			("%0 = w%3 (z);\n\t"
			 "CC = %1 == %0;\n\t"
			 "IF !CC JUMP 1f;\n\t"
			 "w%3 = %2;\n\t"
			 "1:\n\t"
			 : "=&d" (tmp) : "d" (old), "d" (new), "m" (*__xg(ptr)) : "memory");
		break;
	case 4:
		__asm__ __volatile__
			("%0 = %3;\n\t"
			 "CC = %1 == %0;\n\t"
			 "IF !CC JUMP 1f;\n\t"
			 "%3 = %2;\n\t"
			 "1:\n\t"
			 : "=&d" (tmp) : "d" (old), "d" (new), "m" (*__xg(ptr)) : "memory");
		break;
	}
	local_irq_restore(flags);
	return tmp;
}

#define cmpxchg(ptr,o,n)\
        ((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o),\
                                        (unsigned long)(n),sizeof(*(ptr))))

#define prepare_to_switch()     do { } while(0)

/*
 * switch_to(n) should switch tasks to task ptr, first checking that
 * ptr isn't the current task, in which case it does nothing.
 */

#include <asm/blackfin.h>

asmlinkage struct task_struct *resume(struct task_struct *prev, struct task_struct *next);

#define switch_to(prev,next,last) \
do {    \
	memcpy (&prev->thread_info->l1_task_info, L1_SCRATCH_TASK_INFO, \
		sizeof *L1_SCRATCH_TASK_INFO); \
	memcpy (L1_SCRATCH_TASK_INFO, &next->thread_info->l1_task_info, \
		sizeof *L1_SCRATCH_TASK_INFO); \
	(last) = resume (prev, next);   \
} while (0)

#endif				/* _BLACKFIN_SYSTEM_H */
Commit	Line	Data
1394f032 BW	1	/*
	2	* File: include/asm/system.h
	3	* Based on:
	4	* Author: Tony Kou (tonyko@lineo.ca)
	5	* Copyright (c) 2002 Arcturus Networks Inc.
	6	* (www.arcturusnetworks.com)
	7	* Copyright (c) 2003 Metrowerks (www.metrowerks.com)
	8	* Copyright (c) 2004 Analog Device Inc.
	9	* Created: 25Jan2001 - Tony Kou
	10	* Description: system.h include file
	11	*
	12	* Modified: 22Sep2006 - Robin Getz
	13	* - move include blackfin.h down, so I can get access to
	14	* irq functions in other include files.
	15	*
	16	* Bugs: Enter bugs at http://blackfin.uclinux.org/
	17	*
	18	* This program is free software; you can redistribute it and/or modify
	19	* it under the terms of the GNU General Public License as published by
	20	* the Free Software Foundation; either version 2, or (at your option)
	21	* any later version.
	22	*
	23	* This program is distributed in the hope that it will be useful,
	24	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	25	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	26	* GNU General Public License for more details.
	27	*
	28	* You should have received a copy of the GNU General Public License
	29	* along with this program; see the file COPYING.
	30	* If not, write to the Free Software Foundation,
	31	* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
	32	*/
	33
	34	#ifndef _BLACKFIN_SYSTEM_H
	35	#define _BLACKFIN_SYSTEM_H
	36
	37	#include <linux/linkage.h>
	38	#include <linux/compiler.h>
	39
	40	/*
	41	* Interrupt configuring macros.
	42	*/
	43
	44	extern unsigned long irq_flags;
	45
	46	#define local_irq_enable() do { \
	47	__asm__ __volatile__ ( \
	48	"sti %0;" \
	49	::"d"(irq_flags)); \
	50	} while (0)
	51
	52	#define local_irq_disable() do { \
	53	int _tmp_dummy; \
	54	__asm__ __volatile__ ( \
	55	"cli %0;" \
	56	:"=d" (_tmp_dummy):); \
	57	} while (0)
	58
	59	#if defined(ANOMALY_05000244) && defined (CONFIG_BLKFIN_CACHE)
	60	#define idle_with_irq_disabled() do { \
	61	__asm__ __volatile__ ( \
	62	"nop; nop;\n" \
	63	".align 8;\n" \
	64	"sti %0; idle;\n" \
65	::"d" (irq_flags)); \
66	} while (0)
67	#else
68	#define idle_with_irq_disabled() do { \
69	__asm__ __volatile__ ( \
70	".align 8;\n" \
71	"sti %0; idle;\n" \
72	::"d" (irq_flags)); \
73	} while (0)
74	#endif
75
76	#ifdef CONFIG_DEBUG_HWERR
77	#define __save_and_cli(x) do { \
78	__asm__ __volatile__ ( \
79	"cli %0;\n\tsti %1;" \
80	:"=&d"(x): "d" (0x3F)); \
81	} while (0)
82	#else
83	#define __save_and_cli(x) do { \
84	__asm__ __volatile__ ( \
85	"cli %0;" \
86	:"=&d"(x):); \
87	} while (0)
88	#endif
89
90	#define local_save_flags(x) asm volatile ("cli %0;" \
91	"sti %0;" \
92	:"=d"(x):);
93
94	#ifdef CONFIG_DEBUG_HWERR
95	#define irqs_enabled_from_flags(x) (((x) & ~0x3f) != 0)
96	#else
97	#define irqs_enabled_from_flags(x) ((x) != 0x1f)
98	#endif
99
100	#define local_irq_restore(x) do { \
101	if (irqs_enabled_from_flags(x)) \
102	local_irq_enable (); \
103	} while (0)
104
105	/* For spinlocks etc */
106	#define local_irq_save(x) __save_and_cli(x)
107
108	#define irqs_disabled() \
109	({ \
110	unsigned long flags; \
111	local_save_flags(flags); \
112	!irqs_enabled_from_flags(flags); \
113	})
114
115	/*
116	* Force strict CPU ordering.
117	*/
118	#define nop() asm volatile ("nop;\n\t"::)
119	#define mb() asm volatile ("" : : :"memory")
120	#define rmb() asm volatile ("" : : :"memory")
121	#define wmb() asm volatile ("" : : :"memory")
122	#define set_rmb(var, value) do { (void) xchg(&var, value); } while (0)
123	#define set_mb(var, value) set_rmb(var, value)
124	#define set_wmb(var, value) do { var = value; wmb(); } while (0)
125
126	#define read_barrier_depends() do { } while(0)
127
128	#ifdef CONFIG_SMP
129	#define smp_mb() mb()
130	#define smp_rmb() rmb()
131	#define smp_wmb() wmb()
132	#define smp_read_barrier_depends() read_barrier_depends()
133	#else
134	#define smp_mb() barrier()
135	#define smp_rmb() barrier()
136	#define smp_wmb() barrier()
137	#define smp_read_barrier_depends() do { } while(0)
138	#endif
139
140	#define xchg(ptr,x) ((__typeof__((ptr)))__xchg((unsigned long)(x),(ptr),sizeof((ptr))))
141	#define tas(ptr) ((void)xchg((ptr),1))
142
143	struct __xchg_dummy {
144	unsigned long a[100];
145	};
146	#define __xg(x) ((volatile struct __xchg_dummy *)(x))
147
148	static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
149	int size)
150	{
151	unsigned long tmp = 0;
152	unsigned long flags = 0;
153
154	local_irq_save(flags);
155
156	switch (size) {
157	case 1:
158	__asm__ __volatile__
159	("%0 = b%2 (z);\n\t"
160	"b%2 = %1;\n\t"
161	: "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
162	break;
163	case 2:
164	__asm__ __volatile__
165	("%0 = w%2 (z);\n\t"
166	"w%2 = %1;\n\t"
167	: "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
168	break;
169	case 4:
170	__asm__ __volatile__
171	("%0 = %2;\n\t"
172	"%2 = %1;\n\t"
173	: "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
174	break;
175	}
176	local_irq_restore(flags);
177	return tmp;
178	}
179
180	/*
181	* Atomic compare and exchange. Compare OLD with MEM, if identical,
182	* store NEW in MEM. Return the initial value in MEM. Success is
183	* indicated by comparing RETURN with OLD.
184	*/
185	static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
186	unsigned long new, int size)
187	{
188	unsigned long tmp = 0;
189	unsigned long flags = 0;
190
191	local_irq_save(flags);
192
193	switch (size) {
194	case 1:
195	__asm__ __volatile__
196	("%0 = b%3 (z);\n\t"
197	"CC = %1 == %0;\n\t"
198	"IF !CC JUMP 1f;\n\t"
199	"b%3 = %2;\n\t"
200	"1:\n\t"
201	: "=&d" (tmp) : "d" (old), "d" (new), "m" (*__xg(ptr)) : "memory");
202	break;
203	case 2:
204	__asm__ __volatile__
205	("%0 = w%3 (z);\n\t"
206	"CC = %1 == %0;\n\t"
207	"IF !CC JUMP 1f;\n\t"
208	"w%3 = %2;\n\t"
209	"1:\n\t"
210	: "=&d" (tmp) : "d" (old), "d" (new), "m" (*__xg(ptr)) : "memory");
211	break;
212	case 4:
213	__asm__ __volatile__
214	("%0 = %3;\n\t"
215	"CC = %1 == %0;\n\t"
216	"IF !CC JUMP 1f;\n\t"
217	"%3 = %2;\n\t"
218	"1:\n\t"
219	: "=&d" (tmp) : "d" (old), "d" (new), "m" (*__xg(ptr)) : "memory");
220	break;
221	}
222	local_irq_restore(flags);
223	return tmp;
224	}
225
226	#define cmpxchg(ptr,o,n)\
227	((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o),\
228	(unsigned long)(n),sizeof(*(ptr))))
229
230	#define prepare_to_switch() do { } while(0)
231
232	/*
233	* switch_to(n) should switch tasks to task ptr, first checking that
234	* ptr isn't the current task, in which case it does nothing.
235	*/
236
237	#include <asm/blackfin.h>
238
239	asmlinkage struct task_struct resume(struct task_struct prev, struct task_struct *next);
240
241	#define switch_to(prev,next,last) \
242	do { \
243	memcpy (&prev->thread_info->l1_task_info, L1_SCRATCH_TASK_INFO, \
244	sizeof *L1_SCRATCH_TASK_INFO); \
245	memcpy (L1_SCRATCH_TASK_INFO, &next->thread_info->l1_task_info, \
246	sizeof *L1_SCRATCH_TASK_INFO); \
247	(last) = resume (prev, next); \
248	} while (0)
249
250	#endif /* _BLACKFIN_SYSTEM_H */