[linux-2.6-block.git] / include / asm-blackfin / cplbinit.h

/*
 * File:         include/asm-blackfin/cplbinit.h
 * Based on:
 * Author:
 *
 * Created:
 * Description:
 *
 * Modified:
 *               Copyright 2004-2006 Analog Devices Inc.
 *
 * Bugs:         Enter bugs at http://blackfin.uclinux.org/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, see the file COPYING, or write
 * to the Free Software Foundation, Inc.,
 * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

#ifndef __ASM_CPLBINIT_H__
#define __ASM_CPLBINIT_H__

#include <asm/blackfin.h>
#include <asm/cplb.h>

#ifdef CONFIG_MPU

#include <asm/cplb-mpu.h>

#else

#define INITIAL_T 0x1
#define SWITCH_T  0x2
#define I_CPLB    0x4
#define D_CPLB    0x8

#define IN_KERNEL 1

enum
{ZERO_P, L1I_MEM, L1D_MEM, SDRAM_KERN , SDRAM_RAM_MTD, SDRAM_DMAZ, RES_MEM, ASYNC_MEM, L2_MEM};

struct cplb_desc {
	u32 start; /* start address */
	u32 end; /* end address */
	u32 psize; /* prefered size if any otherwise 1MB or 4MB*/
	u16 attr;/* attributes */
	u16 i_conf;/* I-CPLB DATA */
	u16 d_conf;/* D-CPLB DATA */
	u16 valid;/* valid */
	const s8 name[30];/* name */
};

struct cplb_tab {
  u_long *tab;
	u16 pos;
	u16 size;
};

extern u_long icplb_table[];
extern u_long dcplb_table[];

/* Till here we are discussing about the static memory management model.
 * However, the operating envoronments commonly define more CPLB
 * descriptors to cover the entire addressable memory than will fit into
 * the available on-chip 16 CPLB MMRs. When this happens, the below table
 * will be used which will hold all the potentially required CPLB descriptors
 *
 * This is how Page descriptor Table is implemented in uClinux/Blackfin.
 */

extern u_long ipdt_table[];
extern u_long dpdt_table[];
#ifdef CONFIG_CPLB_INFO
extern u_long ipdt_swapcount_table[];
extern u_long dpdt_swapcount_table[];
#endif

#endif /* CONFIG_MPU */

extern unsigned long reserved_mem_dcache_on;
extern unsigned long reserved_mem_icache_on;

extern void generate_cpl_tables(void);

#endif
Commit	Line	Data
1394f032 BW	1	/*
	2	* File: include/asm-blackfin/cplbinit.h
	3	* Based on:
	4	* Author:
	5	*
	6	* Created:
	7	* Description:
	8	*
	9	* Modified:
	10	* Copyright 2004-2006 Analog Devices Inc.
	11	*
	12	* Bugs: Enter bugs at http://blackfin.uclinux.org/
	13	*
	14	* This program is free software; you can redistribute it and/or modify
	15	* it under the terms of the GNU General Public License as published by
	16	* the Free Software Foundation; either version 2 of the License, or
	17	* (at your option) any later version.
	18	*
	19	* This program is distributed in the hope that it will be useful,
	20	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	21	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	22	* GNU General Public License for more details.
	23	*
	24	* You should have received a copy of the GNU General Public License
	25	* along with this program; if not, see the file COPYING, or write
	26	* to the Free Software Foundation, Inc.,
	27	* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	28	*/
	29
81a487a5 MF	30	#ifndef __ASM_CPLBINIT_H__
	31	#define __ASM_CPLBINIT_H__
	32
1394f032 BW	33	#include <asm/blackfin.h>
	34	#include <asm/cplb.h>
	35
b97b8a99 BS	36	#ifdef CONFIG_MPU
	37
	38	#include <asm/cplb-mpu.h>
	39
	40	#else
	41
1394f032 BW	42	#define INITIAL_T 0x1
	43	#define SWITCH_T 0x2
	44	#define I_CPLB 0x4
	45	#define D_CPLB 0x8
	46
	47	#define IN_KERNEL 1
	48
	49	enum
	50	{ZERO_P, L1I_MEM, L1D_MEM, SDRAM_KERN , SDRAM_RAM_MTD, SDRAM_DMAZ, RES_MEM, ASYNC_MEM, L2_MEM};
	51
	52	struct cplb_desc {
	53	u32 start; /* start address */
	54	u32 end; /* end address */
	55	u32 psize; /* prefered size if any otherwise 1MB or 4MB*/
	56	u16 attr;/* attributes */
	57	u16 i_conf;/* I-CPLB DATA */
	58	u16 d_conf;/* D-CPLB DATA */
	59	u16 valid;/* valid */
	60	const s8 name[30];/* name */
	61	};
	62
	63	struct cplb_tab {
	64	u_long *tab;
	65	u16 pos;
	66	u16 size;
	67	};
	68
81a487a5 MF	69	extern u_long icplb_table[];
81a487a5 MF	70	extern u_long dcplb_table[];
1394f032 BW	71
	72	/* Till here we are discussing about the static memory management model.
	73	* However, the operating envoronments commonly define more CPLB
	74	* descriptors to cover the entire addressable memory than will fit into
	75	* the available on-chip 16 CPLB MMRs. When this happens, the below table
	76	* will be used which will hold all the potentially required CPLB descriptors
	77	*
	78	* This is how Page descriptor Table is implemented in uClinux/Blackfin.
	79	*/
	80
81a487a5 MF	81	extern u_long ipdt_table[];
81a487a5 MF	82	extern u_long dpdt_table[];
1394f032	83	#ifdef CONFIG_CPLB_INFO
81a487a5 MF	84	extern u_long ipdt_swapcount_table[];
	85	extern u_long dpdt_swapcount_table[];
	86	#endif
1394f032	87
b97b8a99 BS	88	#endif /* CONFIG_MPU */
b97b8a99 BS	89
29440a2b BS	90	extern unsigned long reserved_mem_dcache_on;
29440a2b BS	91	extern unsigned long reserved_mem_icache_on;
1394f032	92
29440a2b	93	extern void generate_cpl_tables(void);
81a487a5 MF	94
81a487a5 MF	95	#endif