projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* |
| 2 | * linux/include/asm-arm/arch-arc/hardware.h | |
| 3 | * | |
| 4 | * Copyright (C) 1996-1999 Russell King. | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License version 2 as | |
| 8 | * published by the Free Software Foundation. | |
| 9 | * | |
| 10 | * This file contains the hardware definitions of the | |
| 11 | * Acorn Archimedes/A5000 machines. | |
| 12 | * | |
| 13 | * Modifications: | |
| 14 | * 04-04-1998 PJB/RMK Merged arc and a5k versions | |
| 15 | */ | |
| 16 | #ifndef __ASM_HARDWARE_H | |
| 17 | #define __ASM_HARDWARE_H | |
| 18 | ||
| 1da177e4 LT |
19 | |
| 20 | ||
| 21 | /* | |
| 22 | * What hardware must be present - these can be tested by the kernel | |
| 23 | * source. | |
| 24 | */ | |
| 25 | #define HAS_IOC | |
| 26 | #define HAS_MEMC | |
| 27 | #define HAS_VIDC | |
| 28 | ||
| 29 | #define VDMA_ALIGNMENT PAGE_SIZE | |
| 30 | #define VDMA_XFERSIZE 16 | |
| 31 | #define VDMA_INIT 0 | |
| 32 | #define VDMA_START 1 | |
| 33 | #define VDMA_END 2 | |
| 34 | ||
| 35 | #ifndef __ASSEMBLY__ | |
| 36 | extern void memc_write(unsigned int reg, unsigned long val); | |
| 37 | ||
| 38 | #define video_set_dma(start,end,offset) \ | |
| 39 | do { \ | |
| 40 | memc_write (VDMA_START, (start >> 2)); \ | |
| 41 | memc_write (VDMA_END, (end - VDMA_XFERSIZE) >> 2); \ | |
| 42 | memc_write (VDMA_INIT, (offset >> 2)); \ | |
| 43 | } while (0) | |
| 44 | #endif | |
| 45 | ||
| 46 | ||
| 47 | /* Hardware addresses of major areas. | |
| 48 | * *_START is the physical address | |
| 49 | * *_SIZE is the size of the region | |
| 50 | * *_BASE is the virtual address | |
| 51 | */ | |
| 52 | #define IO_START 0x03000000 | |
| 53 | #define IO_SIZE 0x01000000 | |
| 54 | #define IO_BASE 0x03000000 | |
| 55 | ||
| 56 | /* | |
| 57 | * Screen mapping information | |
| 58 | */ | |
| 59 | #define SCREEN_START 0x02000000 | |
| 60 | #define SCREEN_END 0x02078000 | |
| 61 | #define SCREEN_SIZE 0x00078000 | |
| 62 | #define SCREEN_BASE 0x02000000 | |
| 63 | ||
| 64 | ||
| 65 | #define EXPMASK_BASE 0x03360000 | |
| 66 | #define IOEB_BASE 0x03350000 | |
| 67 | #define VIDC_BASE 0x03400000 | |
| 68 | #define LATCHA_BASE 0x03250040 | |
| 69 | #define LATCHB_BASE 0x03250018 | |
| 70 | #define IOC_BASE 0x03200000 | |
| 71 | #define FLOPPYDMA_BASE 0x0302a000 | |
| 72 | #define PCIO_BASE 0x03010000 | |
| 73 | ||
| 74 | // FIXME - are the below correct? | |
| 75 | #define PODSLOT_IOC0_BASE 0x03240000 | |
| 76 | #define PODSLOT_IOC_SIZE (1 << 14) | |
| 77 | #define PODSLOT_MEMC_BASE 0x03000000 | |
| 78 | #define PODSLOT_MEMC_SIZE (1 << 14) | |
| 79 | ||
| 80 | #define vidc_writel(val) __raw_writel(val, VIDC_BASE) | |
| 81 | ||
| 82 | #ifndef __ASSEMBLY__ | |
| 83 | ||
| 84 | /* | |
| 85 | * for use with inb/outb | |
| 86 | */ | |
| 87 | #define IOEB_VID_CTL (IOEB_BASE + 0x48) | |
| 88 | #define IOEB_PRESENT (IOEB_BASE + 0x50) | |
| 89 | #define IOEB_PSCLR (IOEB_BASE + 0x58) | |
| 90 | #define IOEB_MONTYPE (IOEB_BASE + 0x70) | |
| 91 | ||
| 92 | //FIXME - These adresses are weird - ISTR some weirdo address shifting stuff was going on here... | |
| 93 | #define IO_EC_IOC_BASE 0x80090000 | |
| 94 | #define IO_EC_MEMC_BASE 0x80000000 | |
| 95 | ||
| 96 | #ifdef CONFIG_ARCH_ARC | |
| 97 | /* A680 hardware */ | |
| 98 | #define WD1973_BASE 0x03290000 | |
| 99 | #define WD1973_LATCH 0x03350000 | |
| 100 | #define Z8530_BASE 0x032b0008 | |
| 101 | #define SCSI_BASE 0x03100000 | |
| 102 | #endif | |
| 103 | ||
| 104 | #endif | |
| 105 | ||
| 106 | #define EXPMASK_STATUS (EXPMASK_BASE + 0x00) | |
| 107 | #define EXPMASK_ENABLE (EXPMASK_BASE + 0x04) | |
| 108 | ||
| 109 | #endif |