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abc0197d LB |
1 | /* |
2 | * include/asm-arm/plat-orion/pcie.h | |
3 | * | |
4 | * Marvell Orion SoC PCIe handling. | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public | |
7 | * License version 2. This program is licensed "as is" without any | |
8 | * warranty of any kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | #ifndef __ASM_PLAT_ORION_PCIE_H | |
12 | #define __ASM_PLAT_ORION_PCIE_H | |
13 | ||
14 | u32 orion_pcie_dev_id(void __iomem *base); | |
15 | u32 orion_pcie_rev(void __iomem *base); | |
16 | int orion_pcie_link_up(void __iomem *base); | |
a9311cfe | 17 | int orion_pcie_x4_mode(void __iomem *base); |
abc0197d LB |
18 | int orion_pcie_get_local_bus_nr(void __iomem *base); |
19 | void orion_pcie_set_local_bus_nr(void __iomem *base, int nr); | |
20 | void orion_pcie_setup(void __iomem *base, | |
21 | struct mbus_dram_target_info *dram); | |
22 | int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, | |
23 | u32 devfn, int where, int size, u32 *val); | |
24 | int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus, | |
25 | u32 devfn, int where, int size, u32 *val); | |
26 | int orion_pcie_rd_conf_wa(void __iomem *wa_base, struct pci_bus *bus, | |
27 | u32 devfn, int where, int size, u32 *val); | |
28 | int orion_pcie_wr_conf(void __iomem *base, struct pci_bus *bus, | |
29 | u32 devfn, int where, int size, u32 val); | |
30 | ||
31 | ||
32 | #endif |