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9dd0b194 LB |
1 | /* |
2 | * include/asm-arm/arch-orion5x/irqs.h | |
3 | * | |
4 | * IRQ definitions for Orion SoC | |
5 | * | |
6 | * Maintainer: Tzachi Perelstein <tzachi@marvell.com> | |
7 | * | |
8 | * This file is licensed under the terms of the GNU General Public | |
9 | * License version 2. This program is licensed "as is" without any | |
10 | * warranty of any kind, whether express or implied. | |
11 | */ | |
12 | ||
13 | #ifndef __ASM_ARCH_IRQS_H | |
14 | #define __ASM_ARCH_IRQS_H | |
15 | ||
16 | #include "orion5x.h" /* need GPIO_MAX */ | |
17 | ||
18 | /* | |
19 | * Orion Main Interrupt Controller | |
20 | */ | |
21 | #define IRQ_ORION5X_BRIDGE 0 | |
22 | #define IRQ_ORION5X_DOORBELL_H2C 1 | |
23 | #define IRQ_ORION5X_DOORBELL_C2H 2 | |
24 | #define IRQ_ORION5X_UART0 3 | |
25 | #define IRQ_ORION5X_UART1 4 | |
26 | #define IRQ_ORION5X_I2C 5 | |
27 | #define IRQ_ORION5X_GPIO_0_7 6 | |
28 | #define IRQ_ORION5X_GPIO_8_15 7 | |
29 | #define IRQ_ORION5X_GPIO_16_23 8 | |
30 | #define IRQ_ORION5X_GPIO_24_31 9 | |
31 | #define IRQ_ORION5X_PCIE0_ERR 10 | |
32 | #define IRQ_ORION5X_PCIE0_INT 11 | |
33 | #define IRQ_ORION5X_USB1_CTRL 12 | |
34 | #define IRQ_ORION5X_DEV_BUS_ERR 14 | |
35 | #define IRQ_ORION5X_PCI_ERR 15 | |
36 | #define IRQ_ORION5X_USB_BR_ERR 16 | |
37 | #define IRQ_ORION5X_USB0_CTRL 17 | |
38 | #define IRQ_ORION5X_ETH_RX 18 | |
39 | #define IRQ_ORION5X_ETH_TX 19 | |
40 | #define IRQ_ORION5X_ETH_MISC 20 | |
41 | #define IRQ_ORION5X_ETH_SUM 21 | |
42 | #define IRQ_ORION5X_ETH_ERR 22 | |
43 | #define IRQ_ORION5X_IDMA_ERR 23 | |
44 | #define IRQ_ORION5X_IDMA_0 24 | |
45 | #define IRQ_ORION5X_IDMA_1 25 | |
46 | #define IRQ_ORION5X_IDMA_2 26 | |
47 | #define IRQ_ORION5X_IDMA_3 27 | |
48 | #define IRQ_ORION5X_CESA 28 | |
49 | #define IRQ_ORION5X_SATA 29 | |
50 | #define IRQ_ORION5X_XOR0 30 | |
51 | #define IRQ_ORION5X_XOR1 31 | |
52 | ||
53 | /* | |
54 | * Orion General Purpose Pins | |
55 | */ | |
56 | #define IRQ_ORION5X_GPIO_START 32 | |
57 | #define NR_GPIO_IRQS GPIO_MAX | |
58 | ||
59 | #define NR_IRQS (IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS) | |
60 | ||
61 | ||
62 | #endif |