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1da177e4 LT |
1 | /* |
2 | * linux/include/asm-arm/arch-l7200/memory.h | |
3 | * | |
4 | * Copyright (c) 2000 Steve Hill (sjhill@cotw.com) | |
5 | * Copyright (c) 2000 Rob Scott (rscott@mtrob.fdns.net) | |
6 | * | |
7 | * Changelog: | |
8 | * 03-13-2000 SJH Created | |
9 | * 04-13-2000 RS Changed bus macros for new addr | |
10 | * 05-03-2000 SJH Removed bus macros and fixed virt_to_phys macro | |
11 | */ | |
12 | #ifndef __ASM_ARCH_MEMORY_H | |
13 | #define __ASM_ARCH_MEMORY_H | |
14 | ||
15 | /* | |
16 | * Physical DRAM offset on the L7200 SDB. | |
17 | */ | |
f09b9979 | 18 | #define PHYS_OFFSET UL(0xf0000000) |
1da177e4 LT |
19 | |
20 | #define __virt_to_bus(x) __virt_to_phys(x) | |
21 | #define __bus_to_virt(x) __phys_to_virt(x) | |
22 | ||
74d02fb9 RK |
23 | /* |
24 | * Cache flushing area - ROM | |
25 | */ | |
26 | #define FLUSH_BASE_PHYS 0x40000000 | |
27 | #define FLUSH_BASE 0xdf000000 | |
28 | ||
1da177e4 | 29 | #endif |