[linux-block.git] / include / acpi / cppc_acpi.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * CPPC (Collaborative Processor Performance Control) methods used
 * by CPUfreq drivers.
 *
 * (C) Copyright 2014, 2015 Linaro Ltd.
 * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
 */

#ifndef _CPPC_ACPI_H
#define _CPPC_ACPI_H

#include <linux/acpi.h>
#include <linux/cpufreq.h>
#include <linux/types.h>

#include <acpi/pcc.h>
#include <acpi/processor.h>

/* CPPCv2 and CPPCv3 support */
#define CPPC_V2_REV	2
#define CPPC_V3_REV	3
#define CPPC_V2_NUM_ENT	21
#define CPPC_V3_NUM_ENT	23

#define PCC_CMD_COMPLETE_MASK	(1 << 0)
#define PCC_ERROR_MASK		(1 << 2)

#define MAX_CPC_REG_ENT 21

/* CPPC specific PCC commands. */
#define	CMD_READ 0
#define	CMD_WRITE 1

/* Each register has the folowing format. */
struct cpc_reg {
	u8 descriptor;
	u16 length;
	u8 space_id;
	u8 bit_width;
	u8 bit_offset;
	u8 access_width;
	u64 address;
} __packed;

/*
 * Each entry in the CPC table is either
 * of type ACPI_TYPE_BUFFER or
 * ACPI_TYPE_INTEGER.
 */
struct cpc_register_resource {
	acpi_object_type type;
	u64 __iomem *sys_mem_vaddr;
	union {
		struct cpc_reg reg;
		u64 int_value;
	} cpc_entry;
};

/* Container to hold the CPC details for each CPU */
struct cpc_desc {
	int num_entries;
	int version;
	int cpu_id;
	int write_cmd_status;
	int write_cmd_id;
	struct cpc_register_resource cpc_regs[MAX_CPC_REG_ENT];
	struct acpi_psd_package domain_info;
	struct kobject kobj;
};

/* These are indexes into the per-cpu cpc_regs[]. Order is important. */
enum cppc_regs {
	HIGHEST_PERF,
	NOMINAL_PERF,
	LOW_NON_LINEAR_PERF,
	LOWEST_PERF,
	GUARANTEED_PERF,
	DESIRED_PERF,
	MIN_PERF,
	MAX_PERF,
	PERF_REDUC_TOLERANCE,
	TIME_WINDOW,
	CTR_WRAP_TIME,
	REFERENCE_CTR,
	DELIVERED_CTR,
	PERF_LIMITED,
	ENABLE,
	AUTO_SEL_ENABLE,
	AUTO_ACT_WINDOW,
	ENERGY_PERF,
	REFERENCE_PERF,
	LOWEST_FREQ,
	NOMINAL_FREQ,
};

/*
 * Categorization of registers as described
 * in the ACPI v.5.1 spec.
 * XXX: Only filling up ones which are used by governors
 * today.
 */
struct cppc_perf_caps {
	u32 guaranteed_perf;
	u32 highest_perf;
	u32 nominal_perf;
	u32 lowest_perf;
	u32 lowest_nonlinear_perf;
	u32 lowest_freq;
	u32 nominal_freq;
};

struct cppc_perf_ctrls {
	u32 max_perf;
	u32 min_perf;
	u32 desired_perf;
};

struct cppc_perf_fb_ctrs {
	u64 reference;
	u64 delivered;
	u64 reference_perf;
	u64 wraparound_time;
};

/* Per CPU container for runtime CPPC management. */
struct cppc_cpudata {
	struct list_head node;
	struct cppc_perf_caps perf_caps;
	struct cppc_perf_ctrls perf_ctrls;
	struct cppc_perf_fb_ctrs perf_fb_ctrs;
	unsigned int shared_type;
	cpumask_var_t shared_cpu_map;
};

#ifdef CONFIG_ACPI_CPPC_LIB
extern int cppc_get_desired_perf(int cpunum, u64 *desired_perf);
extern int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf);
extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs);
extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls);
extern int cppc_set_enable(int cpu, bool enable);
extern int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps);
extern bool acpi_cpc_valid(void);
extern bool cppc_allow_fast_switch(void);
extern int acpi_get_psd_map(unsigned int cpu, struct cppc_cpudata *cpu_data);
extern unsigned int cppc_get_transition_latency(int cpu);
extern bool cpc_ffh_supported(void);
extern bool cpc_supported_by_cpu(void);
extern int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val);
extern int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val);
#else /* !CONFIG_ACPI_CPPC_LIB */
static inline int cppc_get_desired_perf(int cpunum, u64 *desired_perf)
{
	return -ENOTSUPP;
}
static inline int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf)
{
	return -ENOTSUPP;
}
static inline int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs)
{
	return -ENOTSUPP;
}
static inline int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls)
{
	return -ENOTSUPP;
}
static inline int cppc_set_enable(int cpu, bool enable)
{
	return -ENOTSUPP;
}
static inline int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps)
{
	return -ENOTSUPP;
}
static inline bool acpi_cpc_valid(void)
{
	return false;
}
static inline bool cppc_allow_fast_switch(void)
{
	return false;
}
static inline unsigned int cppc_get_transition_latency(int cpu)
{
	return CPUFREQ_ETERNAL;
}
static inline bool cpc_ffh_supported(void)
{
	return false;
}
static inline int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val)
{
	return -ENOTSUPP;
}
static inline int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)
{
	return -ENOTSUPP;
}
#endif /* !CONFIG_ACPI_CPPC_LIB */

#endif /* _CPPC_ACPI_H*/
Commit	Line	Data
b886d83c	1	/* SPDX-License-Identifier: GPL-2.0-only */
337aadff AC	2	/*
	3	* CPPC (Collaborative Processor Performance Control) methods used
	4	* by CPUfreq drivers.
	5	*
	6	* (C) Copyright 2014, 2015 Linaro Ltd.
	7	* Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
337aadff AC	8	*/
	9
	10	#ifndef _CPPC_ACPI_H
	11	#define _CPPC_ACPI_H
	12
	13	#include <linux/acpi.h>
8a02d998	14	#include <linux/cpufreq.h>
337aadff AC	15	#include <linux/types.h>
337aadff AC	16
866ae696	17	#include <acpi/pcc.h>
337aadff AC	18	#include <acpi/processor.h>
337aadff AC	19
4f4179fc	20	/* CPPCv2 and CPPCv3 support */
4773e77c PP	21	#define CPPC_V2_REV 2
	22	#define CPPC_V3_REV 3
	23	#define CPPC_V2_NUM_ENT 21
	24	#define CPPC_V3_NUM_ENT 23
337aadff	25
139aee73 PP	26	#define PCC_CMD_COMPLETE_MASK (1 << 0)
	27	#define PCC_ERROR_MASK (1 << 2)
	28
4773e77c	29	#define MAX_CPC_REG_ENT 21
337aadff AC	30
	31	/* CPPC specific PCC commands. */
	32	#define CMD_READ 0
	33	#define CMD_WRITE 1
	34
	35	/* Each register has the folowing format. */
	36	struct cpc_reg {
	37	u8 descriptor;
	38	u16 length;
	39	u8 space_id;
	40	u8 bit_width;
	41	u8 bit_offset;
	42	u8 access_width;
d8f85cc0	43	u64 address;
337aadff AC	44	} __packed;
	45
	46	/*
	47	* Each entry in the CPC table is either
	48	* of type ACPI_TYPE_BUFFER or
	49	* ACPI_TYPE_INTEGER.
	50	*/
	51	struct cpc_register_resource {
	52	acpi_object_type type;
5bbb86aa	53	u64 __iomem *sys_mem_vaddr;
337aadff AC	54	union {
	55	struct cpc_reg reg;
	56	u64 int_value;
	57	} cpc_entry;
	58	};
	59
	60	/* Container to hold the CPC details for each CPU */
	61	struct cpc_desc {
	62	int num_entries;
	63	int version;
	64	int cpu_id;
80b8286a PP	65	int write_cmd_status;
80b8286a PP	66	int write_cmd_id;
337aadff AC	67	struct cpc_register_resource cpc_regs[MAX_CPC_REG_ENT];
337aadff AC	68	struct acpi_psd_package domain_info;
158c998e	69	struct kobject kobj;
337aadff AC	70	};
	71
	72	/* These are indexes into the per-cpu cpc_regs[]. Order is important. */
	73	enum cppc_regs {
	74	HIGHEST_PERF,
	75	NOMINAL_PERF,
	76	LOW_NON_LINEAR_PERF,
	77	LOWEST_PERF,
	78	GUARANTEED_PERF,
	79	DESIRED_PERF,
	80	MIN_PERF,
	81	MAX_PERF,
	82	PERF_REDUC_TOLERANCE,
	83	TIME_WINDOW,
	84	CTR_WRAP_TIME,
	85	REFERENCE_CTR,
	86	DELIVERED_CTR,
	87	PERF_LIMITED,
	88	ENABLE,
	89	AUTO_SEL_ENABLE,
	90	AUTO_ACT_WINDOW,
	91	ENERGY_PERF,
	92	REFERENCE_PERF,
4773e77c PP	93	LOWEST_FREQ,
4773e77c PP	94	NOMINAL_FREQ,
337aadff AC	95	};
	96
	97	/*
	98	* Categorization of registers as described
	99	* in the ACPI v.5.1 spec.
	100	* XXX: Only filling up ones which are used by governors
	101	* today.
	102	*/
	103	struct cppc_perf_caps {
29523f09	104	u32 guaranteed_perf;
337aadff AC	105	u32 highest_perf;
337aadff AC	106	u32 nominal_perf;
337aadff	107	u32 lowest_perf;
368520a6	108	u32 lowest_nonlinear_perf;
4773e77c PP	109	u32 lowest_freq;
4773e77c PP	110	u32 nominal_freq;
337aadff AC	111	};
	112
	113	struct cppc_perf_ctrls {
	114	u32 max_perf;
	115	u32 min_perf;
	116	u32 desired_perf;
	117	};
	118
	119	struct cppc_perf_fb_ctrs {
	120	u64 reference;
337aadff	121	u64 delivered;
158c998e	122	u64 reference_perf;
2c74d847	123	u64 wraparound_time;
337aadff AC	124	};
	125
	126	/* Per CPU container for runtime CPPC management. */
41dd6403	127	struct cppc_cpudata {
a28b2bfc	128	struct list_head node;
337aadff AC	129	struct cppc_perf_caps perf_caps;
	130	struct cppc_perf_ctrls perf_ctrls;
	131	struct cppc_perf_fb_ctrs perf_fb_ctrs;
337aadff AC	132	unsigned int shared_type;
	133	cpumask_var_t shared_cpu_map;
	134	};
	135
8a02d998	136	#ifdef CONFIG_ACPI_CPPC_LIB
1757d05f	137	extern int cppc_get_desired_perf(int cpunum, u64 *desired_perf);
0654cf05	138	extern int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf);
337aadff AC	139	extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs);
337aadff AC	140	extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls);
fb0b00af	141	extern int cppc_set_enable(int cpu, bool enable);
337aadff	142	extern int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps);
a28b2bfc	143	extern bool acpi_cpc_valid(void);
3cc30dd0	144	extern bool cppc_allow_fast_switch(void);
a28b2bfc	145	extern int acpi_get_psd_map(unsigned int cpu, struct cppc_cpudata *cpu_data);
be8b88d7	146	extern unsigned int cppc_get_transition_latency(int cpu);
ad3bc25a	147	extern bool cpc_ffh_supported(void);
8b356e53	148	extern bool cpc_supported_by_cpu(void);
ad3bc25a BP	149	extern int cpc_read_ffh(int cpunum, struct cpc_reg reg, u64 val);
ad3bc25a BP	150	extern int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val);
8a02d998 RW	151	#else /* !CONFIG_ACPI_CPPC_LIB */
	152	static inline int cppc_get_desired_perf(int cpunum, u64 *desired_perf)
	153	{
	154	return -ENOTSUPP;
	155	}
0654cf05 RW	156	static inline int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf)
	157	{
	158	return -ENOTSUPP;
	159	}
8a02d998 RW	160	static inline int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs)
	161	{
	162	return -ENOTSUPP;
	163	}
	164	static inline int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls)
	165	{
	166	return -ENOTSUPP;
	167	}
fb0b00af JS	168	static inline int cppc_set_enable(int cpu, bool enable)
	169	{
	170	return -ENOTSUPP;
	171	}
8a02d998 RW	172	static inline int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps)
	173	{
	174	return -ENOTSUPP;
	175	}
	176	static inline bool acpi_cpc_valid(void)
	177	{
	178	return false;
	179	}
3cc30dd0 PG	180	static inline bool cppc_allow_fast_switch(void)
	181	{
	182	return false;
	183	}
8a02d998 RW	184	static inline unsigned int cppc_get_transition_latency(int cpu)
	185	{
	186	return CPUFREQ_ETERNAL;
	187	}
	188	static inline bool cpc_ffh_supported(void)
	189	{
	190	return false;
	191	}
	192	static inline int cpc_read_ffh(int cpunum, struct cpc_reg reg, u64 val)
	193	{
	194	return -ENOTSUPP;
	195	}
	196	static inline int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)
	197	{
	198	return -ENOTSUPP;
	199	}
	200	#endif /* !CONFIG_ACPI_CPPC_LIB */
337aadff	201
337aadff	202	#endif /* _CPPC_ACPI_H*/