[linux-2.6-block.git] / include / acpi / cppc_acpi.h

/*
 * CPPC (Collaborative Processor Performance Control) methods used
 * by CPUfreq drivers.
 *
 * (C) Copyright 2014, 2015 Linaro Ltd.
 * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; version 2
 * of the License.
 */

#ifndef _CPPC_ACPI_H
#define _CPPC_ACPI_H

#include <linux/acpi.h>
#include <linux/types.h>

#include <acpi/pcc.h>
#include <acpi/processor.h>

/* Support CPPCv2 and CPPCv3  */
#define CPPC_V2_REV	2
#define CPPC_V3_REV	3
#define CPPC_V2_NUM_ENT	21
#define CPPC_V3_NUM_ENT	23

#define PCC_CMD_COMPLETE_MASK	(1 << 0)
#define PCC_ERROR_MASK		(1 << 2)

#define MAX_CPC_REG_ENT 21

/* CPPC specific PCC commands. */
#define	CMD_READ 0
#define	CMD_WRITE 1

/* Each register has the folowing format. */
struct cpc_reg {
	u8 descriptor;
	u16 length;
	u8 space_id;
	u8 bit_width;
	u8 bit_offset;
	u8 access_width;
	u64 __iomem address;
} __packed;

/*
 * Each entry in the CPC table is either
 * of type ACPI_TYPE_BUFFER or
 * ACPI_TYPE_INTEGER.
 */
struct cpc_register_resource {
	acpi_object_type type;
	u64 __iomem *sys_mem_vaddr;
	union {
		struct cpc_reg reg;
		u64 int_value;
	} cpc_entry;
};

/* Container to hold the CPC details for each CPU */
struct cpc_desc {
	int num_entries;
	int version;
	int cpu_id;
	int write_cmd_status;
	int write_cmd_id;
	struct cpc_register_resource cpc_regs[MAX_CPC_REG_ENT];
	struct acpi_psd_package domain_info;
	struct kobject kobj;
};

/* These are indexes into the per-cpu cpc_regs[]. Order is important. */
enum cppc_regs {
	HIGHEST_PERF,
	NOMINAL_PERF,
	LOW_NON_LINEAR_PERF,
	LOWEST_PERF,
	GUARANTEED_PERF,
	DESIRED_PERF,
	MIN_PERF,
	MAX_PERF,
	PERF_REDUC_TOLERANCE,
	TIME_WINDOW,
	CTR_WRAP_TIME,
	REFERENCE_CTR,
	DELIVERED_CTR,
	PERF_LIMITED,
	ENABLE,
	AUTO_SEL_ENABLE,
	AUTO_ACT_WINDOW,
	ENERGY_PERF,
	REFERENCE_PERF,
	LOWEST_FREQ,
	NOMINAL_FREQ,
};

/*
 * Categorization of registers as described
 * in the ACPI v.5.1 spec.
 * XXX: Only filling up ones which are used by governors
 * today.
 */
struct cppc_perf_caps {
	u32 guaranteed_perf;
	u32 highest_perf;
	u32 nominal_perf;
	u32 lowest_perf;
	u32 lowest_nonlinear_perf;
	u32 lowest_freq;
	u32 nominal_freq;
};

struct cppc_perf_ctrls {
	u32 max_perf;
	u32 min_perf;
	u32 desired_perf;
};

struct cppc_perf_fb_ctrs {
	u64 reference;
	u64 delivered;
	u64 reference_perf;
	u64 wraparound_time;
};

/* Per CPU container for runtime CPPC management. */
struct cppc_cpudata {
	int cpu;
	struct cppc_perf_caps perf_caps;
	struct cppc_perf_ctrls perf_ctrls;
	struct cppc_perf_fb_ctrs perf_fb_ctrs;
	struct cpufreq_policy *cur_policy;
	unsigned int shared_type;
	cpumask_var_t shared_cpu_map;
};

extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs);
extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls);
extern int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps);
extern int acpi_get_psd_map(struct cppc_cpudata **);
extern unsigned int cppc_get_transition_latency(int cpu);
extern bool cpc_ffh_supported(void);
extern int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val);
extern int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val);

#endif /* _CPPC_ACPI_H*/
Commit	Line	Data
337aadff AC	1	/*
	2	* CPPC (Collaborative Processor Performance Control) methods used
	3	* by CPUfreq drivers.
	4	*
	5	* (C) Copyright 2014, 2015 Linaro Ltd.
	6	* Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* as published by the Free Software Foundation; version 2
	11	* of the License.
	12	*/
	13
	14	#ifndef _CPPC_ACPI_H
	15	#define _CPPC_ACPI_H
	16
	17	#include <linux/acpi.h>
337aadff AC	18	#include <linux/types.h>
337aadff AC	19
866ae696	20	#include <acpi/pcc.h>
337aadff AC	21	#include <acpi/processor.h>
337aadff AC	22
4773e77c PP	23	/* Support CPPCv2 and CPPCv3 */
	24	#define CPPC_V2_REV 2
	25	#define CPPC_V3_REV 3
	26	#define CPPC_V2_NUM_ENT 21
	27	#define CPPC_V3_NUM_ENT 23
337aadff	28
139aee73 PP	29	#define PCC_CMD_COMPLETE_MASK (1 << 0)
	30	#define PCC_ERROR_MASK (1 << 2)
	31
4773e77c	32	#define MAX_CPC_REG_ENT 21
337aadff AC	33
	34	/* CPPC specific PCC commands. */
	35	#define CMD_READ 0
	36	#define CMD_WRITE 1
	37
	38	/* Each register has the folowing format. */
	39	struct cpc_reg {
	40	u8 descriptor;
	41	u16 length;
	42	u8 space_id;
	43	u8 bit_width;
	44	u8 bit_offset;
	45	u8 access_width;
	46	u64 __iomem address;
	47	} __packed;
	48
	49	/*
	50	* Each entry in the CPC table is either
	51	* of type ACPI_TYPE_BUFFER or
	52	* ACPI_TYPE_INTEGER.
	53	*/
	54	struct cpc_register_resource {
	55	acpi_object_type type;
5bbb86aa	56	u64 __iomem *sys_mem_vaddr;
337aadff AC	57	union {
	58	struct cpc_reg reg;
	59	u64 int_value;
	60	} cpc_entry;
	61	};
	62
	63	/* Container to hold the CPC details for each CPU */
	64	struct cpc_desc {
	65	int num_entries;
	66	int version;
	67	int cpu_id;
80b8286a PP	68	int write_cmd_status;
80b8286a PP	69	int write_cmd_id;
337aadff AC	70	struct cpc_register_resource cpc_regs[MAX_CPC_REG_ENT];
337aadff AC	71	struct acpi_psd_package domain_info;
158c998e	72	struct kobject kobj;
337aadff AC	73	};
	74
	75	/* These are indexes into the per-cpu cpc_regs[]. Order is important. */
	76	enum cppc_regs {
	77	HIGHEST_PERF,
	78	NOMINAL_PERF,
	79	LOW_NON_LINEAR_PERF,
	80	LOWEST_PERF,
	81	GUARANTEED_PERF,
	82	DESIRED_PERF,
	83	MIN_PERF,
	84	MAX_PERF,
	85	PERF_REDUC_TOLERANCE,
	86	TIME_WINDOW,
	87	CTR_WRAP_TIME,
	88	REFERENCE_CTR,
	89	DELIVERED_CTR,
	90	PERF_LIMITED,
	91	ENABLE,
	92	AUTO_SEL_ENABLE,
	93	AUTO_ACT_WINDOW,
	94	ENERGY_PERF,
	95	REFERENCE_PERF,
4773e77c PP	96	LOWEST_FREQ,
4773e77c PP	97	NOMINAL_FREQ,
337aadff AC	98	};
	99
	100	/*
	101	* Categorization of registers as described
	102	* in the ACPI v.5.1 spec.
	103	* XXX: Only filling up ones which are used by governors
	104	* today.
	105	*/
	106	struct cppc_perf_caps {
29523f09	107	u32 guaranteed_perf;
337aadff AC	108	u32 highest_perf;
337aadff AC	109	u32 nominal_perf;
337aadff	110	u32 lowest_perf;
368520a6	111	u32 lowest_nonlinear_perf;
4773e77c PP	112	u32 lowest_freq;
4773e77c PP	113	u32 nominal_freq;
337aadff AC	114	};
	115
	116	struct cppc_perf_ctrls {
	117	u32 max_perf;
	118	u32 min_perf;
	119	u32 desired_perf;
	120	};
	121
	122	struct cppc_perf_fb_ctrs {
	123	u64 reference;
337aadff	124	u64 delivered;
158c998e	125	u64 reference_perf;
2c74d847	126	u64 wraparound_time;
337aadff AC	127	};
	128
	129	/* Per CPU container for runtime CPPC management. */
41dd6403	130	struct cppc_cpudata {
337aadff AC	131	int cpu;
	132	struct cppc_perf_caps perf_caps;
	133	struct cppc_perf_ctrls perf_ctrls;
	134	struct cppc_perf_fb_ctrs perf_fb_ctrs;
	135	struct cpufreq_policy *cur_policy;
	136	unsigned int shared_type;
	137	cpumask_var_t shared_cpu_map;
	138	};
	139
	140	extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs);
	141	extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls);
	142	extern int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps);
41dd6403	143	extern int acpi_get_psd_map(struct cppc_cpudata **);
be8b88d7	144	extern unsigned int cppc_get_transition_latency(int cpu);
ad3bc25a BP	145	extern bool cpc_ffh_supported(void);
	146	extern int cpc_read_ffh(int cpunum, struct cpc_reg reg, u64 val);
	147	extern int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val);
337aadff	148
337aadff	149	#endif /* _CPPC_ACPI_H*/