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ACPICA: CXL 2.0: CEDT: Add new CEDT table
[linux-block.git] / include / acpi / actbl2.h
CommitLineData
95857638 1/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
a8357b0c
BM		 2/******************************************************************************
3 *
5cf4d733 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
a8357b0c 5 *
4441e55d 6 * Copyright (C) 2000 - 2021, Intel Corp.
a8357b0c 7 *
95857638 8 *****************************************************************************/
a8357b0c 9
b24aad44
BM		 10#ifndef __ACTBL2_H__
11#define __ACTBL2_H__
12
13/*******************************************************************************
14 *
15 * Additional ACPI Tables (2)
16 *
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
19 *
b24aad44
BM		 20 ******************************************************************************/
21
22/*
6e2d5ebd
BM		 23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
b24aad44 26 */
874f6a72 27#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
6e2d5ebd 28#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
d36d4e30 29#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
e62f8227 30#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
b24aad44 31#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
0e264f0b 32#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
e62f8227
ES		 33#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
34#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
5132f2fa 35#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
e62f8227
ES		 36#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
37#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
38#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
39#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
40#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
41#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
42#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
3bd38469 43#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
e62f8227 44#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
88055d8f 45#define ACPI_SIG_NHLT "NHLT" /* Non-HDAudio Link Table */
4461cf54 46
b24aad44
BM		 47/*
48 * All tables must be byte-packed to match the ACPI specification, since
49 * the tables are provided by the system BIOS.
50 */
51#pragma pack(1)
52
53/*
be030a57
BM		 54 * Note: C bitfields are not used for this reason:
55 *
56 * "Bitfields are great and easy to read, but unfortunately the C language
57 * does not specify the layout of bitfields in memory, which means they are
58 * essentially useless for dealing with packed data in on-disk formats or
59 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
60 * this decision was a design error in C. Ritchie could have picked an order
61 * and stuck with it." Norman Ramsey.
62 * See http://stackoverflow.com/a/1053662/41661
b24aad44
BM		 63 */
64
874f6a72
LZ		 65/*******************************************************************************
66 *
67 * IORT - IO Remapping Table
68 *
69 * Conforms to "IO Remapping Table System Software on ARM Platforms",
d87be043 70 * Document number: ARM DEN 0049D, March 2018
874f6a72
LZ		 71 *
72 ******************************************************************************/
73
74struct acpi_table_iort {
75 struct acpi_table_header header;
76 u32 node_count;
77 u32 node_offset;
78 u32 reserved;
79};
80
81/*
82 * IORT subtables
83 */
84struct acpi_iort_node {
85 u8 type;
86 u16 length;
87 u8 revision;
88 u32 reserved;
89 u32 mapping_count;
90 u32 mapping_offset;
91 char node_data[1];
92};
93
94/* Values for subtable Type above */
95
96enum acpi_iort_node_type {
97 ACPI_IORT_NODE_ITS_GROUP = 0x00,
98 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
99 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
4ac78baf 100 ACPI_IORT_NODE_SMMU = 0x03,
a53eaef6
RM		 101 ACPI_IORT_NODE_SMMU_V3 = 0x04,
102 ACPI_IORT_NODE_PMCG = 0x05
874f6a72
LZ		 103};
104
105struct acpi_iort_id_mapping {
106 u32 input_base; /* Lowest value in input range */
107 u32 id_count; /* Number of IDs */
108 u32 output_base; /* Lowest value in output range */
109 u32 output_reference; /* A reference to the output node */
110 u32 flags;
111};
112
113/* Masks for Flags field above for IORT subtable */
114
115#define ACPI_IORT_ID_SINGLE_MAPPING (1)
116
117struct acpi_iort_memory_access {
118 u32 cache_coherency;
119 u8 hints;
120 u16 reserved;
121 u8 memory_flags;
122};
123
124/* Values for cache_coherency field above */
125
126#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
127#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
128
129/* Masks for Hints field above */
130
131#define ACPI_IORT_HT_TRANSIENT (1)
132#define ACPI_IORT_HT_WRITE (1<<1)
133#define ACPI_IORT_HT_READ (1<<2)
134#define ACPI_IORT_HT_OVERRIDE (1<<3)
135
136/* Masks for memory_flags field above */
137
138#define ACPI_IORT_MF_COHERENCY (1)
139#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
140
141/*
142 * IORT node specific subtables
143 */
144struct acpi_iort_its_group {
145 u32 its_count;
c163f90c 146 u32 identifiers[1]; /* GIC ITS identifier array */
874f6a72
LZ		 147};
148
149struct acpi_iort_named_component {
150 u32 node_flags;
151 u64 memory_properties; /* Memory access properties */
152 u8 memory_address_limit; /* Memory address size limit */
153 char device_name[1]; /* Path of namespace object */
154};
155
d87be043
RM		 156/* Masks for Flags field above */
157
158#define ACPI_IORT_NC_STALL_SUPPORTED (1)
159#define ACPI_IORT_NC_PASID_BITS (31<<1)
160
874f6a72
LZ		 161struct acpi_iort_root_complex {
162 u64 memory_properties; /* Memory access properties */
163 u32 ats_attribute;
164 u32 pci_segment_number;
d87be043
RM		 165 u8 memory_address_limit; /* Memory address size limit */
166 u8 reserved[3]; /* Reserved, must be zero */
874f6a72
LZ		 167};
168
169/* Values for ats_attribute field above */
170
171#define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */
172#define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */
173
174struct acpi_iort_smmu {
175 u64 base_address; /* SMMU base address */
176 u64 span; /* Length of memory range */
177 u32 model;
178 u32 flags;
179 u32 global_interrupt_offset;
180 u32 context_interrupt_count;
181 u32 context_interrupt_offset;
182 u32 pmu_interrupt_count;
183 u32 pmu_interrupt_offset;
184 u64 interrupts[1]; /* Interrupt array */
185};
186
187/* Values for Model field above */
188
189#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
190#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
191#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
192#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
0c2021c0
RM		 193#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
194#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
874f6a72
LZ		 195
196/* Masks for Flags field above */
197
198#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
199#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
200
bb1e23e6
LZ		 201/* Global interrupt format */
202
203struct acpi_iort_smmu_gsi {
204 u32 nsg_irpt;
205 u32 nsg_irpt_flags;
206 u32 nsg_cfg_irpt;
207 u32 nsg_cfg_irpt_flags;
208};
209
4ac78baf
AS		 210struct acpi_iort_smmu_v3 {
211 u64 base_address; /* SMMUv3 base address */
212 u32 flags;
213 u32 reserved;
214 u64 vatos_address;
0c2021c0 215 u32 model;
4ac78baf
AS		 216 u32 event_gsiv;
217 u32 pri_gsiv;
218 u32 gerr_gsiv;
219 u32 sync_gsiv;
d87be043 220 u32 pxm;
4c106aa4 221 u32 id_mapping_index;
4ac78baf
AS		 222};
223
0c2021c0
RM		 224/* Values for Model field above */
225
226#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
227#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
228#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
229
4ac78baf
AS		 230/* Masks for Flags field above */
231
232#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
d87be043 233#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
c9442300 234#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
4ac78baf 235
a53eaef6
RM		 236struct acpi_iort_pmcg {
237 u64 page0_base_address;
238 u32 overflow_gsiv;
239 u32 node_reference;
240 u64 page1_base_address;
241};
242
6e2d5ebd
BM		 243/*******************************************************************************
244 *
245 * IVRS - I/O Virtualization Reporting Structure
246 * Version 1
247 *
248 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
249 * Revision 1.26, February 2009.
250 *
251 ******************************************************************************/
252
253struct acpi_table_ivrs {
254 struct acpi_table_header header; /* Common ACPI table header */
255 u32 info; /* Common virtualization info */
256 u64 reserved;
257};
258
259/* Values for Info field above */
260
261#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
262#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
263#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
264
265/* IVRS subtable header */
266
267struct acpi_ivrs_header {
268 u8 type; /* Subtable type */
269 u8 flags;
270 u16 length; /* Subtable length */
271 u16 device_id; /* ID of IOMMU */
272};
273
274/* Values for subtable Type above */
275
276enum acpi_ivrs_type {
1f6239ca
MÅ»		 277 ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
278 ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
7ce7a445 279 ACPI_IVRS_TYPE_HARDWARE3 = 0x40,
6e2d5ebd
BM		 280 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
281 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
282 ACPI_IVRS_TYPE_MEMORY3 = 0x22
283};
284
285/* Masks for Flags field above for IVHD subtable */
286
287#define ACPI_IVHD_TT_ENABLE (1)
288#define ACPI_IVHD_PASS_PW (1<<1)
289#define ACPI_IVHD_RES_PASS_PW (1<<2)
290#define ACPI_IVHD_ISOC (1<<3)
291#define ACPI_IVHD_IOTLB (1<<4)
292
293/* Masks for Flags field above for IVMD subtable */
294
295#define ACPI_IVMD_UNITY (1)
296#define ACPI_IVMD_READ (1<<1)
297#define ACPI_IVMD_WRITE (1<<2)
298#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
299
300/*
301 * IVRS subtables, correspond to Type in struct acpi_ivrs_header
302 */
303
304/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
305
1f6239ca 306struct acpi_ivrs_hardware_10 {
6e2d5ebd
BM		 307 struct acpi_ivrs_header header;
308 u16 capability_offset; /* Offset for IOMMU control fields */
309 u64 base_address; /* IOMMU control registers */
310 u16 pci_segment_group;
311 u16 info; /* MSI number and unit ID */
0dc7e795 312 u32 feature_reporting;
6e2d5ebd
BM		 313};
314
1f6239ca
MÅ»		 315/* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */
316
317struct acpi_ivrs_hardware_11 {
318 struct acpi_ivrs_header header;
319 u16 capability_offset; /* Offset for IOMMU control fields */
320 u64 base_address; /* IOMMU control registers */
321 u16 pci_segment_group;
322 u16 info; /* MSI number and unit ID */
323 u32 attributes;
324 u64 efr_register_image;
325 u64 reserved;
326};
327
6e2d5ebd
BM		 328/* Masks for Info field above */
329
330#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
ba494bee 331#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
6e2d5ebd
BM		 332
333/*
334 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
335 * Upper two bits of the Type field are the (encoded) length of the structure.
336 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
337 * are reserved for future use but not defined.
338 */
339struct acpi_ivrs_de_header {
340 u8 type;
341 u16 id;
342 u8 data_setting;
343};
344
345/* Length of device entry is in the top two bits of Type field above */
346
347#define ACPI_IVHD_ENTRY_LENGTH 0xC0
348
349/* Values for device entry Type field above */
350
351enum acpi_ivrs_device_entry_type {
352 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
353
354 ACPI_IVRS_TYPE_PAD4 = 0,
355 ACPI_IVRS_TYPE_ALL = 1,
356 ACPI_IVRS_TYPE_SELECT = 2,
357 ACPI_IVRS_TYPE_START = 3,
358 ACPI_IVRS_TYPE_END = 4,
359
360 /* 8-byte device entries */
361
362 ACPI_IVRS_TYPE_PAD8 = 64,
363 ACPI_IVRS_TYPE_NOT_USED = 65,
364 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
365 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
366 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
367 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
7ce7a445
AM		 368 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */
369
370 /* Variable-length device entries */
371
372 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */
6e2d5ebd
BM		 373};
374
375/* Values for Data field above */
376
377#define ACPI_IVHD_INIT_PASS (1)
378#define ACPI_IVHD_EINT_PASS (1<<1)
379#define ACPI_IVHD_NMI_PASS (1<<2)
380#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
381#define ACPI_IVHD_LINT0_PASS (1<<6)
382#define ACPI_IVHD_LINT1_PASS (1<<7)
383
384/* Types 0-4: 4-byte device entry */
385
386struct acpi_ivrs_device4 {
387 struct acpi_ivrs_de_header header;
388};
389
390/* Types 66-67: 8-byte device entry */
391
392struct acpi_ivrs_device8a {
393 struct acpi_ivrs_de_header header;
394 u8 reserved1;
395 u16 used_id;
396 u8 reserved2;
397};
398
399/* Types 70-71: 8-byte device entry */
400
401struct acpi_ivrs_device8b {
402 struct acpi_ivrs_de_header header;
403 u32 extended_data;
404};
405
406/* Values for extended_data above */
407
408#define ACPI_IVHD_ATS_DISABLED (1<<31)
409
410/* Type 72: 8-byte device entry */
411
412struct acpi_ivrs_device8c {
413 struct acpi_ivrs_de_header header;
414 u8 handle;
415 u16 used_id;
416 u8 variety;
417};
418
419/* Values for Variety field above */
420
421#define ACPI_IVHD_IOAPIC 1
422#define ACPI_IVHD_HPET 2
423
7ce7a445
AM		 424/* Type 240: variable-length device entry */
425
426struct acpi_ivrs_device_hid {
427 struct acpi_ivrs_de_header header;
428 u64 acpi_hid;
429 u64 acpi_cid;
430 u8 uid_type;
431 u8 uid_length;
432};
433
6e2d5ebd
BM		 434/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
435
436struct acpi_ivrs_memory {
437 struct acpi_ivrs_header header;
438 u16 aux_data;
439 u64 reserved;
440 u64 start_address;
441 u64 memory_length;
442};
443
d36d4e30
BM		 444/*******************************************************************************
445 *
446 * LPIT - Low Power Idle Table
447 *
9ab8cf1b 448 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
d36d4e30
BM		 449 *
450 ******************************************************************************/
451
452struct acpi_table_lpit {
453 struct acpi_table_header header; /* Common ACPI table header */
454};
455
456/* LPIT subtable header */
457
458struct acpi_lpit_header {
459 u32 type; /* Subtable type */
460 u32 length; /* Subtable length */
461 u16 unique_id;
462 u16 reserved;
463 u32 flags;
464};
465
466/* Values for subtable Type above */
467
468enum acpi_lpit_type {
469 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
9ab8cf1b 470 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
d36d4e30
BM		 471};
472
473/* Masks for Flags field above */
474
475#define ACPI_LPIT_STATE_DISABLED (1)
476#define ACPI_LPIT_NO_COUNTER (1<<1)
477
478/*
479 * LPIT subtables, correspond to Type in struct acpi_lpit_header
480 */
481
482/* 0x00: Native C-state instruction based LPI structure */
483
484struct acpi_lpit_native {
485 struct acpi_lpit_header header;
486 struct acpi_generic_address entry_trigger;
487 u32 residency;
488 u32 latency;
489 struct acpi_generic_address residency_counter;
490 u64 counter_frequency;
491};
492
b24aad44
BM		 493/*******************************************************************************
494 *
e62f8227
ES		 495 * MADT - Multiple APIC Description Table
496 * Version 3
b24aad44
BM		 497 *
498 ******************************************************************************/
499
e62f8227 500struct acpi_table_madt {
b24aad44 501 struct acpi_table_header header; /* Common ACPI table header */
e62f8227
ES		 502 u32 address; /* Physical address of local APIC */
503 u32 flags;
b24aad44
BM		 504};
505
e62f8227 506/* Masks for Flags field above */
b24aad44 507
e62f8227
ES		 508#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
509
510/* Values for PCATCompat flag */
511
512#define ACPI_MADT_DUAL_PIC 1
513#define ACPI_MADT_MULTIPLE_APIC 0
514
515/* Values for MADT subtable type in struct acpi_subtable_header */
516
517enum acpi_madt_type {
518 ACPI_MADT_TYPE_LOCAL_APIC = 0,
519 ACPI_MADT_TYPE_IO_APIC = 1,
520 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
521 ACPI_MADT_TYPE_NMI_SOURCE = 3,
522 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
523 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
524 ACPI_MADT_TYPE_IO_SAPIC = 6,
525 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
526 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
527 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
528 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
529 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
530 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
531 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
532 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
533 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
9557cb8c
EK		 534 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16,
535 ACPI_MADT_TYPE_RESERVED = 17 /* 17 and greater are reserved */
e62f8227
ES		 536};
537
538/*
539 * MADT Subtables, correspond to Type in struct acpi_subtable_header
540 */
541
542/* 0: Processor Local APIC */
543
544struct acpi_madt_local_apic {
545 struct acpi_subtable_header header;
546 u8 processor_id; /* ACPI processor id */
547 u8 id; /* Processor's local APIC id */
548 u32 lapic_flags;
549};
550
551/* 1: IO APIC */
552
553struct acpi_madt_io_apic {
554 struct acpi_subtable_header header;
555 u8 id; /* I/O APIC ID */
556 u8 reserved; /* reserved - must be zero */
557 u32 address; /* APIC physical address */
558 u32 global_irq_base; /* Global system interrupt where INTI lines start */
559};
560
561/* 2: Interrupt Override */
562
563struct acpi_madt_interrupt_override {
564 struct acpi_subtable_header header;
565 u8 bus; /* 0 - ISA */
566 u8 source_irq; /* Interrupt source (IRQ) */
567 u32 global_irq; /* Global system interrupt */
568 u16 inti_flags;
569};
570
571/* 3: NMI Source */
572
573struct acpi_madt_nmi_source {
574 struct acpi_subtable_header header;
575 u16 inti_flags;
576 u32 global_irq; /* Global system interrupt */
577};
578
579/* 4: Local APIC NMI */
580
581struct acpi_madt_local_apic_nmi {
582 struct acpi_subtable_header header;
583 u8 processor_id; /* ACPI processor id */
584 u16 inti_flags;
585 u8 lint; /* LINTn to which NMI is connected */
586};
587
588/* 5: Address Override */
589
590struct acpi_madt_local_apic_override {
591 struct acpi_subtable_header header;
592 u16 reserved; /* Reserved, must be zero */
593 u64 address; /* APIC physical address */
594};
595
596/* 6: I/O Sapic */
597
598struct acpi_madt_io_sapic {
599 struct acpi_subtable_header header;
600 u8 id; /* I/O SAPIC ID */
601 u8 reserved; /* Reserved, must be zero */
602 u32 global_irq_base; /* Global interrupt for SAPIC start */
603 u64 address; /* SAPIC physical address */
604};
605
606/* 7: Local Sapic */
607
608struct acpi_madt_local_sapic {
609 struct acpi_subtable_header header;
610 u8 processor_id; /* ACPI processor id */
611 u8 id; /* SAPIC ID */
612 u8 eid; /* SAPIC EID */
613 u8 reserved[3]; /* Reserved, must be zero */
614 u32 lapic_flags;
615 u32 uid; /* Numeric UID - ACPI 3.0 */
616 char uid_string[1]; /* String UID - ACPI 3.0 */
617};
618
619/* 8: Platform Interrupt Source */
620
621struct acpi_madt_interrupt_source {
622 struct acpi_subtable_header header;
623 u16 inti_flags;
624 u8 type; /* 1=PMI, 2=INIT, 3=corrected */
625 u8 id; /* Processor ID */
626 u8 eid; /* Processor EID */
627 u8 io_sapic_vector; /* Vector value for PMI interrupts */
628 u32 global_irq; /* Global system interrupt */
629 u32 flags; /* Interrupt Source Flags */
630};
631
632/* Masks for Flags field above */
633
634#define ACPI_MADT_CPEI_OVERRIDE (1)
635
636/* 9: Processor Local X2APIC (ACPI 4.0) */
637
638struct acpi_madt_local_x2apic {
639 struct acpi_subtable_header header;
640 u16 reserved; /* reserved - must be zero */
641 u32 local_apic_id; /* Processor x2APIC ID */
642 u32 lapic_flags;
643 u32 uid; /* ACPI processor UID */
644};
645
646/* 10: Local X2APIC NMI (ACPI 4.0) */
647
648struct acpi_madt_local_x2apic_nmi {
649 struct acpi_subtable_header header;
650 u16 inti_flags;
651 u32 uid; /* ACPI processor UID */
652 u8 lint; /* LINTn to which NMI is connected */
653 u8 reserved[3]; /* reserved - must be zero */
654};
655
e646e0a5 656/* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */
e62f8227
ES		 657
658struct acpi_madt_generic_interrupt {
659 struct acpi_subtable_header header;
660 u16 reserved; /* reserved - must be zero */
661 u32 cpu_interface_number;
662 u32 uid;
663 u32 flags;
664 u32 parking_version;
665 u32 performance_interrupt;
666 u64 parked_address;
667 u64 base_address;
668 u64 gicv_base_address;
669 u64 gich_base_address;
670 u32 vgic_interrupt;
671 u64 gicr_base_address;
672 u64 arm_mpidr;
673 u8 efficiency_class;
e646e0a5
ES		 674 u8 reserved2[1];
675 u16 spe_interrupt; /* ACPI 6.3 */
e62f8227
ES		 676};
677
678/* Masks for Flags field above */
679
680/* ACPI_MADT_ENABLED (1) Processor is usable if set */
681#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
682#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
683
684/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
685
686struct acpi_madt_generic_distributor {
687 struct acpi_subtable_header header;
688 u16 reserved; /* reserved - must be zero */
689 u32 gic_id;
690 u64 base_address;
691 u32 global_irq_base;
692 u8 version;
693 u8 reserved2[3]; /* reserved - must be zero */
694};
695
696/* Values for Version field above */
697
698enum acpi_madt_gic_version {
699 ACPI_MADT_GIC_VERSION_NONE = 0,
700 ACPI_MADT_GIC_VERSION_V1 = 1,
701 ACPI_MADT_GIC_VERSION_V2 = 2,
702 ACPI_MADT_GIC_VERSION_V3 = 3,
703 ACPI_MADT_GIC_VERSION_V4 = 4,
704 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
705};
706
707/* 13: Generic MSI Frame (ACPI 5.1) */
708
709struct acpi_madt_generic_msi_frame {
710 struct acpi_subtable_header header;
711 u16 reserved; /* reserved - must be zero */
712 u32 msi_frame_id;
713 u64 base_address;
714 u32 flags;
715 u16 spi_count;
716 u16 spi_base;
717};
718
719/* Masks for Flags field above */
720
721#define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
722
723/* 14: Generic Redistributor (ACPI 5.1) */
724
725struct acpi_madt_generic_redistributor {
726 struct acpi_subtable_header header;
727 u16 reserved; /* reserved - must be zero */
728 u64 base_address;
729 u32 length;
730};
731
732/* 15: Generic Translator (ACPI 6.0) */
733
734struct acpi_madt_generic_translator {
735 struct acpi_subtable_header header;
736 u16 reserved; /* reserved - must be zero */
737 u32 translation_id;
738 u64 base_address;
739 u32 reserved2;
740};
741
9557cb8c
EK		 742/* 16: Multiprocessor wakeup (ACPI 6.4) */
743
744struct acpi_madt_multiproc_wakeup {
745 struct acpi_subtable_header header;
746 u16 mailbox_version;
747 u32 reserved; /* reserved - must be zero */
748 u64 base_address;
749};
750
e62f8227
ES		 751/*
752 * Common flags fields for MADT subtables
753 */
754
755/* MADT Local APIC flags */
756
757#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
758
759/* MADT MPS INTI flags (inti_flags) */
760
761#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
762#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
763
764/* Values for MPS INTI flags */
765
766#define ACPI_MADT_POLARITY_CONFORMS 0
767#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
768#define ACPI_MADT_POLARITY_RESERVED 2
769#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
770
771#define ACPI_MADT_TRIGGER_CONFORMS (0)
772#define ACPI_MADT_TRIGGER_EDGE (1<<2)
773#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
774#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
775
776/*******************************************************************************
777 *
778 * MCFG - PCI Memory Mapped Configuration table and subtable
779 * Version 1
780 *
781 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
782 *
783 ******************************************************************************/
784
785struct acpi_table_mcfg {
786 struct acpi_table_header header; /* Common ACPI table header */
787 u8 reserved[8];
788};
789
790/* Subtable */
791
792struct acpi_mcfg_allocation {
793 u64 address; /* Base address, processor-relative */
794 u16 pci_segment; /* PCI segment group number */
795 u8 start_bus_number; /* Starting PCI Bus number */
796 u8 end_bus_number; /* Final PCI Bus number */
b24aad44
BM		 797 u32 reserved;
798};
799
0e264f0b
BM		 800/*******************************************************************************
801 *
802 * MCHI - Management Controller Host Interface Table
803 * Version 1
804 *
805 * Conforms to "Management Component Transport Protocol (MCTP) Host
806 * Interface Specification", Revision 1.0.0a, October 13, 2009
807 *
808 ******************************************************************************/
809
810struct acpi_table_mchi {
811 struct acpi_table_header header; /* Common ACPI table header */
812 u8 interface_type;
813 u8 protocol;
814 u64 protocol_data;
815 u8 interrupt_type;
816 u8 gpe;
817 u8 pci_device_flag;
818 u32 global_interrupt;
819 struct acpi_generic_address control_register;
820 u8 pci_segment;
821 u8 pci_bus;
822 u8 pci_device;
823 u8 pci_function;
824};
825
e62f8227
ES		 826/*******************************************************************************
827 *
828 * MPST - Memory Power State Table (ACPI 5.0)
829 * Version 1
830 *
831 ******************************************************************************/
832
833#define ACPI_MPST_CHANNEL_INFO \
834 u8 channel_id; \
835 u8 reserved1[3]; \
836 u16 power_node_count; \
837 u16 reserved2;
838
839/* Main table */
840
841struct acpi_table_mpst {
842 struct acpi_table_header header; /* Common ACPI table header */
843 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
844};
845
846/* Memory Platform Communication Channel Info */
847
848struct acpi_mpst_channel {
849 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
850};
851
852/* Memory Power Node Structure */
853
854struct acpi_mpst_power_node {
855 u8 flags;
856 u8 reserved1;
857 u16 node_id;
858 u32 length;
859 u64 range_address;
860 u64 range_length;
861 u32 num_power_states;
862 u32 num_physical_components;
863};
864
865/* Values for Flags field above */
866
867#define ACPI_MPST_ENABLED 1
868#define ACPI_MPST_POWER_MANAGED 2
869#define ACPI_MPST_HOT_PLUG_CAPABLE 4
870
871/* Memory Power State Structure (follows POWER_NODE above) */
872
873struct acpi_mpst_power_state {
874 u8 power_state;
875 u8 info_index;
876};
877
878/* Physical Component ID Structure (follows POWER_STATE above) */
879
880struct acpi_mpst_component {
881 u16 component_id;
882};
883
884/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
885
886struct acpi_mpst_data_hdr {
887 u16 characteristics_count;
888 u16 reserved;
889};
890
891struct acpi_mpst_power_data {
892 u8 structure_id;
893 u8 flags;
894 u16 reserved1;
895 u32 average_power;
896 u32 power_saving;
897 u64 exit_latency;
898 u64 reserved2;
899};
900
901/* Values for Flags field above */
902
903#define ACPI_MPST_PRESERVE 1
904#define ACPI_MPST_AUTOENTRY 2
905#define ACPI_MPST_AUTOEXIT 4
906
907/* Shared Memory Region (not part of an ACPI table) */
908
909struct acpi_mpst_shared {
910 u32 signature;
911 u16 pcc_command;
912 u16 pcc_status;
913 u32 command_register;
914 u32 status_register;
915 u32 power_state_id;
916 u32 power_node_id;
917 u64 energy_consumed;
918 u64 average_power;
919};
920
921/*******************************************************************************
922 *
923 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
924 * Version 1
925 *
926 ******************************************************************************/
927
928struct acpi_table_msct {
929 struct acpi_table_header header; /* Common ACPI table header */
930 u32 proximity_offset; /* Location of proximity info struct(s) */
931 u32 max_proximity_domains; /* Max number of proximity domains */
932 u32 max_clock_domains; /* Max number of clock domains */
933 u64 max_address; /* Max physical address in system */
934};
935
936/* subtable - Maximum Proximity Domain Information. Version 1 */
937
938struct acpi_msct_proximity {
939 u8 revision;
940 u8 length;
941 u32 range_start; /* Start of domain range */
942 u32 range_end; /* End of domain range */
943 u32 processor_capacity;
944 u64 memory_capacity; /* In bytes */
945};
946
5132f2fa
BM		 947/*******************************************************************************
948 *
949 * MSDM - Microsoft Data Management table
950 *
951 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
952 * November 29, 2011. Copyright 2011 Microsoft
953 *
954 ******************************************************************************/
955
956/* Basic MSDM table is only the common ACPI header */
957
958struct acpi_table_msdm {
959 struct acpi_table_header header; /* Common ACPI table header */
960};
961
3bd38469
JM		 962/*******************************************************************************
963 *
e62f8227
ES		 964 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
965 * Version 1
3bd38469
JM		 966 *
967 ******************************************************************************/
968
e62f8227 969struct acpi_table_nfit {
3bd38469 970 struct acpi_table_header header; /* Common ACPI table header */
e62f8227 971 u32 reserved; /* Reserved, must be zero */
3bd38469
JM		 972};
973
e62f8227 974/* Subtable header for NFIT */
5cf4d733 975
e62f8227
ES		 976struct acpi_nfit_header {
977 u16 type;
978 u16 length;
979};
5cf4d733 980
e62f8227
ES		 981/* Values for subtable type in struct acpi_nfit_header */
982
983enum acpi_nfit_type {
984 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
985 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
986 ACPI_NFIT_TYPE_INTERLEAVE = 2,
987 ACPI_NFIT_TYPE_SMBIOS = 3,
988 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
989 ACPI_NFIT_TYPE_DATA_REGION = 5,
990 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
991 ACPI_NFIT_TYPE_CAPABILITIES = 7,
992 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
5cf4d733
BM		 993};
994
e62f8227
ES		 995/*
996 * NFIT Subtables
997 */
b24aad44 998
e62f8227
ES		 999/* 0: System Physical Address Range Structure */
1000
1001struct acpi_nfit_system_address {
1002 struct acpi_nfit_header header;
1003 u16 range_index;
1004 u16 flags;
1005 u32 reserved; /* Reserved, must be zero */
1006 u32 proximity_domain;
1007 u8 range_guid[16];
1008 u64 address;
1009 u64 length;
1010 u64 memory_mapping;
cf16b05c 1011 u64 location_cookie; /* ACPI 6.4 */
b24aad44
BM		 1012};
1013
e62f8227 1014/* Flags */
6e2d5ebd 1015
e62f8227
ES		 1016#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1017#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
cf16b05c 1018#define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */
6e2d5ebd 1019
e62f8227 1020/* Range Type GUIDs appear in the include/acuuid.h file */
29a3f38e 1021
e62f8227 1022/* 1: Memory Device to System Address Range Map Structure */
b24aad44 1023
e62f8227
ES		 1024struct acpi_nfit_memory_map {
1025 struct acpi_nfit_header header;
1026 u32 device_handle;
1027 u16 physical_id;
1028 u16 region_id;
1029 u16 range_index;
1030 u16 region_index;
1031 u64 region_size;
1032 u64 region_offset;
1033 u64 address;
1034 u16 interleave_index;
1035 u16 interleave_ways;
1036 u16 flags;
1037 u16 reserved; /* Reserved, must be zero */
6e2d5ebd
BM		 1038};
1039
e62f8227
ES		 1040/* Flags */
1041
1042#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1043#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1044#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1045#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1046#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1047#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1048#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
6e2d5ebd 1049
e62f8227
ES		 1050/* 2: Interleave Structure */
1051
1052struct acpi_nfit_interleave {
1053 struct acpi_nfit_header header;
1054 u16 interleave_index;
1055 u16 reserved; /* Reserved, must be zero */
1056 u32 line_count;
1057 u32 line_size;
1058 u32 line_offset[1]; /* Variable length */
b24aad44
BM		 1059};
1060
e62f8227 1061/* 3: SMBIOS Management Information Structure */
b24aad44 1062
e62f8227
ES		 1063struct acpi_nfit_smbios {
1064 struct acpi_nfit_header header;
1065 u32 reserved; /* Reserved, must be zero */
1066 u8 data[1]; /* Variable length */
15a61aa1
BM		 1067};
1068
e62f8227 1069/* 4: NVDIMM Control Region Structure */
15a61aa1 1070
e62f8227
ES		 1071struct acpi_nfit_control_region {
1072 struct acpi_nfit_header header;
1073 u16 region_index;
1074 u16 vendor_id;
1075 u16 device_id;
1076 u16 revision_id;
1077 u16 subsystem_vendor_id;
1078 u16 subsystem_device_id;
1079 u16 subsystem_revision_id;
1080 u8 valid_fields;
1081 u8 manufacturing_location;
1082 u16 manufacturing_date;
1083 u8 reserved[2]; /* Reserved, must be zero */
1084 u32 serial_number;
1085 u16 code;
1086 u16 windows;
1087 u64 window_size;
1088 u64 command_offset;
1089 u64 command_size;
1090 u64 status_offset;
1091 u64 status_size;
1092 u16 flags;
1093 u8 reserved1[6]; /* Reserved, must be zero */
1094};
1095
1096/* Flags */
1097
1098#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1099
1100/* valid_fields bits */
1101
1102#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1103
1104/* 5: NVDIMM Block Data Window Region Structure */
1105
1106struct acpi_nfit_data_region {
1107 struct acpi_nfit_header header;
1108 u16 region_index;
1109 u16 windows;
1110 u64 offset;
1111 u64 size;
1112 u64 capacity;
1113 u64 start_address;
9005694e
BM		 1114};
1115
e62f8227
ES		 1116/* 6: Flush Hint Address Structure */
1117
1118struct acpi_nfit_flush_address {
1119 struct acpi_nfit_header header;
1120 u32 device_handle;
1121 u16 hint_count;
1122 u8 reserved[6]; /* Reserved, must be zero */
1123 u64 hint_address[1]; /* Variable length */
1124};
1125
1126/* 7: Platform Capabilities Structure */
1127
1128struct acpi_nfit_capabilities {
1129 struct acpi_nfit_header header;
1130 u8 highest_capability;
1131 u8 reserved[3]; /* Reserved, must be zero */
1132 u32 capabilities;
1133 u32 reserved2;
9005694e
BM		 1134};
1135
e62f8227
ES		 1136/* Capabilities Flags */
1137
1138#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1139#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1140#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1141
1142/*
1143 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1144 */
1145struct nfit_device_handle {
1146 u32 handle;
1147};
9005694e 1148
e62f8227 1149/* Device handle construction and extraction macros */
9005694e 1150
e62f8227
ES		 1151#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1152#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1153#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1154#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1155#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
9005694e 1156
e62f8227
ES		 1157#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1158#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1159#define ACPI_NFIT_MEMORY_ID_OFFSET 8
1160#define ACPI_NFIT_SOCKET_ID_OFFSET 12
1161#define ACPI_NFIT_NODE_ID_OFFSET 16
1162
1163/* Macro to construct a NFIT/NVDIMM device handle */
1164
1165#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1166 ((dimm) | \
1167 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1168 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1169 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1170 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1171
1172/* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1173
1174#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1175 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1176
1177#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1178 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1179
1180#define ACPI_NFIT_GET_MEMORY_ID(handle) \
1181 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1182
1183#define ACPI_NFIT_GET_SOCKET_ID(handle) \
1184 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1185
1186#define ACPI_NFIT_GET_NODE_ID(handle) \
1187 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
9005694e
BM		 1188
1189/*******************************************************************************
1190 *
e62f8227
ES		 1191 * PCCT - Platform Communications Channel Table (ACPI 5.0)
1192 * Version 2 (ACPI 6.2)
9005694e
BM		 1193 *
1194 ******************************************************************************/
1195
e62f8227 1196struct acpi_table_pcct {
9005694e 1197 struct acpi_table_header header; /* Common ACPI table header */
e62f8227
ES		 1198 u32 flags;
1199 u64 reserved;
9005694e
BM		 1200};
1201
e62f8227 1202/* Values for Flags field above */
9005694e 1203
e62f8227 1204#define ACPI_PCCT_DOORBELL 1
bff7f90b 1205
e62f8227 1206/* Values for subtable type in struct acpi_subtable_header */
bff7f90b 1207
e62f8227
ES		 1208enum acpi_pcct_type {
1209 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
1210 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
1211 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
1212 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
1213 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
71f79a3f
EK		 1214 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */
1215 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
bff7f90b
BM		 1216};
1217
1218/*
e62f8227 1219 * PCCT Subtables, correspond to Type in struct acpi_subtable_header
bff7f90b
BM		 1220 */
1221
e62f8227 1222/* 0: Generic Communications Subspace */
bff7f90b 1223
e62f8227
ES		 1224struct acpi_pcct_subspace {
1225 struct acpi_subtable_header header;
1226 u8 reserved[6];
1227 u64 base_address;
1228 u64 length;
1229 struct acpi_generic_address doorbell_register;
1230 u64 preserve_mask;
1231 u64 write_mask;
1232 u32 latency;
1233 u32 max_access_rate;
1234 u16 min_turnaround_time;
bff7f90b
BM		 1235};
1236
e62f8227 1237/* 1: HW-reduced Communications Subspace (ACPI 5.1) */
bff7f90b 1238
e62f8227
ES		 1239struct acpi_pcct_hw_reduced {
1240 struct acpi_subtable_header header;
1241 u32 platform_interrupt;
1242 u8 flags;
1243 u8 reserved;
1244 u64 base_address;
1245 u64 length;
1246 struct acpi_generic_address doorbell_register;
1247 u64 preserve_mask;
1248 u64 write_mask;
1249 u32 latency;
1250 u32 max_access_rate;
1251 u16 min_turnaround_time;
1252};
bff7f90b 1253
e62f8227 1254/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
bff7f90b 1255
e62f8227
ES		 1256struct acpi_pcct_hw_reduced_type2 {
1257 struct acpi_subtable_header header;
1258 u32 platform_interrupt;
1259 u8 flags;
1260 u8 reserved;
1261 u64 base_address;
1262 u64 length;
1263 struct acpi_generic_address doorbell_register;
1264 u64 preserve_mask;
1265 u64 write_mask;
1266 u32 latency;
1267 u32 max_access_rate;
1268 u16 min_turnaround_time;
1269 struct acpi_generic_address platform_ack_register;
1270 u64 ack_preserve_mask;
1271 u64 ack_write_mask;
1272};
1273
1274/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
1275
1276struct acpi_pcct_ext_pcc_master {
1277 struct acpi_subtable_header header;
1278 u32 platform_interrupt;
1279 u8 flags;
1280 u8 reserved1;
1281 u64 base_address;
1282 u32 length;
1283 struct acpi_generic_address doorbell_register;
1284 u64 preserve_mask;
1285 u64 write_mask;
1286 u32 latency;
1287 u32 max_access_rate;
1288 u32 min_turnaround_time;
1289 struct acpi_generic_address platform_ack_register;
1290 u64 ack_preserve_mask;
1291 u64 ack_set_mask;
1292 u64 reserved2;
1293 struct acpi_generic_address cmd_complete_register;
1294 u64 cmd_complete_mask;
1295 struct acpi_generic_address cmd_update_register;
1296 u64 cmd_update_preserve_mask;
1297 u64 cmd_update_set_mask;
1298 struct acpi_generic_address error_status_register;
1299 u64 error_status_mask;
1300};
1301
1302/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
1303
1304struct acpi_pcct_ext_pcc_slave {
1305 struct acpi_subtable_header header;
1306 u32 platform_interrupt;
1307 u8 flags;
1308 u8 reserved1;
1309 u64 base_address;
1310 u32 length;
1311 struct acpi_generic_address doorbell_register;
1312 u64 preserve_mask;
1313 u64 write_mask;
1314 u32 latency;
1315 u32 max_access_rate;
1316 u32 min_turnaround_time;
1317 struct acpi_generic_address platform_ack_register;
1318 u64 ack_preserve_mask;
1319 u64 ack_set_mask;
1320 u64 reserved2;
1321 struct acpi_generic_address cmd_complete_register;
1322 u64 cmd_complete_mask;
1323 struct acpi_generic_address cmd_update_register;
1324 u64 cmd_update_preserve_mask;
1325 u64 cmd_update_set_mask;
1326 struct acpi_generic_address error_status_register;
1327 u64 error_status_mask;
1328};
1329
71f79a3f
EK		 1330/* 5: HW Registers based Communications Subspace */
1331
1332struct acpi_pcct_hw_reg {
1333 struct acpi_subtable_header header;
1334 u16 version;
1335 u64 base_address;
1336 u64 length;
1337 struct acpi_generic_address doorbell_register;
1338 u64 doorbell_preserve;
1339 u64 doorbell_write;
1340 struct acpi_generic_address cmd_complete_register;
1341 u64 cmd_complete_mask;
1342 struct acpi_generic_address error_status_register;
1343 u64 error_status_mask;
1344 u32 nominal_latency;
1345 u32 min_turnaround_time;
1346};
1347
e62f8227
ES		 1348/* Values for doorbell flags above */
1349
1350#define ACPI_PCCT_INTERRUPT_POLARITY (1)
1351#define ACPI_PCCT_INTERRUPT_MODE (1<<1)
1352
1353/*
1354 * PCC memory structures (not part of the ACPI table)
1355 */
1356
1357/* Shared Memory Region */
1358
1359struct acpi_pcct_shared_memory {
1360 u32 signature;
1361 u16 command;
1362 u16 status;
1363};
1364
1365/* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
1366
1367struct acpi_pcct_ext_pcc_shared_memory {
1368 u32 signature;
1369 u32 flags;
1370 u32 length;
1371 u32 command;
1372};
cf8252ca 1373
b24aad44
BM		 1374/*******************************************************************************
1375 *
e62f8227
ES		 1376 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
1377 * Version 0
b24aad44
BM		 1378 *
1379 ******************************************************************************/
1380
e62f8227 1381struct acpi_table_pdtt {
b24aad44 1382 struct acpi_table_header header; /* Common ACPI table header */
e62f8227
ES		 1383 u8 trigger_count;
1384 u8 reserved[3];
1385 u32 array_offset;
1386};
1387
1388/*
1389 * PDTT Communication Channel Identifier Structure.
1390 * The number of these structures is defined by trigger_count above,
1391 * starting at array_offset.
1392 */
1393struct acpi_pdtt_channel {
1394 u8 subchannel_id;
1395 u8 flags;
b24aad44
BM		 1396};
1397
e62f8227
ES		 1398/* Flags for above */
1399
1400#define ACPI_PDTT_RUNTIME_TRIGGER (1)
1401#define ACPI_PDTT_WAIT_COMPLETION (1<<1)
f00175d0 1402#define ACPI_PDTT_TRIGGER_ORDER (1<<2)
e62f8227 1403
25c0330a
LZ		 1404/*******************************************************************************
1405 *
e62f8227 1406 * PMTT - Platform Memory Topology Table (ACPI 5.0)
25c0330a
LZ		 1407 * Version 1
1408 *
25c0330a
LZ		 1409 ******************************************************************************/
1410
e62f8227 1411struct acpi_table_pmtt {
25c0330a 1412 struct acpi_table_header header; /* Common ACPI table header */
e62f8227 1413 u32 reserved;
25c0330a
LZ		 1414};
1415
e62f8227 1416/* Common header for PMTT subtables that follow main table */
25c0330a 1417
e62f8227
ES		 1418struct acpi_pmtt_header {
1419 u8 type;
1420 u8 reserved1;
1421 u16 length;
1422 u16 flags;
1423 u16 reserved2;
1424};
1425
1426/* Values for Type field above */
1427
1428#define ACPI_PMTT_TYPE_SOCKET 0
1429#define ACPI_PMTT_TYPE_CONTROLLER 1
1430#define ACPI_PMTT_TYPE_DIMM 2
1431#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */
1432
1433/* Values for Flags field above */
1434
1435#define ACPI_PMTT_TOP_LEVEL 0x0001
1436#define ACPI_PMTT_PHYSICAL 0x0002
1437#define ACPI_PMTT_MEMORY_TYPE 0x000C
1438
1439/*
1440 * PMTT subtables, correspond to Type in struct acpi_pmtt_header
1441 */
1442
1443/* 0: Socket Structure */
1444
1445struct acpi_pmtt_socket {
1446 struct acpi_pmtt_header header;
1447 u16 socket_id;
1448 u16 reserved;
1449};
1450
1451/* 1: Memory Controller subtable */
1452
1453struct acpi_pmtt_controller {
1454 struct acpi_pmtt_header header;
1455 u32 read_latency;
1456 u32 write_latency;
1457 u32 read_bandwidth;
1458 u32 write_bandwidth;
1459 u16 access_width;
1460 u16 alignment;
1461 u16 reserved;
1462 u16 domain_count;
1463};
1464
1465/* 1a: Proximity Domain substructure */
1466
1467struct acpi_pmtt_domain {
1468 u32 proximity_domain;
1469};
1470
1471/* 2: Physical Component Identifier (DIMM) */
1472
1473struct acpi_pmtt_physical_component {
1474 struct acpi_pmtt_header header;
1475 u16 component_id;
1476 u16 reserved;
1477 u32 memory_size;
1478 u32 bios_handle;
25c0330a
LZ		 1479};
1480
6e2d5ebd
BM		 1481/*******************************************************************************
1482 *
e62f8227 1483 * PPTT - Processor Properties Topology Table (ACPI 6.2)
6e2d5ebd
BM		 1484 * Version 1
1485 *
6e2d5ebd
BM		 1486 ******************************************************************************/
1487
e62f8227 1488struct acpi_table_pptt {
6e2d5ebd 1489 struct acpi_table_header header; /* Common ACPI table header */
e62f8227
ES		 1490};
1491
1492/* Values for Type field above */
1493
1494enum acpi_pptt_type {
1495 ACPI_PPTT_TYPE_PROCESSOR = 0,
1496 ACPI_PPTT_TYPE_CACHE = 1,
1497 ACPI_PPTT_TYPE_ID = 2,
1498 ACPI_PPTT_TYPE_RESERVED = 3
1499};
1500
1501/* 0: Processor Hierarchy Node Structure */
1502
1503struct acpi_pptt_processor {
1504 struct acpi_subtable_header header;
1505 u16 reserved;
6e2d5ebd 1506 u32 flags;
e62f8227
ES		 1507 u32 parent;
1508 u32 acpi_processor_id;
1509 u32 number_of_priv_resources;
6e2d5ebd
BM		 1510};
1511
e62f8227 1512/* Flags */
6e2d5ebd 1513
b5eab512
ES		 1514#define ACPI_PPTT_PHYSICAL_PACKAGE (1)
1515#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
1516#define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
1517#define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
1518#define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
6e2d5ebd 1519
e62f8227 1520/* 1: Cache Type Structure */
b24aad44 1521
e62f8227
ES		 1522struct acpi_pptt_cache {
1523 struct acpi_subtable_header header;
1524 u16 reserved;
1525 u32 flags;
1526 u32 next_level_of_cache;
1527 u32 size;
1528 u32 number_of_sets;
1529 u8 associativity;
1530 u8 attributes;
1531 u16 line_size;
b24aad44
BM		 1532};
1533
5e2e86c0
EK		 1534/* 1: Cache Type Structure for PPTT version 3 */
1535
1536struct acpi_pptt_cache_v1 {
1537 u32 cache_id;
1538};
1539
e62f8227
ES		 1540/* Flags */
1541
1542#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
1543#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
1544#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
1545#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
1546#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
1547#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
1548#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
5e2e86c0 1549#define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */
e62f8227
ES		 1550
1551/* Masks for Attributes */
6e2d5ebd 1552
e62f8227
ES		 1553#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
1554#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
1555#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
6e2d5ebd 1556
e62f8227
ES		 1557/* Attributes describing cache */
1558#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
1559#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
1560#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
1561#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
b24aad44 1562
e62f8227
ES		 1563#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
1564#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
1565#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
1566#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
1567
1568#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
1569#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
1570
1571/* 2: ID Structure */
1572
1573struct acpi_pptt_id {
1574 struct acpi_subtable_header header;
6e2d5ebd 1575 u16 reserved;
e62f8227
ES		 1576 u32 vendor_id;
1577 u64 level1_id;
1578 u64 level2_id;
1579 u16 major_rev;
1580 u16 minor_rev;
1581 u16 spin_rev;
b24aad44
BM		 1582};
1583
9d8b5e7b
BM		 1584/*******************************************************************************
1585 *
e62f8227 1586 * RASF - RAS Feature Table (ACPI 5.0)
9d8b5e7b
BM		 1587 * Version 1
1588 *
9d8b5e7b
BM		 1589 ******************************************************************************/
1590
e62f8227 1591struct acpi_table_rasf {
9d8b5e7b 1592 struct acpi_table_header header; /* Common ACPI table header */
e62f8227
ES		 1593 u8 channel_id[12];
1594};
1595
1596/* RASF Platform Communication Channel Shared Memory Region */
1597
1598struct acpi_rasf_shared_memory {
1599 u32 signature;
1600 u16 command;
9d8b5e7b 1601 u16 status;
e62f8227
ES		 1602 u16 version;
1603 u8 capabilities[16];
1604 u8 set_capabilities[16];
1605 u16 num_parameter_blocks;
1606 u32 set_capabilities_status;
1607};
1608
1609/* RASF Parameter Block Structure Header */
1610
1611struct acpi_rasf_parameter_block {
1612 u16 type;
1613 u16 version;
1614 u16 length;
9d8b5e7b
BM		 1615};
1616
e62f8227 1617/* RASF Parameter Block Structure for PATROL_SCRUB */
9d8b5e7b 1618
e62f8227
ES		 1619struct acpi_rasf_patrol_scrub_parameter {
1620 struct acpi_rasf_parameter_block header;
1621 u16 patrol_scrub_command;
1622 u64 requested_address_range[2];
1623 u64 actual_address_range[2];
1624 u16 flags;
1625 u8 requested_speed;
1626};
1627
1628/* Masks for Flags and Speed fields above */
1629
1630#define ACPI_RASF_SCRUBBER_RUNNING 1
1631#define ACPI_RASF_SPEED (7<<1)
1632#define ACPI_RASF_SPEED_SLOW (0<<1)
1633#define ACPI_RASF_SPEED_MEDIUM (4<<1)
1634#define ACPI_RASF_SPEED_FAST (7<<1)
1635
1636/* Channel Commands */
1637
1638enum acpi_rasf_commands {
1639 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
1640};
1641
1642/* Platform RAS Capabilities */
9d8b5e7b 1643
e62f8227
ES		 1644enum acpi_rasf_capabiliities {
1645 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
1646 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
1647};
1648
1649/* Patrol Scrub Commands */
1650
1651enum acpi_rasf_patrol_scrub_commands {
1652 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
1653 ACPI_RASF_START_PATROL_SCRUBBER = 2,
1654 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
1655};
9d8b5e7b 1656
e62f8227
ES		 1657/* Channel Command flags */
1658
1659#define ACPI_RASF_GENERATE_SCI (1<<15)
1660
1661/* Status values */
1662
1663enum acpi_rasf_status {
1664 ACPI_RASF_SUCCESS = 0,
1665 ACPI_RASF_NOT_VALID = 1,
1666 ACPI_RASF_NOT_SUPPORTED = 2,
1667 ACPI_RASF_BUSY = 3,
1668 ACPI_RASF_FAILED = 4,
1669 ACPI_RASF_ABORTED = 5,
1670 ACPI_RASF_INVALID_DATA = 6
1671};
1672
1673/* Status flags */
1674
1675#define ACPI_RASF_COMMAND_COMPLETE (1)
1676#define ACPI_RASF_SCI_DOORBELL (1<<1)
1677#define ACPI_RASF_ERROR (1<<2)
1678#define ACPI_RASF_STATUS (0x1F<<3)
9d8b5e7b 1679
b24aad44
BM		 1680/*******************************************************************************
1681 *
e62f8227 1682 * SBST - Smart Battery Specification Table
6e2d5ebd
BM		 1683 * Version 1
1684 *
e62f8227
ES		 1685 ******************************************************************************/
1686
1687struct acpi_table_sbst {
1688 struct acpi_table_header header; /* Common ACPI table header */
1689 u32 warning_level;
1690 u32 low_level;
1691 u32 critical_level;
1692};
1693
1694/*******************************************************************************
1695 *
1696 * SDEI - Software Delegated Exception Interface Descriptor Table
1697 *
1698 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
1699 * May 8th, 2017. Copyright 2017 ARM Ltd.
b24aad44
BM		 1700 *
1701 ******************************************************************************/
1702
e62f8227 1703struct acpi_table_sdei {
b24aad44 1704 struct acpi_table_header header; /* Common ACPI table header */
b24aad44
BM		 1705};
1706
e6ab3b77
LZ		 1707/*******************************************************************************
1708 *
e62f8227 1709 * SDEV - Secure Devices Table (ACPI 6.2)
e6ab3b77
LZ		 1710 * Version 1
1711 *
e6ab3b77
LZ		 1712 ******************************************************************************/
1713
e62f8227 1714struct acpi_table_sdev {
e6ab3b77 1715 struct acpi_table_header header; /* Common ACPI table header */
e6ab3b77
LZ		 1716};
1717
e62f8227
ES		 1718struct acpi_sdev_header {
1719 u8 type;
1720 u8 flags;
1721 u16 length;
1722};
1723
1724/* Values for subtable type above */
1725
1726enum acpi_sdev_type {
1727 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
1728 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
1729 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
1730};
e6ab3b77 1731
e62f8227
ES		 1732/* Values for flags above */
1733
1734#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
14012d2f 1735#define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1)
e62f8227
ES		 1736
1737/*
1738 * SDEV subtables
1739 */
1740
1741/* 0: Namespace Device Based Secure Device Structure */
1742
1743struct acpi_sdev_namespace {
1744 struct acpi_sdev_header header;
1745 u16 device_id_offset;
1746 u16 device_id_length;
1747 u16 vendor_data_offset;
1748 u16 vendor_data_length;
1749};
1750
14012d2f
EK		 1751struct acpi_sdev_secure_component {
1752 u16 secure_component_offset;
1753 u16 secure_component_length;
1754};
1755
1756/*
1757 * SDEV sub-subtables ("Components") for above
1758 */
1759struct acpi_sdev_component {
1760 struct acpi_sdev_header header;
1761};
1762
1763/* Values for sub-subtable type above */
1764
1765enum acpi_sac_type {
1766 ACPI_SDEV_TYPE_ID_COMPONENT = 0,
1767 ACPI_SDEV_TYPE_MEM_COMPONENT = 1
1768};
1769
1770struct acpi_sdev_id_component {
1771 struct acpi_sdev_header header;
1772 u16 hardware_id_offset;
1773 u16 hardware_id_length;
1774 u16 subsystem_id_offset;
1775 u16 subsystem_id_length;
1776 u16 hardware_revision;
1777 u8 hardware_rev_present;
1778 u8 class_code_present;
1779 u8 pci_base_class;
1780 u8 pci_sub_class;
1781 u8 pci_programming_xface;
1782};
1783
1784struct acpi_sdev_mem_component {
1785 struct acpi_sdev_header header;
1786 u32 reserved;
1787 u64 memory_base_address;
1788 u64 memory_length;
1789};
1790
e62f8227
ES		 1791/* 1: PCIe Endpoint Device Based Device Structure */
1792
1793struct acpi_sdev_pcie {
1794 struct acpi_sdev_header header;
1795 u16 segment;
1796 u16 start_bus;
1797 u16 path_offset;
1798 u16 path_length;
1799 u16 vendor_data_offset;
1800 u16 vendor_data_length;
1801};
1802
1803/* 1a: PCIe Endpoint path entry */
1804
1805struct acpi_sdev_pcie_path {
1806 u8 device;
1807 u8 function;
1808};
e6ab3b77 1809
6e596084
RM		 1810/* Reset to default packing */
1811
1812#pragma pack()
b24aad44
BM		 1813
1814#endif /* __ACTBL2_H__ */
Linux 6.x block layer and io_uring tree(s)