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Merge tag 'tag-chrome-platform-for-v5.10' of git://git.kernel.org/pub/scm/linux/kerne...
[linux-block.git] / include / acpi / actbl2.h
CommitLineData
95857638 1/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
a8357b0c
BM		 2/******************************************************************************
3 *
5cf4d733 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
a8357b0c 5 *
800ba7c5 6 * Copyright (C) 2000 - 2020, Intel Corp.
a8357b0c 7 *
95857638 8 *****************************************************************************/
a8357b0c 9
b24aad44
BM		 10#ifndef __ACTBL2_H__
11#define __ACTBL2_H__
12
13/*******************************************************************************
14 *
15 * Additional ACPI Tables (2)
16 *
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
19 *
b24aad44
BM		 20 ******************************************************************************/
21
22/*
6e2d5ebd
BM		 23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
b24aad44 26 */
874f6a72 27#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
6e2d5ebd 28#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
d36d4e30 29#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
e62f8227 30#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
b24aad44 31#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
0e264f0b 32#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
e62f8227
ES		 33#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
34#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
5132f2fa 35#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
98b5c993 36#define ACPI_SIG_MTMR "MTMR" /* MID Timer table */
e62f8227
ES		 37#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
38#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
39#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
40#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
41#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
42#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
43#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
3bd38469 44#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
e62f8227 45#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
88055d8f 46#define ACPI_SIG_NHLT "NHLT" /* Non-HDAudio Link Table */
4461cf54 47
b24aad44
BM		 48/*
49 * All tables must be byte-packed to match the ACPI specification, since
50 * the tables are provided by the system BIOS.
51 */
52#pragma pack(1)
53
54/*
be030a57
BM		 55 * Note: C bitfields are not used for this reason:
56 *
57 * "Bitfields are great and easy to read, but unfortunately the C language
58 * does not specify the layout of bitfields in memory, which means they are
59 * essentially useless for dealing with packed data in on-disk formats or
60 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
61 * this decision was a design error in C. Ritchie could have picked an order
62 * and stuck with it." Norman Ramsey.
63 * See http://stackoverflow.com/a/1053662/41661
b24aad44
BM		 64 */
65
874f6a72
LZ		 66/*******************************************************************************
67 *
68 * IORT - IO Remapping Table
69 *
70 * Conforms to "IO Remapping Table System Software on ARM Platforms",
d87be043 71 * Document number: ARM DEN 0049D, March 2018
874f6a72
LZ		 72 *
73 ******************************************************************************/
74
75struct acpi_table_iort {
76 struct acpi_table_header header;
77 u32 node_count;
78 u32 node_offset;
79 u32 reserved;
80};
81
82/*
83 * IORT subtables
84 */
85struct acpi_iort_node {
86 u8 type;
87 u16 length;
88 u8 revision;
89 u32 reserved;
90 u32 mapping_count;
91 u32 mapping_offset;
92 char node_data[1];
93};
94
95/* Values for subtable Type above */
96
97enum acpi_iort_node_type {
98 ACPI_IORT_NODE_ITS_GROUP = 0x00,
99 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
100 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
4ac78baf 101 ACPI_IORT_NODE_SMMU = 0x03,
a53eaef6
RM		 102 ACPI_IORT_NODE_SMMU_V3 = 0x04,
103 ACPI_IORT_NODE_PMCG = 0x05
874f6a72
LZ		 104};
105
106struct acpi_iort_id_mapping {
107 u32 input_base; /* Lowest value in input range */
108 u32 id_count; /* Number of IDs */
109 u32 output_base; /* Lowest value in output range */
110 u32 output_reference; /* A reference to the output node */
111 u32 flags;
112};
113
114/* Masks for Flags field above for IORT subtable */
115
116#define ACPI_IORT_ID_SINGLE_MAPPING (1)
117
118struct acpi_iort_memory_access {
119 u32 cache_coherency;
120 u8 hints;
121 u16 reserved;
122 u8 memory_flags;
123};
124
125/* Values for cache_coherency field above */
126
127#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
128#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
129
130/* Masks for Hints field above */
131
132#define ACPI_IORT_HT_TRANSIENT (1)
133#define ACPI_IORT_HT_WRITE (1<<1)
134#define ACPI_IORT_HT_READ (1<<2)
135#define ACPI_IORT_HT_OVERRIDE (1<<3)
136
137/* Masks for memory_flags field above */
138
139#define ACPI_IORT_MF_COHERENCY (1)
140#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
141
142/*
143 * IORT node specific subtables
144 */
145struct acpi_iort_its_group {
146 u32 its_count;
c163f90c 147 u32 identifiers[1]; /* GIC ITS identifier array */
874f6a72
LZ		 148};
149
150struct acpi_iort_named_component {
151 u32 node_flags;
152 u64 memory_properties; /* Memory access properties */
153 u8 memory_address_limit; /* Memory address size limit */
154 char device_name[1]; /* Path of namespace object */
155};
156
d87be043
RM		 157/* Masks for Flags field above */
158
159#define ACPI_IORT_NC_STALL_SUPPORTED (1)
160#define ACPI_IORT_NC_PASID_BITS (31<<1)
161
874f6a72
LZ		 162struct acpi_iort_root_complex {
163 u64 memory_properties; /* Memory access properties */
164 u32 ats_attribute;
165 u32 pci_segment_number;
d87be043
RM		 166 u8 memory_address_limit; /* Memory address size limit */
167 u8 reserved[3]; /* Reserved, must be zero */
874f6a72
LZ		 168};
169
170/* Values for ats_attribute field above */
171
172#define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */
173#define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */
174
175struct acpi_iort_smmu {
176 u64 base_address; /* SMMU base address */
177 u64 span; /* Length of memory range */
178 u32 model;
179 u32 flags;
180 u32 global_interrupt_offset;
181 u32 context_interrupt_count;
182 u32 context_interrupt_offset;
183 u32 pmu_interrupt_count;
184 u32 pmu_interrupt_offset;
185 u64 interrupts[1]; /* Interrupt array */
186};
187
188/* Values for Model field above */
189
190#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
191#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
192#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
193#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
0c2021c0
RM		 194#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
195#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
874f6a72
LZ		 196
197/* Masks for Flags field above */
198
199#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
200#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
201
bb1e23e6
LZ		 202/* Global interrupt format */
203
204struct acpi_iort_smmu_gsi {
205 u32 nsg_irpt;
206 u32 nsg_irpt_flags;
207 u32 nsg_cfg_irpt;
208 u32 nsg_cfg_irpt_flags;
209};
210
4ac78baf
AS		 211struct acpi_iort_smmu_v3 {
212 u64 base_address; /* SMMUv3 base address */
213 u32 flags;
214 u32 reserved;
215 u64 vatos_address;
0c2021c0 216 u32 model;
4ac78baf
AS		 217 u32 event_gsiv;
218 u32 pri_gsiv;
219 u32 gerr_gsiv;
220 u32 sync_gsiv;
d87be043 221 u32 pxm;
4c106aa4 222 u32 id_mapping_index;
4ac78baf
AS		 223};
224
0c2021c0
RM		 225/* Values for Model field above */
226
227#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
228#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
229#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
230
4ac78baf
AS		 231/* Masks for Flags field above */
232
233#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
d87be043 234#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
c9442300 235#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
4ac78baf 236
a53eaef6
RM		 237struct acpi_iort_pmcg {
238 u64 page0_base_address;
239 u32 overflow_gsiv;
240 u32 node_reference;
241 u64 page1_base_address;
242};
243
6e2d5ebd
BM		 244/*******************************************************************************
245 *
246 * IVRS - I/O Virtualization Reporting Structure
247 * Version 1
248 *
249 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
250 * Revision 1.26, February 2009.
251 *
252 ******************************************************************************/
253
254struct acpi_table_ivrs {
255 struct acpi_table_header header; /* Common ACPI table header */
256 u32 info; /* Common virtualization info */
257 u64 reserved;
258};
259
260/* Values for Info field above */
261
262#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
263#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
264#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
265
266/* IVRS subtable header */
267
268struct acpi_ivrs_header {
269 u8 type; /* Subtable type */
270 u8 flags;
271 u16 length; /* Subtable length */
272 u16 device_id; /* ID of IOMMU */
273};
274
275/* Values for subtable Type above */
276
277enum acpi_ivrs_type {
1f6239ca
MÅ»		 278 ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
279 ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
6e2d5ebd
BM		 280 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
281 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
282 ACPI_IVRS_TYPE_MEMORY3 = 0x22
283};
284
285/* Masks for Flags field above for IVHD subtable */
286
287#define ACPI_IVHD_TT_ENABLE (1)
288#define ACPI_IVHD_PASS_PW (1<<1)
289#define ACPI_IVHD_RES_PASS_PW (1<<2)
290#define ACPI_IVHD_ISOC (1<<3)
291#define ACPI_IVHD_IOTLB (1<<4)
292
293/* Masks for Flags field above for IVMD subtable */
294
295#define ACPI_IVMD_UNITY (1)
296#define ACPI_IVMD_READ (1<<1)
297#define ACPI_IVMD_WRITE (1<<2)
298#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
299
300/*
301 * IVRS subtables, correspond to Type in struct acpi_ivrs_header
302 */
303
304/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
305
1f6239ca 306struct acpi_ivrs_hardware_10 {
6e2d5ebd
BM		 307 struct acpi_ivrs_header header;
308 u16 capability_offset; /* Offset for IOMMU control fields */
309 u64 base_address; /* IOMMU control registers */
310 u16 pci_segment_group;
311 u16 info; /* MSI number and unit ID */
0dc7e795 312 u32 feature_reporting;
6e2d5ebd
BM		 313};
314
1f6239ca
MÅ»		 315/* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */
316
317struct acpi_ivrs_hardware_11 {
318 struct acpi_ivrs_header header;
319 u16 capability_offset; /* Offset for IOMMU control fields */
320 u64 base_address; /* IOMMU control registers */
321 u16 pci_segment_group;
322 u16 info; /* MSI number and unit ID */
323 u32 attributes;
324 u64 efr_register_image;
325 u64 reserved;
326};
327
6e2d5ebd
BM		 328/* Masks for Info field above */
329
330#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
ba494bee 331#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
6e2d5ebd
BM		 332
333/*
334 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
335 * Upper two bits of the Type field are the (encoded) length of the structure.
336 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
337 * are reserved for future use but not defined.
338 */
339struct acpi_ivrs_de_header {
340 u8 type;
341 u16 id;
342 u8 data_setting;
343};
344
345/* Length of device entry is in the top two bits of Type field above */
346
347#define ACPI_IVHD_ENTRY_LENGTH 0xC0
348
349/* Values for device entry Type field above */
350
351enum acpi_ivrs_device_entry_type {
352 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
353
354 ACPI_IVRS_TYPE_PAD4 = 0,
355 ACPI_IVRS_TYPE_ALL = 1,
356 ACPI_IVRS_TYPE_SELECT = 2,
357 ACPI_IVRS_TYPE_START = 3,
358 ACPI_IVRS_TYPE_END = 4,
359
360 /* 8-byte device entries */
361
362 ACPI_IVRS_TYPE_PAD8 = 64,
363 ACPI_IVRS_TYPE_NOT_USED = 65,
364 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
365 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
366 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
367 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
368 ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses struct acpi_ivrs_device8c */
369};
370
371/* Values for Data field above */
372
373#define ACPI_IVHD_INIT_PASS (1)
374#define ACPI_IVHD_EINT_PASS (1<<1)
375#define ACPI_IVHD_NMI_PASS (1<<2)
376#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
377#define ACPI_IVHD_LINT0_PASS (1<<6)
378#define ACPI_IVHD_LINT1_PASS (1<<7)
379
380/* Types 0-4: 4-byte device entry */
381
382struct acpi_ivrs_device4 {
383 struct acpi_ivrs_de_header header;
384};
385
386/* Types 66-67: 8-byte device entry */
387
388struct acpi_ivrs_device8a {
389 struct acpi_ivrs_de_header header;
390 u8 reserved1;
391 u16 used_id;
392 u8 reserved2;
393};
394
395/* Types 70-71: 8-byte device entry */
396
397struct acpi_ivrs_device8b {
398 struct acpi_ivrs_de_header header;
399 u32 extended_data;
400};
401
402/* Values for extended_data above */
403
404#define ACPI_IVHD_ATS_DISABLED (1<<31)
405
406/* Type 72: 8-byte device entry */
407
408struct acpi_ivrs_device8c {
409 struct acpi_ivrs_de_header header;
410 u8 handle;
411 u16 used_id;
412 u8 variety;
413};
414
415/* Values for Variety field above */
416
417#define ACPI_IVHD_IOAPIC 1
418#define ACPI_IVHD_HPET 2
419
420/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
421
422struct acpi_ivrs_memory {
423 struct acpi_ivrs_header header;
424 u16 aux_data;
425 u64 reserved;
426 u64 start_address;
427 u64 memory_length;
428};
429
d36d4e30
BM		 430/*******************************************************************************
431 *
432 * LPIT - Low Power Idle Table
433 *
9ab8cf1b 434 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
d36d4e30
BM		 435 *
436 ******************************************************************************/
437
438struct acpi_table_lpit {
439 struct acpi_table_header header; /* Common ACPI table header */
440};
441
442/* LPIT subtable header */
443
444struct acpi_lpit_header {
445 u32 type; /* Subtable type */
446 u32 length; /* Subtable length */
447 u16 unique_id;
448 u16 reserved;
449 u32 flags;
450};
451
452/* Values for subtable Type above */
453
454enum acpi_lpit_type {
455 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
9ab8cf1b 456 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
d36d4e30
BM		 457};
458
459/* Masks for Flags field above */
460
461#define ACPI_LPIT_STATE_DISABLED (1)
462#define ACPI_LPIT_NO_COUNTER (1<<1)
463
464/*
465 * LPIT subtables, correspond to Type in struct acpi_lpit_header
466 */
467
468/* 0x00: Native C-state instruction based LPI structure */
469
470struct acpi_lpit_native {
471 struct acpi_lpit_header header;
472 struct acpi_generic_address entry_trigger;
473 u32 residency;
474 u32 latency;
475 struct acpi_generic_address residency_counter;
476 u64 counter_frequency;
477};
478
b24aad44
BM		 479/*******************************************************************************
480 *
e62f8227
ES		 481 * MADT - Multiple APIC Description Table
482 * Version 3
b24aad44
BM		 483 *
484 ******************************************************************************/
485
e62f8227 486struct acpi_table_madt {
b24aad44 487 struct acpi_table_header header; /* Common ACPI table header */
e62f8227
ES		 488 u32 address; /* Physical address of local APIC */
489 u32 flags;
b24aad44
BM		 490};
491
e62f8227 492/* Masks for Flags field above */
b24aad44 493
e62f8227
ES		 494#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
495
496/* Values for PCATCompat flag */
497
498#define ACPI_MADT_DUAL_PIC 1
499#define ACPI_MADT_MULTIPLE_APIC 0
500
501/* Values for MADT subtable type in struct acpi_subtable_header */
502
503enum acpi_madt_type {
504 ACPI_MADT_TYPE_LOCAL_APIC = 0,
505 ACPI_MADT_TYPE_IO_APIC = 1,
506 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
507 ACPI_MADT_TYPE_NMI_SOURCE = 3,
508 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
509 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
510 ACPI_MADT_TYPE_IO_SAPIC = 6,
511 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
512 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
513 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
514 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
515 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
516 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
517 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
518 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
519 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
520 ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */
521};
522
523/*
524 * MADT Subtables, correspond to Type in struct acpi_subtable_header
525 */
526
527/* 0: Processor Local APIC */
528
529struct acpi_madt_local_apic {
530 struct acpi_subtable_header header;
531 u8 processor_id; /* ACPI processor id */
532 u8 id; /* Processor's local APIC id */
533 u32 lapic_flags;
534};
535
536/* 1: IO APIC */
537
538struct acpi_madt_io_apic {
539 struct acpi_subtable_header header;
540 u8 id; /* I/O APIC ID */
541 u8 reserved; /* reserved - must be zero */
542 u32 address; /* APIC physical address */
543 u32 global_irq_base; /* Global system interrupt where INTI lines start */
544};
545
546/* 2: Interrupt Override */
547
548struct acpi_madt_interrupt_override {
549 struct acpi_subtable_header header;
550 u8 bus; /* 0 - ISA */
551 u8 source_irq; /* Interrupt source (IRQ) */
552 u32 global_irq; /* Global system interrupt */
553 u16 inti_flags;
554};
555
556/* 3: NMI Source */
557
558struct acpi_madt_nmi_source {
559 struct acpi_subtable_header header;
560 u16 inti_flags;
561 u32 global_irq; /* Global system interrupt */
562};
563
564/* 4: Local APIC NMI */
565
566struct acpi_madt_local_apic_nmi {
567 struct acpi_subtable_header header;
568 u8 processor_id; /* ACPI processor id */
569 u16 inti_flags;
570 u8 lint; /* LINTn to which NMI is connected */
571};
572
573/* 5: Address Override */
574
575struct acpi_madt_local_apic_override {
576 struct acpi_subtable_header header;
577 u16 reserved; /* Reserved, must be zero */
578 u64 address; /* APIC physical address */
579};
580
581/* 6: I/O Sapic */
582
583struct acpi_madt_io_sapic {
584 struct acpi_subtable_header header;
585 u8 id; /* I/O SAPIC ID */
586 u8 reserved; /* Reserved, must be zero */
587 u32 global_irq_base; /* Global interrupt for SAPIC start */
588 u64 address; /* SAPIC physical address */
589};
590
591/* 7: Local Sapic */
592
593struct acpi_madt_local_sapic {
594 struct acpi_subtable_header header;
595 u8 processor_id; /* ACPI processor id */
596 u8 id; /* SAPIC ID */
597 u8 eid; /* SAPIC EID */
598 u8 reserved[3]; /* Reserved, must be zero */
599 u32 lapic_flags;
600 u32 uid; /* Numeric UID - ACPI 3.0 */
601 char uid_string[1]; /* String UID - ACPI 3.0 */
602};
603
604/* 8: Platform Interrupt Source */
605
606struct acpi_madt_interrupt_source {
607 struct acpi_subtable_header header;
608 u16 inti_flags;
609 u8 type; /* 1=PMI, 2=INIT, 3=corrected */
610 u8 id; /* Processor ID */
611 u8 eid; /* Processor EID */
612 u8 io_sapic_vector; /* Vector value for PMI interrupts */
613 u32 global_irq; /* Global system interrupt */
614 u32 flags; /* Interrupt Source Flags */
615};
616
617/* Masks for Flags field above */
618
619#define ACPI_MADT_CPEI_OVERRIDE (1)
620
621/* 9: Processor Local X2APIC (ACPI 4.0) */
622
623struct acpi_madt_local_x2apic {
624 struct acpi_subtable_header header;
625 u16 reserved; /* reserved - must be zero */
626 u32 local_apic_id; /* Processor x2APIC ID */
627 u32 lapic_flags;
628 u32 uid; /* ACPI processor UID */
629};
630
631/* 10: Local X2APIC NMI (ACPI 4.0) */
632
633struct acpi_madt_local_x2apic_nmi {
634 struct acpi_subtable_header header;
635 u16 inti_flags;
636 u32 uid; /* ACPI processor UID */
637 u8 lint; /* LINTn to which NMI is connected */
638 u8 reserved[3]; /* reserved - must be zero */
639};
640
e646e0a5 641/* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */
e62f8227
ES		 642
643struct acpi_madt_generic_interrupt {
644 struct acpi_subtable_header header;
645 u16 reserved; /* reserved - must be zero */
646 u32 cpu_interface_number;
647 u32 uid;
648 u32 flags;
649 u32 parking_version;
650 u32 performance_interrupt;
651 u64 parked_address;
652 u64 base_address;
653 u64 gicv_base_address;
654 u64 gich_base_address;
655 u32 vgic_interrupt;
656 u64 gicr_base_address;
657 u64 arm_mpidr;
658 u8 efficiency_class;
e646e0a5
ES		 659 u8 reserved2[1];
660 u16 spe_interrupt; /* ACPI 6.3 */
e62f8227
ES		 661};
662
663/* Masks for Flags field above */
664
665/* ACPI_MADT_ENABLED (1) Processor is usable if set */
666#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
667#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
668
669/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
670
671struct acpi_madt_generic_distributor {
672 struct acpi_subtable_header header;
673 u16 reserved; /* reserved - must be zero */
674 u32 gic_id;
675 u64 base_address;
676 u32 global_irq_base;
677 u8 version;
678 u8 reserved2[3]; /* reserved - must be zero */
679};
680
681/* Values for Version field above */
682
683enum acpi_madt_gic_version {
684 ACPI_MADT_GIC_VERSION_NONE = 0,
685 ACPI_MADT_GIC_VERSION_V1 = 1,
686 ACPI_MADT_GIC_VERSION_V2 = 2,
687 ACPI_MADT_GIC_VERSION_V3 = 3,
688 ACPI_MADT_GIC_VERSION_V4 = 4,
689 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
690};
691
692/* 13: Generic MSI Frame (ACPI 5.1) */
693
694struct acpi_madt_generic_msi_frame {
695 struct acpi_subtable_header header;
696 u16 reserved; /* reserved - must be zero */
697 u32 msi_frame_id;
698 u64 base_address;
699 u32 flags;
700 u16 spi_count;
701 u16 spi_base;
702};
703
704/* Masks for Flags field above */
705
706#define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
707
708/* 14: Generic Redistributor (ACPI 5.1) */
709
710struct acpi_madt_generic_redistributor {
711 struct acpi_subtable_header header;
712 u16 reserved; /* reserved - must be zero */
713 u64 base_address;
714 u32 length;
715};
716
717/* 15: Generic Translator (ACPI 6.0) */
718
719struct acpi_madt_generic_translator {
720 struct acpi_subtable_header header;
721 u16 reserved; /* reserved - must be zero */
722 u32 translation_id;
723 u64 base_address;
724 u32 reserved2;
725};
726
727/*
728 * Common flags fields for MADT subtables
729 */
730
731/* MADT Local APIC flags */
732
733#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
734
735/* MADT MPS INTI flags (inti_flags) */
736
737#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
738#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
739
740/* Values for MPS INTI flags */
741
742#define ACPI_MADT_POLARITY_CONFORMS 0
743#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
744#define ACPI_MADT_POLARITY_RESERVED 2
745#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
746
747#define ACPI_MADT_TRIGGER_CONFORMS (0)
748#define ACPI_MADT_TRIGGER_EDGE (1<<2)
749#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
750#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
751
752/*******************************************************************************
753 *
754 * MCFG - PCI Memory Mapped Configuration table and subtable
755 * Version 1
756 *
757 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
758 *
759 ******************************************************************************/
760
761struct acpi_table_mcfg {
762 struct acpi_table_header header; /* Common ACPI table header */
763 u8 reserved[8];
764};
765
766/* Subtable */
767
768struct acpi_mcfg_allocation {
769 u64 address; /* Base address, processor-relative */
770 u16 pci_segment; /* PCI segment group number */
771 u8 start_bus_number; /* Starting PCI Bus number */
772 u8 end_bus_number; /* Final PCI Bus number */
b24aad44
BM		 773 u32 reserved;
774};
775
0e264f0b
BM		 776/*******************************************************************************
777 *
778 * MCHI - Management Controller Host Interface Table
779 * Version 1
780 *
781 * Conforms to "Management Component Transport Protocol (MCTP) Host
782 * Interface Specification", Revision 1.0.0a, October 13, 2009
783 *
784 ******************************************************************************/
785
786struct acpi_table_mchi {
787 struct acpi_table_header header; /* Common ACPI table header */
788 u8 interface_type;
789 u8 protocol;
790 u64 protocol_data;
791 u8 interrupt_type;
792 u8 gpe;
793 u8 pci_device_flag;
794 u32 global_interrupt;
795 struct acpi_generic_address control_register;
796 u8 pci_segment;
797 u8 pci_bus;
798 u8 pci_device;
799 u8 pci_function;
800};
801
e62f8227
ES		 802/*******************************************************************************
803 *
804 * MPST - Memory Power State Table (ACPI 5.0)
805 * Version 1
806 *
807 ******************************************************************************/
808
809#define ACPI_MPST_CHANNEL_INFO \
810 u8 channel_id; \
811 u8 reserved1[3]; \
812 u16 power_node_count; \
813 u16 reserved2;
814
815/* Main table */
816
817struct acpi_table_mpst {
818 struct acpi_table_header header; /* Common ACPI table header */
819 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
820};
821
822/* Memory Platform Communication Channel Info */
823
824struct acpi_mpst_channel {
825 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
826};
827
828/* Memory Power Node Structure */
829
830struct acpi_mpst_power_node {
831 u8 flags;
832 u8 reserved1;
833 u16 node_id;
834 u32 length;
835 u64 range_address;
836 u64 range_length;
837 u32 num_power_states;
838 u32 num_physical_components;
839};
840
841/* Values for Flags field above */
842
843#define ACPI_MPST_ENABLED 1
844#define ACPI_MPST_POWER_MANAGED 2
845#define ACPI_MPST_HOT_PLUG_CAPABLE 4
846
847/* Memory Power State Structure (follows POWER_NODE above) */
848
849struct acpi_mpst_power_state {
850 u8 power_state;
851 u8 info_index;
852};
853
854/* Physical Component ID Structure (follows POWER_STATE above) */
855
856struct acpi_mpst_component {
857 u16 component_id;
858};
859
860/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
861
862struct acpi_mpst_data_hdr {
863 u16 characteristics_count;
864 u16 reserved;
865};
866
867struct acpi_mpst_power_data {
868 u8 structure_id;
869 u8 flags;
870 u16 reserved1;
871 u32 average_power;
872 u32 power_saving;
873 u64 exit_latency;
874 u64 reserved2;
875};
876
877/* Values for Flags field above */
878
879#define ACPI_MPST_PRESERVE 1
880#define ACPI_MPST_AUTOENTRY 2
881#define ACPI_MPST_AUTOEXIT 4
882
883/* Shared Memory Region (not part of an ACPI table) */
884
885struct acpi_mpst_shared {
886 u32 signature;
887 u16 pcc_command;
888 u16 pcc_status;
889 u32 command_register;
890 u32 status_register;
891 u32 power_state_id;
892 u32 power_node_id;
893 u64 energy_consumed;
894 u64 average_power;
895};
896
897/*******************************************************************************
898 *
899 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
900 * Version 1
901 *
902 ******************************************************************************/
903
904struct acpi_table_msct {
905 struct acpi_table_header header; /* Common ACPI table header */
906 u32 proximity_offset; /* Location of proximity info struct(s) */
907 u32 max_proximity_domains; /* Max number of proximity domains */
908 u32 max_clock_domains; /* Max number of clock domains */
909 u64 max_address; /* Max physical address in system */
910};
911
912/* subtable - Maximum Proximity Domain Information. Version 1 */
913
914struct acpi_msct_proximity {
915 u8 revision;
916 u8 length;
917 u32 range_start; /* Start of domain range */
918 u32 range_end; /* End of domain range */
919 u32 processor_capacity;
920 u64 memory_capacity; /* In bytes */
921};
922
5132f2fa
BM		 923/*******************************************************************************
924 *
925 * MSDM - Microsoft Data Management table
926 *
927 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
928 * November 29, 2011. Copyright 2011 Microsoft
929 *
930 ******************************************************************************/
931
932/* Basic MSDM table is only the common ACPI header */
933
934struct acpi_table_msdm {
935 struct acpi_table_header header; /* Common ACPI table header */
936};
937
98b5c993
LZ		 938/*******************************************************************************
939 *
940 * MTMR - MID Timer Table
941 * Version 1
942 *
943 * Conforms to "Simple Firmware Interface Specification",
944 * Draft 0.8.2, Oct 19, 2010
945 * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table.
946 *
947 ******************************************************************************/
948
949struct acpi_table_mtmr {
950 struct acpi_table_header header; /* Common ACPI table header */
951};
952
953/* MTMR entry */
954
955struct acpi_mtmr_entry {
956 struct acpi_generic_address physical_address;
957 u32 frequency;
958 u32 irq;
959};
960
3bd38469
JM		 961/*******************************************************************************
962 *
e62f8227
ES		 963 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
964 * Version 1
3bd38469
JM		 965 *
966 ******************************************************************************/
967
e62f8227 968struct acpi_table_nfit {
3bd38469 969 struct acpi_table_header header; /* Common ACPI table header */
e62f8227 970 u32 reserved; /* Reserved, must be zero */
3bd38469
JM		 971};
972
e62f8227 973/* Subtable header for NFIT */
5cf4d733 974
e62f8227
ES		 975struct acpi_nfit_header {
976 u16 type;
977 u16 length;
978};
5cf4d733 979
e62f8227
ES		 980/* Values for subtable type in struct acpi_nfit_header */
981
982enum acpi_nfit_type {
983 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
984 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
985 ACPI_NFIT_TYPE_INTERLEAVE = 2,
986 ACPI_NFIT_TYPE_SMBIOS = 3,
987 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
988 ACPI_NFIT_TYPE_DATA_REGION = 5,
989 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
990 ACPI_NFIT_TYPE_CAPABILITIES = 7,
991 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
5cf4d733
BM		 992};
993
e62f8227
ES		 994/*
995 * NFIT Subtables
996 */
b24aad44 997
e62f8227
ES		 998/* 0: System Physical Address Range Structure */
999
1000struct acpi_nfit_system_address {
1001 struct acpi_nfit_header header;
1002 u16 range_index;
1003 u16 flags;
1004 u32 reserved; /* Reserved, must be zero */
1005 u32 proximity_domain;
1006 u8 range_guid[16];
1007 u64 address;
1008 u64 length;
1009 u64 memory_mapping;
b24aad44
BM		 1010};
1011
e62f8227 1012/* Flags */
6e2d5ebd 1013
e62f8227
ES		 1014#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1015#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
6e2d5ebd 1016
e62f8227 1017/* Range Type GUIDs appear in the include/acuuid.h file */
29a3f38e 1018
e62f8227 1019/* 1: Memory Device to System Address Range Map Structure */
b24aad44 1020
e62f8227
ES		 1021struct acpi_nfit_memory_map {
1022 struct acpi_nfit_header header;
1023 u32 device_handle;
1024 u16 physical_id;
1025 u16 region_id;
1026 u16 range_index;
1027 u16 region_index;
1028 u64 region_size;
1029 u64 region_offset;
1030 u64 address;
1031 u16 interleave_index;
1032 u16 interleave_ways;
1033 u16 flags;
1034 u16 reserved; /* Reserved, must be zero */
6e2d5ebd
BM		 1035};
1036
e62f8227
ES		 1037/* Flags */
1038
1039#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1040#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1041#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1042#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1043#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1044#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1045#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
6e2d5ebd 1046
e62f8227
ES		 1047/* 2: Interleave Structure */
1048
1049struct acpi_nfit_interleave {
1050 struct acpi_nfit_header header;
1051 u16 interleave_index;
1052 u16 reserved; /* Reserved, must be zero */
1053 u32 line_count;
1054 u32 line_size;
1055 u32 line_offset[1]; /* Variable length */
b24aad44
BM		 1056};
1057
e62f8227 1058/* 3: SMBIOS Management Information Structure */
b24aad44 1059
e62f8227
ES		 1060struct acpi_nfit_smbios {
1061 struct acpi_nfit_header header;
1062 u32 reserved; /* Reserved, must be zero */
1063 u8 data[1]; /* Variable length */
15a61aa1
BM		 1064};
1065
e62f8227 1066/* 4: NVDIMM Control Region Structure */
15a61aa1 1067
e62f8227
ES		 1068struct acpi_nfit_control_region {
1069 struct acpi_nfit_header header;
1070 u16 region_index;
1071 u16 vendor_id;
1072 u16 device_id;
1073 u16 revision_id;
1074 u16 subsystem_vendor_id;
1075 u16 subsystem_device_id;
1076 u16 subsystem_revision_id;
1077 u8 valid_fields;
1078 u8 manufacturing_location;
1079 u16 manufacturing_date;
1080 u8 reserved[2]; /* Reserved, must be zero */
1081 u32 serial_number;
1082 u16 code;
1083 u16 windows;
1084 u64 window_size;
1085 u64 command_offset;
1086 u64 command_size;
1087 u64 status_offset;
1088 u64 status_size;
1089 u16 flags;
1090 u8 reserved1[6]; /* Reserved, must be zero */
1091};
1092
1093/* Flags */
1094
1095#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1096
1097/* valid_fields bits */
1098
1099#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1100
1101/* 5: NVDIMM Block Data Window Region Structure */
1102
1103struct acpi_nfit_data_region {
1104 struct acpi_nfit_header header;
1105 u16 region_index;
1106 u16 windows;
1107 u64 offset;
1108 u64 size;
1109 u64 capacity;
1110 u64 start_address;
9005694e
BM		 1111};
1112
e62f8227
ES		 1113/* 6: Flush Hint Address Structure */
1114
1115struct acpi_nfit_flush_address {
1116 struct acpi_nfit_header header;
1117 u32 device_handle;
1118 u16 hint_count;
1119 u8 reserved[6]; /* Reserved, must be zero */
1120 u64 hint_address[1]; /* Variable length */
1121};
1122
1123/* 7: Platform Capabilities Structure */
1124
1125struct acpi_nfit_capabilities {
1126 struct acpi_nfit_header header;
1127 u8 highest_capability;
1128 u8 reserved[3]; /* Reserved, must be zero */
1129 u32 capabilities;
1130 u32 reserved2;
9005694e
BM		 1131};
1132
e62f8227
ES		 1133/* Capabilities Flags */
1134
1135#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1136#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1137#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1138
1139/*
1140 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1141 */
1142struct nfit_device_handle {
1143 u32 handle;
1144};
9005694e 1145
e62f8227 1146/* Device handle construction and extraction macros */
9005694e 1147
e62f8227
ES		 1148#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1149#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1150#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1151#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1152#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
9005694e 1153
e62f8227
ES		 1154#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1155#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1156#define ACPI_NFIT_MEMORY_ID_OFFSET 8
1157#define ACPI_NFIT_SOCKET_ID_OFFSET 12
1158#define ACPI_NFIT_NODE_ID_OFFSET 16
1159
1160/* Macro to construct a NFIT/NVDIMM device handle */
1161
1162#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1163 ((dimm) | \
1164 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1165 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1166 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1167 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1168
1169/* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1170
1171#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1172 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1173
1174#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1175 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1176
1177#define ACPI_NFIT_GET_MEMORY_ID(handle) \
1178 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1179
1180#define ACPI_NFIT_GET_SOCKET_ID(handle) \
1181 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1182
1183#define ACPI_NFIT_GET_NODE_ID(handle) \
1184 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
9005694e
BM		 1185
1186/*******************************************************************************
1187 *
e62f8227
ES		 1188 * PCCT - Platform Communications Channel Table (ACPI 5.0)
1189 * Version 2 (ACPI 6.2)
9005694e
BM		 1190 *
1191 ******************************************************************************/
1192
e62f8227 1193struct acpi_table_pcct {
9005694e 1194 struct acpi_table_header header; /* Common ACPI table header */
e62f8227
ES		 1195 u32 flags;
1196 u64 reserved;
9005694e
BM		 1197};
1198
e62f8227 1199/* Values for Flags field above */
9005694e 1200
e62f8227 1201#define ACPI_PCCT_DOORBELL 1
bff7f90b 1202
e62f8227 1203/* Values for subtable type in struct acpi_subtable_header */
bff7f90b 1204
e62f8227
ES		 1205enum acpi_pcct_type {
1206 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
1207 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
1208 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
1209 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
1210 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
1211 ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */
bff7f90b
BM		 1212};
1213
1214/*
e62f8227 1215 * PCCT Subtables, correspond to Type in struct acpi_subtable_header
bff7f90b
BM		 1216 */
1217
e62f8227 1218/* 0: Generic Communications Subspace */
bff7f90b 1219
e62f8227
ES		 1220struct acpi_pcct_subspace {
1221 struct acpi_subtable_header header;
1222 u8 reserved[6];
1223 u64 base_address;
1224 u64 length;
1225 struct acpi_generic_address doorbell_register;
1226 u64 preserve_mask;
1227 u64 write_mask;
1228 u32 latency;
1229 u32 max_access_rate;
1230 u16 min_turnaround_time;
bff7f90b
BM		 1231};
1232
e62f8227 1233/* 1: HW-reduced Communications Subspace (ACPI 5.1) */
bff7f90b 1234
e62f8227
ES		 1235struct acpi_pcct_hw_reduced {
1236 struct acpi_subtable_header header;
1237 u32 platform_interrupt;
1238 u8 flags;
1239 u8 reserved;
1240 u64 base_address;
1241 u64 length;
1242 struct acpi_generic_address doorbell_register;
1243 u64 preserve_mask;
1244 u64 write_mask;
1245 u32 latency;
1246 u32 max_access_rate;
1247 u16 min_turnaround_time;
1248};
bff7f90b 1249
e62f8227 1250/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
bff7f90b 1251
e62f8227
ES		 1252struct acpi_pcct_hw_reduced_type2 {
1253 struct acpi_subtable_header header;
1254 u32 platform_interrupt;
1255 u8 flags;
1256 u8 reserved;
1257 u64 base_address;
1258 u64 length;
1259 struct acpi_generic_address doorbell_register;
1260 u64 preserve_mask;
1261 u64 write_mask;
1262 u32 latency;
1263 u32 max_access_rate;
1264 u16 min_turnaround_time;
1265 struct acpi_generic_address platform_ack_register;
1266 u64 ack_preserve_mask;
1267 u64 ack_write_mask;
1268};
1269
1270/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
1271
1272struct acpi_pcct_ext_pcc_master {
1273 struct acpi_subtable_header header;
1274 u32 platform_interrupt;
1275 u8 flags;
1276 u8 reserved1;
1277 u64 base_address;
1278 u32 length;
1279 struct acpi_generic_address doorbell_register;
1280 u64 preserve_mask;
1281 u64 write_mask;
1282 u32 latency;
1283 u32 max_access_rate;
1284 u32 min_turnaround_time;
1285 struct acpi_generic_address platform_ack_register;
1286 u64 ack_preserve_mask;
1287 u64 ack_set_mask;
1288 u64 reserved2;
1289 struct acpi_generic_address cmd_complete_register;
1290 u64 cmd_complete_mask;
1291 struct acpi_generic_address cmd_update_register;
1292 u64 cmd_update_preserve_mask;
1293 u64 cmd_update_set_mask;
1294 struct acpi_generic_address error_status_register;
1295 u64 error_status_mask;
1296};
1297
1298/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
1299
1300struct acpi_pcct_ext_pcc_slave {
1301 struct acpi_subtable_header header;
1302 u32 platform_interrupt;
1303 u8 flags;
1304 u8 reserved1;
1305 u64 base_address;
1306 u32 length;
1307 struct acpi_generic_address doorbell_register;
1308 u64 preserve_mask;
1309 u64 write_mask;
1310 u32 latency;
1311 u32 max_access_rate;
1312 u32 min_turnaround_time;
1313 struct acpi_generic_address platform_ack_register;
1314 u64 ack_preserve_mask;
1315 u64 ack_set_mask;
1316 u64 reserved2;
1317 struct acpi_generic_address cmd_complete_register;
1318 u64 cmd_complete_mask;
1319 struct acpi_generic_address cmd_update_register;
1320 u64 cmd_update_preserve_mask;
1321 u64 cmd_update_set_mask;
1322 struct acpi_generic_address error_status_register;
1323 u64 error_status_mask;
1324};
1325
1326/* Values for doorbell flags above */
1327
1328#define ACPI_PCCT_INTERRUPT_POLARITY (1)
1329#define ACPI_PCCT_INTERRUPT_MODE (1<<1)
1330
1331/*
1332 * PCC memory structures (not part of the ACPI table)
1333 */
1334
1335/* Shared Memory Region */
1336
1337struct acpi_pcct_shared_memory {
1338 u32 signature;
1339 u16 command;
1340 u16 status;
1341};
1342
1343/* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
1344
1345struct acpi_pcct_ext_pcc_shared_memory {
1346 u32 signature;
1347 u32 flags;
1348 u32 length;
1349 u32 command;
1350};
cf8252ca 1351
b24aad44
BM		 1352/*******************************************************************************
1353 *
e62f8227
ES		 1354 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
1355 * Version 0
b24aad44
BM		 1356 *
1357 ******************************************************************************/
1358
e62f8227 1359struct acpi_table_pdtt {
b24aad44 1360 struct acpi_table_header header; /* Common ACPI table header */
e62f8227
ES		 1361 u8 trigger_count;
1362 u8 reserved[3];
1363 u32 array_offset;
1364};
1365
1366/*
1367 * PDTT Communication Channel Identifier Structure.
1368 * The number of these structures is defined by trigger_count above,
1369 * starting at array_offset.
1370 */
1371struct acpi_pdtt_channel {
1372 u8 subchannel_id;
1373 u8 flags;
b24aad44
BM		 1374};
1375
e62f8227
ES		 1376/* Flags for above */
1377
1378#define ACPI_PDTT_RUNTIME_TRIGGER (1)
1379#define ACPI_PDTT_WAIT_COMPLETION (1<<1)
f00175d0 1380#define ACPI_PDTT_TRIGGER_ORDER (1<<2)
e62f8227 1381
25c0330a
LZ		 1382/*******************************************************************************
1383 *
e62f8227 1384 * PMTT - Platform Memory Topology Table (ACPI 5.0)
25c0330a
LZ		 1385 * Version 1
1386 *
25c0330a
LZ		 1387 ******************************************************************************/
1388
e62f8227 1389struct acpi_table_pmtt {
25c0330a 1390 struct acpi_table_header header; /* Common ACPI table header */
e62f8227 1391 u32 reserved;
25c0330a
LZ		 1392};
1393
e62f8227 1394/* Common header for PMTT subtables that follow main table */
25c0330a 1395
e62f8227
ES		 1396struct acpi_pmtt_header {
1397 u8 type;
1398 u8 reserved1;
1399 u16 length;
1400 u16 flags;
1401 u16 reserved2;
1402};
1403
1404/* Values for Type field above */
1405
1406#define ACPI_PMTT_TYPE_SOCKET 0
1407#define ACPI_PMTT_TYPE_CONTROLLER 1
1408#define ACPI_PMTT_TYPE_DIMM 2
1409#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */
1410
1411/* Values for Flags field above */
1412
1413#define ACPI_PMTT_TOP_LEVEL 0x0001
1414#define ACPI_PMTT_PHYSICAL 0x0002
1415#define ACPI_PMTT_MEMORY_TYPE 0x000C
1416
1417/*
1418 * PMTT subtables, correspond to Type in struct acpi_pmtt_header
1419 */
1420
1421/* 0: Socket Structure */
1422
1423struct acpi_pmtt_socket {
1424 struct acpi_pmtt_header header;
1425 u16 socket_id;
1426 u16 reserved;
1427};
1428
1429/* 1: Memory Controller subtable */
1430
1431struct acpi_pmtt_controller {
1432 struct acpi_pmtt_header header;
1433 u32 read_latency;
1434 u32 write_latency;
1435 u32 read_bandwidth;
1436 u32 write_bandwidth;
1437 u16 access_width;
1438 u16 alignment;
1439 u16 reserved;
1440 u16 domain_count;
1441};
1442
1443/* 1a: Proximity Domain substructure */
1444
1445struct acpi_pmtt_domain {
1446 u32 proximity_domain;
1447};
1448
1449/* 2: Physical Component Identifier (DIMM) */
1450
1451struct acpi_pmtt_physical_component {
1452 struct acpi_pmtt_header header;
1453 u16 component_id;
1454 u16 reserved;
1455 u32 memory_size;
1456 u32 bios_handle;
25c0330a
LZ		 1457};
1458
6e2d5ebd
BM		 1459/*******************************************************************************
1460 *
e62f8227 1461 * PPTT - Processor Properties Topology Table (ACPI 6.2)
6e2d5ebd
BM		 1462 * Version 1
1463 *
6e2d5ebd
BM		 1464 ******************************************************************************/
1465
e62f8227 1466struct acpi_table_pptt {
6e2d5ebd 1467 struct acpi_table_header header; /* Common ACPI table header */
e62f8227
ES		 1468};
1469
1470/* Values for Type field above */
1471
1472enum acpi_pptt_type {
1473 ACPI_PPTT_TYPE_PROCESSOR = 0,
1474 ACPI_PPTT_TYPE_CACHE = 1,
1475 ACPI_PPTT_TYPE_ID = 2,
1476 ACPI_PPTT_TYPE_RESERVED = 3
1477};
1478
1479/* 0: Processor Hierarchy Node Structure */
1480
1481struct acpi_pptt_processor {
1482 struct acpi_subtable_header header;
1483 u16 reserved;
6e2d5ebd 1484 u32 flags;
e62f8227
ES		 1485 u32 parent;
1486 u32 acpi_processor_id;
1487 u32 number_of_priv_resources;
6e2d5ebd
BM		 1488};
1489
e62f8227 1490/* Flags */
6e2d5ebd 1491
b5eab512
ES		 1492#define ACPI_PPTT_PHYSICAL_PACKAGE (1)
1493#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
1494#define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
1495#define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
1496#define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
6e2d5ebd 1497
e62f8227 1498/* 1: Cache Type Structure */
b24aad44 1499
e62f8227
ES		 1500struct acpi_pptt_cache {
1501 struct acpi_subtable_header header;
1502 u16 reserved;
1503 u32 flags;
1504 u32 next_level_of_cache;
1505 u32 size;
1506 u32 number_of_sets;
1507 u8 associativity;
1508 u8 attributes;
1509 u16 line_size;
b24aad44
BM		 1510};
1511
e62f8227
ES		 1512/* Flags */
1513
1514#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
1515#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
1516#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
1517#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
1518#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
1519#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
1520#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
1521
1522/* Masks for Attributes */
6e2d5ebd 1523
e62f8227
ES		 1524#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
1525#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
1526#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
6e2d5ebd 1527
e62f8227
ES		 1528/* Attributes describing cache */
1529#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
1530#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
1531#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
1532#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
b24aad44 1533
e62f8227
ES		 1534#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
1535#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
1536#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
1537#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
1538
1539#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
1540#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
1541
1542/* 2: ID Structure */
1543
1544struct acpi_pptt_id {
1545 struct acpi_subtable_header header;
6e2d5ebd 1546 u16 reserved;
e62f8227
ES		 1547 u32 vendor_id;
1548 u64 level1_id;
1549 u64 level2_id;
1550 u16 major_rev;
1551 u16 minor_rev;
1552 u16 spin_rev;
b24aad44
BM		 1553};
1554
9d8b5e7b
BM		 1555/*******************************************************************************
1556 *
e62f8227 1557 * RASF - RAS Feature Table (ACPI 5.0)
9d8b5e7b
BM		 1558 * Version 1
1559 *
9d8b5e7b
BM		 1560 ******************************************************************************/
1561
e62f8227 1562struct acpi_table_rasf {
9d8b5e7b 1563 struct acpi_table_header header; /* Common ACPI table header */
e62f8227
ES		 1564 u8 channel_id[12];
1565};
1566
1567/* RASF Platform Communication Channel Shared Memory Region */
1568
1569struct acpi_rasf_shared_memory {
1570 u32 signature;
1571 u16 command;
9d8b5e7b 1572 u16 status;
e62f8227
ES		 1573 u16 version;
1574 u8 capabilities[16];
1575 u8 set_capabilities[16];
1576 u16 num_parameter_blocks;
1577 u32 set_capabilities_status;
1578};
1579
1580/* RASF Parameter Block Structure Header */
1581
1582struct acpi_rasf_parameter_block {
1583 u16 type;
1584 u16 version;
1585 u16 length;
9d8b5e7b
BM		 1586};
1587
e62f8227 1588/* RASF Parameter Block Structure for PATROL_SCRUB */
9d8b5e7b 1589
e62f8227
ES		 1590struct acpi_rasf_patrol_scrub_parameter {
1591 struct acpi_rasf_parameter_block header;
1592 u16 patrol_scrub_command;
1593 u64 requested_address_range[2];
1594 u64 actual_address_range[2];
1595 u16 flags;
1596 u8 requested_speed;
1597};
1598
1599/* Masks for Flags and Speed fields above */
1600
1601#define ACPI_RASF_SCRUBBER_RUNNING 1
1602#define ACPI_RASF_SPEED (7<<1)
1603#define ACPI_RASF_SPEED_SLOW (0<<1)
1604#define ACPI_RASF_SPEED_MEDIUM (4<<1)
1605#define ACPI_RASF_SPEED_FAST (7<<1)
1606
1607/* Channel Commands */
1608
1609enum acpi_rasf_commands {
1610 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
1611};
1612
1613/* Platform RAS Capabilities */
9d8b5e7b 1614
e62f8227
ES		 1615enum acpi_rasf_capabiliities {
1616 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
1617 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
1618};
1619
1620/* Patrol Scrub Commands */
1621
1622enum acpi_rasf_patrol_scrub_commands {
1623 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
1624 ACPI_RASF_START_PATROL_SCRUBBER = 2,
1625 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
1626};
9d8b5e7b 1627
e62f8227
ES		 1628/* Channel Command flags */
1629
1630#define ACPI_RASF_GENERATE_SCI (1<<15)
1631
1632/* Status values */
1633
1634enum acpi_rasf_status {
1635 ACPI_RASF_SUCCESS = 0,
1636 ACPI_RASF_NOT_VALID = 1,
1637 ACPI_RASF_NOT_SUPPORTED = 2,
1638 ACPI_RASF_BUSY = 3,
1639 ACPI_RASF_FAILED = 4,
1640 ACPI_RASF_ABORTED = 5,
1641 ACPI_RASF_INVALID_DATA = 6
1642};
1643
1644/* Status flags */
1645
1646#define ACPI_RASF_COMMAND_COMPLETE (1)
1647#define ACPI_RASF_SCI_DOORBELL (1<<1)
1648#define ACPI_RASF_ERROR (1<<2)
1649#define ACPI_RASF_STATUS (0x1F<<3)
9d8b5e7b 1650
b24aad44
BM		 1651/*******************************************************************************
1652 *
e62f8227 1653 * SBST - Smart Battery Specification Table
6e2d5ebd
BM		 1654 * Version 1
1655 *
e62f8227
ES		 1656 ******************************************************************************/
1657
1658struct acpi_table_sbst {
1659 struct acpi_table_header header; /* Common ACPI table header */
1660 u32 warning_level;
1661 u32 low_level;
1662 u32 critical_level;
1663};
1664
1665/*******************************************************************************
1666 *
1667 * SDEI - Software Delegated Exception Interface Descriptor Table
1668 *
1669 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
1670 * May 8th, 2017. Copyright 2017 ARM Ltd.
b24aad44
BM		 1671 *
1672 ******************************************************************************/
1673
e62f8227 1674struct acpi_table_sdei {
b24aad44 1675 struct acpi_table_header header; /* Common ACPI table header */
b24aad44
BM		 1676};
1677
e6ab3b77
LZ		 1678/*******************************************************************************
1679 *
e62f8227 1680 * SDEV - Secure Devices Table (ACPI 6.2)
e6ab3b77
LZ		 1681 * Version 1
1682 *
e6ab3b77
LZ		 1683 ******************************************************************************/
1684
e62f8227 1685struct acpi_table_sdev {
e6ab3b77 1686 struct acpi_table_header header; /* Common ACPI table header */
e6ab3b77
LZ		 1687};
1688
e62f8227
ES		 1689struct acpi_sdev_header {
1690 u8 type;
1691 u8 flags;
1692 u16 length;
1693};
1694
1695/* Values for subtable type above */
1696
1697enum acpi_sdev_type {
1698 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
1699 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
1700 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
1701};
e6ab3b77 1702
e62f8227
ES		 1703/* Values for flags above */
1704
1705#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
1706
1707/*
1708 * SDEV subtables
1709 */
1710
1711/* 0: Namespace Device Based Secure Device Structure */
1712
1713struct acpi_sdev_namespace {
1714 struct acpi_sdev_header header;
1715 u16 device_id_offset;
1716 u16 device_id_length;
1717 u16 vendor_data_offset;
1718 u16 vendor_data_length;
1719};
1720
1721/* 1: PCIe Endpoint Device Based Device Structure */
1722
1723struct acpi_sdev_pcie {
1724 struct acpi_sdev_header header;
1725 u16 segment;
1726 u16 start_bus;
1727 u16 path_offset;
1728 u16 path_length;
1729 u16 vendor_data_offset;
1730 u16 vendor_data_length;
1731};
1732
1733/* 1a: PCIe Endpoint path entry */
1734
1735struct acpi_sdev_pcie_path {
1736 u8 device;
1737 u8 function;
1738};
e6ab3b77 1739
6e596084
RM		 1740/* Reset to default packing */
1741
1742#pragma pack()
b24aad44
BM		 1743
1744#endif /* __ACTBL2_H__ */
Linux 6.x block layer and io_uring tree(s)