treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
[linux-block.git] / drivers / xen / swiotlb-xen.c
CommitLineData
b097186f
KRW
1/*
2 * Copyright 2010
3 * by Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
4 *
5 * This code provides a IOMMU for Xen PV guests with PCI passthrough.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License v2.0 as published by
9 * the Free Software Foundation
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * PV guests under Xen are running in an non-contiguous memory architecture.
17 *
18 * When PCI pass-through is utilized, this necessitates an IOMMU for
19 * translating bus (DMA) to virtual and vice-versa and also providing a
20 * mechanism to have contiguous pages for device drivers operations (say DMA
21 * operations).
22 *
23 * Specifically, under Xen the Linux idea of pages is an illusion. It
24 * assumes that pages start at zero and go up to the available memory. To
25 * help with that, the Linux Xen MMU provides a lookup mechanism to
26 * translate the page frame numbers (PFN) to machine frame numbers (MFN)
27 * and vice-versa. The MFN are the "real" frame numbers. Furthermore
28 * memory is not contiguous. Xen hypervisor stitches memory for guests
29 * from different pools, which means there is no guarantee that PFN==MFN
30 * and PFN+1==MFN+1. Lastly with Xen 4.0, pages (in debug mode) are
31 * allocated in descending order (high to low), meaning the guest might
32 * never get any MFN's under the 4GB mark.
33 *
34 */
35
283c0972
JP
36#define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
37
2013288f 38#include <linux/memblock.h>
ea8c64ac 39#include <linux/dma-direct.h>
63c9744b 40#include <linux/export.h>
b097186f
KRW
41#include <xen/swiotlb-xen.h>
42#include <xen/page.h>
43#include <xen/xen-ops.h>
f4b2f07b 44#include <xen/hvc-console.h>
2b2b614d 45
83862ccf 46#include <asm/dma-mapping.h>
1b65c4e5 47#include <asm/xen/page-coherent.h>
e1d8f62a 48
2b2b614d 49#include <trace/events/swiotlb.h>
b097186f
KRW
50/*
51 * Used to do a quick range check in swiotlb_tbl_unmap_single and
52 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
53 * API.
54 */
55
56static char *xen_io_tlb_start, *xen_io_tlb_end;
57static unsigned long xen_io_tlb_nslabs;
58/*
59 * Quick lookup value of the bus address of the IOTLB.
60 */
61
b8b0f559 62static u64 start_dma_addr;
b097186f 63
e17b2f11 64/*
9435cce8 65 * Both of these functions should avoid XEN_PFN_PHYS because phys_addr_t
e17b2f11
IC
66 * can be 32bit when dma_addr_t is 64bit leading to a loss in
67 * information if the shift is done before casting to 64bit.
68 */
6b42a7ea 69static inline dma_addr_t xen_phys_to_bus(phys_addr_t paddr)
b097186f 70{
9435cce8
JG
71 unsigned long bfn = pfn_to_bfn(XEN_PFN_DOWN(paddr));
72 dma_addr_t dma = (dma_addr_t)bfn << XEN_PAGE_SHIFT;
e17b2f11 73
9435cce8 74 dma |= paddr & ~XEN_PAGE_MASK;
e17b2f11
IC
75
76 return dma;
b097186f
KRW
77}
78
6b42a7ea 79static inline phys_addr_t xen_bus_to_phys(dma_addr_t baddr)
b097186f 80{
9435cce8
JG
81 unsigned long xen_pfn = bfn_to_pfn(XEN_PFN_DOWN(baddr));
82 dma_addr_t dma = (dma_addr_t)xen_pfn << XEN_PAGE_SHIFT;
e17b2f11
IC
83 phys_addr_t paddr = dma;
84
9435cce8 85 paddr |= baddr & ~XEN_PAGE_MASK;
e17b2f11
IC
86
87 return paddr;
b097186f
KRW
88}
89
6b42a7ea 90static inline dma_addr_t xen_virt_to_bus(void *address)
b097186f
KRW
91{
92 return xen_phys_to_bus(virt_to_phys(address));
93}
94
9435cce8 95static int check_pages_physically_contiguous(unsigned long xen_pfn,
b097186f
KRW
96 unsigned int offset,
97 size_t length)
98{
32e09870 99 unsigned long next_bfn;
b097186f
KRW
100 int i;
101 int nr_pages;
102
9435cce8
JG
103 next_bfn = pfn_to_bfn(xen_pfn);
104 nr_pages = (offset + length + XEN_PAGE_SIZE-1) >> XEN_PAGE_SHIFT;
b097186f
KRW
105
106 for (i = 1; i < nr_pages; i++) {
9435cce8 107 if (pfn_to_bfn(++xen_pfn) != ++next_bfn)
b097186f
KRW
108 return 0;
109 }
110 return 1;
111}
112
6b42a7ea 113static inline int range_straddles_page_boundary(phys_addr_t p, size_t size)
b097186f 114{
9435cce8
JG
115 unsigned long xen_pfn = XEN_PFN_DOWN(p);
116 unsigned int offset = p & ~XEN_PAGE_MASK;
b097186f 117
9435cce8 118 if (offset + size <= XEN_PAGE_SIZE)
b097186f 119 return 0;
9435cce8 120 if (check_pages_physically_contiguous(xen_pfn, offset, size))
b097186f
KRW
121 return 0;
122 return 1;
123}
124
125static int is_xen_swiotlb_buffer(dma_addr_t dma_addr)
126{
9435cce8
JG
127 unsigned long bfn = XEN_PFN_DOWN(dma_addr);
128 unsigned long xen_pfn = bfn_to_local_pfn(bfn);
129 phys_addr_t paddr = XEN_PFN_PHYS(xen_pfn);
b097186f
KRW
130
131 /* If the address is outside our domain, it CAN
132 * have the same virtual address as another address
133 * in our domain. Therefore _only_ check address within our domain.
134 */
9435cce8 135 if (pfn_valid(PFN_DOWN(paddr))) {
b097186f
KRW
136 return paddr >= virt_to_phys(xen_io_tlb_start) &&
137 paddr < virt_to_phys(xen_io_tlb_end);
138 }
139 return 0;
140}
141
142static int max_dma_bits = 32;
143
144static int
145xen_swiotlb_fixup(void *buf, size_t size, unsigned long nslabs)
146{
147 int i, rc;
148 int dma_bits;
69908907 149 dma_addr_t dma_handle;
1b65c4e5 150 phys_addr_t p = virt_to_phys(buf);
b097186f
KRW
151
152 dma_bits = get_order(IO_TLB_SEGSIZE << IO_TLB_SHIFT) + PAGE_SHIFT;
153
154 i = 0;
155 do {
156 int slabs = min(nslabs - i, (unsigned long)IO_TLB_SEGSIZE);
157
158 do {
159 rc = xen_create_contiguous_region(
1b65c4e5 160 p + (i << IO_TLB_SHIFT),
b097186f 161 get_order(slabs << IO_TLB_SHIFT),
69908907 162 dma_bits, &dma_handle);
b097186f
KRW
163 } while (rc && dma_bits++ < max_dma_bits);
164 if (rc)
165 return rc;
166
167 i += slabs;
168 } while (i < nslabs);
169 return 0;
170}
1cef36a5
KRW
171static unsigned long xen_set_nslabs(unsigned long nr_tbl)
172{
173 if (!nr_tbl) {
174 xen_io_tlb_nslabs = (64 * 1024 * 1024 >> IO_TLB_SHIFT);
175 xen_io_tlb_nslabs = ALIGN(xen_io_tlb_nslabs, IO_TLB_SEGSIZE);
176 } else
177 xen_io_tlb_nslabs = nr_tbl;
b097186f 178
1cef36a5
KRW
179 return xen_io_tlb_nslabs << IO_TLB_SHIFT;
180}
b097186f 181
5bab7864
KRW
182enum xen_swiotlb_err {
183 XEN_SWIOTLB_UNKNOWN = 0,
184 XEN_SWIOTLB_ENOMEM,
185 XEN_SWIOTLB_EFIXUP
186};
187
188static const char *xen_swiotlb_error(enum xen_swiotlb_err err)
189{
190 switch (err) {
191 case XEN_SWIOTLB_ENOMEM:
192 return "Cannot allocate Xen-SWIOTLB buffer\n";
193 case XEN_SWIOTLB_EFIXUP:
194 return "Failed to get contiguous memory for DMA from Xen!\n"\
195 "You either: don't have the permissions, do not have"\
196 " enough free memory under 4GB, or the hypervisor memory"\
197 " is too fragmented!";
198 default:
199 break;
200 }
201 return "";
202}
b8277600 203int __ref xen_swiotlb_init(int verbose, bool early)
b097186f 204{
b8277600 205 unsigned long bytes, order;
f4b2f07b 206 int rc = -ENOMEM;
5bab7864 207 enum xen_swiotlb_err m_ret = XEN_SWIOTLB_UNKNOWN;
f4b2f07b 208 unsigned int repeat = 3;
5f98ecdb 209
1cef36a5 210 xen_io_tlb_nslabs = swiotlb_nr_tbl();
f4b2f07b 211retry:
1cef36a5 212 bytes = xen_set_nslabs(xen_io_tlb_nslabs);
b8277600 213 order = get_order(xen_io_tlb_nslabs << IO_TLB_SHIFT);
b097186f
KRW
214 /*
215 * Get IO TLB memory from any location.
216 */
8a7f97b9 217 if (early) {
15c3c114
MR
218 xen_io_tlb_start = memblock_alloc(PAGE_ALIGN(bytes),
219 PAGE_SIZE);
8a7f97b9
MR
220 if (!xen_io_tlb_start)
221 panic("%s: Failed to allocate %lu bytes align=0x%lx\n",
222 __func__, PAGE_ALIGN(bytes), PAGE_SIZE);
223 } else {
b8277600
KRW
224#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
225#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
226 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
8746515d 227 xen_io_tlb_start = (void *)xen_get_swiotlb_free_pages(order);
b8277600
KRW
228 if (xen_io_tlb_start)
229 break;
230 order--;
231 }
232 if (order != get_order(bytes)) {
283c0972
JP
233 pr_warn("Warning: only able to allocate %ld MB for software IO TLB\n",
234 (PAGE_SIZE << order) >> 20);
b8277600
KRW
235 xen_io_tlb_nslabs = SLABS_PER_PAGE << order;
236 bytes = xen_io_tlb_nslabs << IO_TLB_SHIFT;
237 }
238 }
f4b2f07b 239 if (!xen_io_tlb_start) {
5bab7864 240 m_ret = XEN_SWIOTLB_ENOMEM;
f4b2f07b
KRW
241 goto error;
242 }
b097186f
KRW
243 xen_io_tlb_end = xen_io_tlb_start + bytes;
244 /*
245 * And replace that memory with pages under 4GB.
246 */
247 rc = xen_swiotlb_fixup(xen_io_tlb_start,
248 bytes,
249 xen_io_tlb_nslabs);
f4b2f07b 250 if (rc) {
b8277600 251 if (early)
2013288f
MR
252 memblock_free(__pa(xen_io_tlb_start),
253 PAGE_ALIGN(bytes));
b8277600
KRW
254 else {
255 free_pages((unsigned long)xen_io_tlb_start, order);
256 xen_io_tlb_start = NULL;
257 }
5bab7864 258 m_ret = XEN_SWIOTLB_EFIXUP;
b097186f 259 goto error;
f4b2f07b 260 }
b097186f 261 start_dma_addr = xen_virt_to_bus(xen_io_tlb_start);
c468bdee 262 if (early) {
ac2cbab2
YL
263 if (swiotlb_init_with_tbl(xen_io_tlb_start, xen_io_tlb_nslabs,
264 verbose))
265 panic("Cannot allocate SWIOTLB buffer");
c468bdee
KRW
266 rc = 0;
267 } else
b8277600 268 rc = swiotlb_late_init_with_tbl(xen_io_tlb_start, xen_io_tlb_nslabs);
7453c549
KRW
269
270 if (!rc)
271 swiotlb_set_max_segment(PAGE_SIZE);
272
b8277600 273 return rc;
b097186f 274error:
f4b2f07b
KRW
275 if (repeat--) {
276 xen_io_tlb_nslabs = max(1024UL, /* Min is 2MB */
277 (xen_io_tlb_nslabs >> 1));
283c0972
JP
278 pr_info("Lowering to %luMB\n",
279 (xen_io_tlb_nslabs << IO_TLB_SHIFT) >> 20);
f4b2f07b
KRW
280 goto retry;
281 }
283c0972 282 pr_err("%s (rc:%d)\n", xen_swiotlb_error(m_ret), rc);
b8277600
KRW
283 if (early)
284 panic("%s (rc:%d)", xen_swiotlb_error(m_ret), rc);
285 else
286 free_pages((unsigned long)xen_io_tlb_start, order);
287 return rc;
b097186f 288}
dceb1a68
CH
289
290static void *
b097186f 291xen_swiotlb_alloc_coherent(struct device *hwdev, size_t size,
baa676fc 292 dma_addr_t *dma_handle, gfp_t flags,
00085f1e 293 unsigned long attrs)
b097186f
KRW
294{
295 void *ret;
296 int order = get_order(size);
297 u64 dma_mask = DMA_BIT_MASK(32);
6810df88
KRW
298 phys_addr_t phys;
299 dma_addr_t dev_addr;
b097186f
KRW
300
301 /*
302 * Ignore region specifiers - the kernel's ideas of
303 * pseudo-phys memory layout has nothing to do with the
304 * machine physical layout. We can't allocate highmem
305 * because we can't return a pointer to it.
306 */
307 flags &= ~(__GFP_DMA | __GFP_HIGHMEM);
308
7250f422
JJ
309 /* Convert the size to actually allocated. */
310 size = 1UL << (order + XEN_PAGE_SHIFT);
311
1b65c4e5
SS
312 /* On ARM this function returns an ioremap'ped virtual address for
313 * which virt_to_phys doesn't return the corresponding physical
314 * address. In fact on ARM virt_to_phys only works for kernel direct
315 * mapped RAM memory. Also see comment below.
316 */
317 ret = xen_alloc_coherent_pages(hwdev, size, dma_handle, flags, attrs);
b097186f 318
6810df88
KRW
319 if (!ret)
320 return ret;
321
b097186f 322 if (hwdev && hwdev->coherent_dma_mask)
038d07a2 323 dma_mask = hwdev->coherent_dma_mask;
b097186f 324
1b65c4e5
SS
325 /* At this point dma_handle is the physical address, next we are
326 * going to set it to the machine address.
327 * Do not use virt_to_phys(ret) because on ARM it doesn't correspond
328 * to *dma_handle. */
329 phys = *dma_handle;
6810df88
KRW
330 dev_addr = xen_phys_to_bus(phys);
331 if (((dev_addr + size - 1 <= dma_mask)) &&
332 !range_straddles_page_boundary(phys, size))
333 *dma_handle = dev_addr;
334 else {
1b65c4e5 335 if (xen_create_contiguous_region(phys, order,
69908907 336 fls64(dma_mask), dma_handle) != 0) {
1b65c4e5 337 xen_free_coherent_pages(hwdev, size, ret, (dma_addr_t)phys, attrs);
b097186f
KRW
338 return NULL;
339 }
b097186f 340 }
6810df88 341 memset(ret, 0, size);
b097186f
KRW
342 return ret;
343}
b097186f 344
dceb1a68 345static void
b097186f 346xen_swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
00085f1e 347 dma_addr_t dev_addr, unsigned long attrs)
b097186f
KRW
348{
349 int order = get_order(size);
6810df88
KRW
350 phys_addr_t phys;
351 u64 dma_mask = DMA_BIT_MASK(32);
b097186f 352
6810df88
KRW
353 if (hwdev && hwdev->coherent_dma_mask)
354 dma_mask = hwdev->coherent_dma_mask;
355
1b65c4e5
SS
356 /* do not use virt_to_phys because on ARM it doesn't return you the
357 * physical address */
358 phys = xen_bus_to_phys(dev_addr);
6810df88 359
7250f422
JJ
360 /* Convert the size to actually allocated. */
361 size = 1UL << (order + XEN_PAGE_SHIFT);
362
4855c92d 363 if (((dev_addr + size - 1 <= dma_mask)) ||
6810df88 364 range_straddles_page_boundary(phys, size))
1b65c4e5 365 xen_destroy_contiguous_region(phys, order);
6810df88 366
1b65c4e5 367 xen_free_coherent_pages(hwdev, size, vaddr, (dma_addr_t)phys, attrs);
b097186f 368}
b097186f
KRW
369
370/*
371 * Map a single buffer of the indicated size for DMA in streaming mode. The
372 * physical address to use is returned.
373 *
374 * Once the device is given the dma address, the device owns this memory until
375 * either xen_swiotlb_unmap_page or xen_swiotlb_dma_sync_single is performed.
376 */
dceb1a68 377static dma_addr_t xen_swiotlb_map_page(struct device *dev, struct page *page,
b097186f
KRW
378 unsigned long offset, size_t size,
379 enum dma_data_direction dir,
00085f1e 380 unsigned long attrs)
b097186f 381{
e05ed4d1 382 phys_addr_t map, phys = page_to_phys(page) + offset;
b097186f 383 dma_addr_t dev_addr = xen_phys_to_bus(phys);
b097186f
KRW
384
385 BUG_ON(dir == DMA_NONE);
386 /*
387 * If the address happens to be in the device's DMA window,
388 * we can safely return the device addr and not worry about bounce
389 * buffering it.
390 */
391 if (dma_capable(dev, dev_addr, size) &&
a4dba130 392 !range_straddles_page_boundary(phys, size) &&
291be10f 393 !xen_arch_need_swiotlb(dev, phys, dev_addr) &&
063b8271
CH
394 swiotlb_force != SWIOTLB_FORCE)
395 goto done;
b097186f
KRW
396
397 /*
398 * Oh well, have to allocate and map a bounce buffer.
399 */
2b2b614d
ZK
400 trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force);
401
0443fa00
AD
402 map = swiotlb_tbl_map_single(dev, start_dma_addr, phys, size, dir,
403 attrs);
b907e205 404 if (map == DMA_MAPPING_ERROR)
a4abe0ad 405 return DMA_MAPPING_ERROR;
b097186f 406
f1225ee4 407 dev_addr = xen_phys_to_bus(map);
b097186f
KRW
408
409 /*
410 * Ensure that the address returned is DMA'ble
411 */
063b8271
CH
412 if (unlikely(!dma_capable(dev, dev_addr, size))) {
413 swiotlb_tbl_unmap_single(dev, map, size, dir,
414 attrs | DMA_ATTR_SKIP_CPU_SYNC);
415 return DMA_MAPPING_ERROR;
416 }
76418421 417
063b8271
CH
418 page = pfn_to_page(map >> PAGE_SHIFT);
419 offset = map & ~PAGE_MASK;
420done:
421 /*
422 * we are not interested in the dma_addr returned by xen_dma_map_page,
423 * only in the potential cache flushes executed by the function.
424 */
425 xen_dma_map_page(dev, page, dev_addr, offset, size, dir, attrs);
426 return dev_addr;
b097186f 427}
b097186f
KRW
428
429/*
430 * Unmap a single streaming mode DMA translation. The dma_addr and size must
431 * match what was provided for in a previous xen_swiotlb_map_page call. All
432 * other usages are undefined.
433 *
434 * After this call, reads by the cpu to the buffer are guaranteed to see
435 * whatever the device wrote there.
436 */
437static void xen_unmap_single(struct device *hwdev, dma_addr_t dev_addr,
6cf05463 438 size_t size, enum dma_data_direction dir,
00085f1e 439 unsigned long attrs)
b097186f
KRW
440{
441 phys_addr_t paddr = xen_bus_to_phys(dev_addr);
442
443 BUG_ON(dir == DMA_NONE);
444
d6883e6f 445 xen_dma_unmap_page(hwdev, dev_addr, size, dir, attrs);
6cf05463 446
b097186f 447 /* NOTE: We use dev_addr here, not paddr! */
68c60834 448 if (is_xen_swiotlb_buffer(dev_addr))
0443fa00 449 swiotlb_tbl_unmap_single(hwdev, paddr, size, dir, attrs);
b097186f
KRW
450}
451
dceb1a68 452static void xen_swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
b097186f 453 size_t size, enum dma_data_direction dir,
00085f1e 454 unsigned long attrs)
b097186f 455{
6cf05463 456 xen_unmap_single(hwdev, dev_addr, size, dir, attrs);
b097186f 457}
b097186f 458
b097186f 459static void
2e12dcee
CH
460xen_swiotlb_sync_single_for_cpu(struct device *dev, dma_addr_t dma_addr,
461 size_t size, enum dma_data_direction dir)
b097186f 462{
2e12dcee 463 phys_addr_t paddr = xen_bus_to_phys(dma_addr);
6cf05463 464
2e12dcee 465 xen_dma_sync_single_for_cpu(dev, dma_addr, size, dir);
6cf05463 466
2e12dcee
CH
467 if (is_xen_swiotlb_buffer(dma_addr))
468 swiotlb_tbl_sync_single(dev, paddr, size, dir, SYNC_FOR_CPU);
b097186f
KRW
469}
470
2e12dcee
CH
471static void
472xen_swiotlb_sync_single_for_device(struct device *dev, dma_addr_t dma_addr,
473 size_t size, enum dma_data_direction dir)
b097186f 474{
2e12dcee 475 phys_addr_t paddr = xen_bus_to_phys(dma_addr);
b097186f 476
2e12dcee
CH
477 if (is_xen_swiotlb_buffer(dma_addr))
478 swiotlb_tbl_sync_single(dev, paddr, size, dir, SYNC_FOR_DEVICE);
479
480 xen_dma_sync_single_for_device(dev, dma_addr, size, dir);
b097186f 481}
dceb1a68
CH
482
483/*
484 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
485 * concerning calls here are the same as for swiotlb_unmap_page() above.
486 */
487static void
aca351cc
CH
488xen_swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
489 enum dma_data_direction dir, unsigned long attrs)
dceb1a68
CH
490{
491 struct scatterlist *sg;
492 int i;
493
494 BUG_ON(dir == DMA_NONE);
495
496 for_each_sg(sgl, sg, nelems, i)
497 xen_unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir, attrs);
498
499}
b097186f 500
dceb1a68 501static int
8b35d9fe 502xen_swiotlb_map_sg(struct device *dev, struct scatterlist *sgl, int nelems,
aca351cc 503 enum dma_data_direction dir, unsigned long attrs)
b097186f
KRW
504{
505 struct scatterlist *sg;
506 int i;
507
508 BUG_ON(dir == DMA_NONE);
509
510 for_each_sg(sgl, sg, nelems, i) {
8b35d9fe
CH
511 sg->dma_address = xen_swiotlb_map_page(dev, sg_page(sg),
512 sg->offset, sg->length, dir, attrs);
513 if (sg->dma_address == DMA_MAPPING_ERROR)
514 goto out_unmap;
781575cd 515 sg_dma_len(sg) = sg->length;
b097186f 516 }
8b35d9fe 517
b097186f 518 return nelems;
8b35d9fe
CH
519out_unmap:
520 xen_swiotlb_unmap_sg(dev, sgl, i, dir, attrs | DMA_ATTR_SKIP_CPU_SYNC);
521 sg_dma_len(sgl) = 0;
522 return 0;
b097186f 523}
b097186f 524
b097186f 525static void
2e12dcee
CH
526xen_swiotlb_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl,
527 int nelems, enum dma_data_direction dir)
b097186f
KRW
528{
529 struct scatterlist *sg;
530 int i;
531
2e12dcee
CH
532 for_each_sg(sgl, sg, nelems, i) {
533 xen_swiotlb_sync_single_for_cpu(dev, sg->dma_address,
534 sg->length, dir);
535 }
b097186f 536}
b097186f 537
dceb1a68 538static void
2e12dcee 539xen_swiotlb_sync_sg_for_device(struct device *dev, struct scatterlist *sgl,
b097186f
KRW
540 int nelems, enum dma_data_direction dir)
541{
2e12dcee
CH
542 struct scatterlist *sg;
543 int i;
544
545 for_each_sg(sgl, sg, nelems, i) {
546 xen_swiotlb_sync_single_for_device(dev, sg->dma_address,
547 sg->length, dir);
548 }
b097186f 549}
b097186f 550
b097186f
KRW
551/*
552 * Return whether the given device DMA address mask can be supported
553 * properly. For example, if your device can only drive the low 24-bits
554 * during bus mastering, then you would pass 0x00ffffff as the mask to
555 * this function.
556 */
dceb1a68 557static int
b097186f
KRW
558xen_swiotlb_dma_supported(struct device *hwdev, u64 mask)
559{
560 return xen_virt_to_bus(xen_io_tlb_end - 1) <= mask;
561}
eb1ddc00 562
7e91c7df
SS
563/*
564 * Create userspace mapping for the DMA-coherent memory.
565 * This function should be called with the pages from the current domain only,
566 * passing pages mapped from other domains would lead to memory corruption.
567 */
dceb1a68 568static int
7e91c7df
SS
569xen_swiotlb_dma_mmap(struct device *dev, struct vm_area_struct *vma,
570 void *cpu_addr, dma_addr_t dma_addr, size_t size,
571 unsigned long attrs)
572{
60d8cd57 573#ifdef CONFIG_ARM
d5ff5061
SS
574 if (xen_get_dma_ops(dev)->mmap)
575 return xen_get_dma_ops(dev)->mmap(dev, vma, cpu_addr,
7e91c7df
SS
576 dma_addr, size, attrs);
577#endif
58b04406 578 return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
7e91c7df 579}
69369f52
AA
580
581/*
582 * This function should be called with the pages from the current domain only,
583 * passing pages mapped from other domains would lead to memory corruption.
584 */
dceb1a68 585static int
69369f52
AA
586xen_swiotlb_get_sgtable(struct device *dev, struct sg_table *sgt,
587 void *cpu_addr, dma_addr_t handle, size_t size,
588 unsigned long attrs)
589{
60d8cd57 590#ifdef CONFIG_ARM
d5ff5061 591 if (xen_get_dma_ops(dev)->get_sgtable) {
69369f52
AA
592#if 0
593 /*
594 * This check verifies that the page belongs to the current domain and
595 * is not one mapped from another domain.
596 * This check is for debug only, and should not go to production build
597 */
598 unsigned long bfn = PHYS_PFN(dma_to_phys(dev, handle));
599 BUG_ON (!page_is_ram(bfn));
600#endif
d5ff5061 601 return xen_get_dma_ops(dev)->get_sgtable(dev, sgt, cpu_addr,
69369f52
AA
602 handle, size, attrs);
603 }
604#endif
9406a49f 605 return dma_common_get_sgtable(dev, sgt, cpu_addr, handle, size, attrs);
69369f52 606}
dceb1a68
CH
607
608const struct dma_map_ops xen_swiotlb_dma_ops = {
609 .alloc = xen_swiotlb_alloc_coherent,
610 .free = xen_swiotlb_free_coherent,
611 .sync_single_for_cpu = xen_swiotlb_sync_single_for_cpu,
612 .sync_single_for_device = xen_swiotlb_sync_single_for_device,
613 .sync_sg_for_cpu = xen_swiotlb_sync_sg_for_cpu,
614 .sync_sg_for_device = xen_swiotlb_sync_sg_for_device,
aca351cc
CH
615 .map_sg = xen_swiotlb_map_sg,
616 .unmap_sg = xen_swiotlb_unmap_sg,
dceb1a68
CH
617 .map_page = xen_swiotlb_map_page,
618 .unmap_page = xen_swiotlb_unmap_page,
619 .dma_supported = xen_swiotlb_dma_supported,
dceb1a68
CH
620 .mmap = xen_swiotlb_dma_mmap,
621 .get_sgtable = xen_swiotlb_get_sgtable,
622};