Commit | Line | Data |
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d9523678 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
b097186f KRW |
2 | /* |
3 | * Copyright 2010 | |
4 | * by Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
5 | * | |
6 | * This code provides a IOMMU for Xen PV guests with PCI passthrough. | |
7 | * | |
b097186f KRW |
8 | * PV guests under Xen are running in an non-contiguous memory architecture. |
9 | * | |
10 | * When PCI pass-through is utilized, this necessitates an IOMMU for | |
11 | * translating bus (DMA) to virtual and vice-versa and also providing a | |
12 | * mechanism to have contiguous pages for device drivers operations (say DMA | |
13 | * operations). | |
14 | * | |
15 | * Specifically, under Xen the Linux idea of pages is an illusion. It | |
16 | * assumes that pages start at zero and go up to the available memory. To | |
17 | * help with that, the Linux Xen MMU provides a lookup mechanism to | |
18 | * translate the page frame numbers (PFN) to machine frame numbers (MFN) | |
19 | * and vice-versa. The MFN are the "real" frame numbers. Furthermore | |
20 | * memory is not contiguous. Xen hypervisor stitches memory for guests | |
21 | * from different pools, which means there is no guarantee that PFN==MFN | |
22 | * and PFN+1==MFN+1. Lastly with Xen 4.0, pages (in debug mode) are | |
23 | * allocated in descending order (high to low), meaning the guest might | |
24 | * never get any MFN's under the 4GB mark. | |
b097186f KRW |
25 | */ |
26 | ||
283c0972 JP |
27 | #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt |
28 | ||
2013288f | 29 | #include <linux/memblock.h> |
ea8c64ac | 30 | #include <linux/dma-direct.h> |
9f4df96b | 31 | #include <linux/dma-map-ops.h> |
63c9744b | 32 | #include <linux/export.h> |
b097186f KRW |
33 | #include <xen/swiotlb-xen.h> |
34 | #include <xen/page.h> | |
35 | #include <xen/xen-ops.h> | |
f4b2f07b | 36 | #include <xen/hvc-console.h> |
2b2b614d | 37 | |
83862ccf | 38 | #include <asm/dma-mapping.h> |
1b65c4e5 | 39 | #include <asm/xen/page-coherent.h> |
e1d8f62a | 40 | |
2b2b614d | 41 | #include <trace/events/swiotlb.h> |
e6fa0dc8 | 42 | #define MAX_DMA_BITS 32 |
b097186f | 43 | |
b097186f KRW |
44 | /* |
45 | * Quick lookup value of the bus address of the IOTLB. | |
46 | */ | |
47 | ||
91ffe4ad | 48 | static inline phys_addr_t xen_phys_to_bus(struct device *dev, phys_addr_t paddr) |
b097186f | 49 | { |
9435cce8 | 50 | unsigned long bfn = pfn_to_bfn(XEN_PFN_DOWN(paddr)); |
91ffe4ad | 51 | phys_addr_t baddr = (phys_addr_t)bfn << XEN_PAGE_SHIFT; |
e17b2f11 | 52 | |
91ffe4ad SS |
53 | baddr |= paddr & ~XEN_PAGE_MASK; |
54 | return baddr; | |
55 | } | |
e17b2f11 | 56 | |
91ffe4ad SS |
57 | static inline dma_addr_t xen_phys_to_dma(struct device *dev, phys_addr_t paddr) |
58 | { | |
59 | return phys_to_dma(dev, xen_phys_to_bus(dev, paddr)); | |
b097186f KRW |
60 | } |
61 | ||
91ffe4ad SS |
62 | static inline phys_addr_t xen_bus_to_phys(struct device *dev, |
63 | phys_addr_t baddr) | |
b097186f | 64 | { |
9435cce8 | 65 | unsigned long xen_pfn = bfn_to_pfn(XEN_PFN_DOWN(baddr)); |
91ffe4ad SS |
66 | phys_addr_t paddr = (xen_pfn << XEN_PAGE_SHIFT) | |
67 | (baddr & ~XEN_PAGE_MASK); | |
e17b2f11 IC |
68 | |
69 | return paddr; | |
b097186f KRW |
70 | } |
71 | ||
91ffe4ad SS |
72 | static inline phys_addr_t xen_dma_to_phys(struct device *dev, |
73 | dma_addr_t dma_addr) | |
74 | { | |
75 | return xen_bus_to_phys(dev, dma_to_phys(dev, dma_addr)); | |
76 | } | |
77 | ||
bf707266 | 78 | static inline int range_straddles_page_boundary(phys_addr_t p, size_t size) |
b097186f | 79 | { |
bf707266 JG |
80 | unsigned long next_bfn, xen_pfn = XEN_PFN_DOWN(p); |
81 | unsigned int i, nr_pages = XEN_PFN_UP(xen_offset_in_page(p) + size); | |
b097186f | 82 | |
9435cce8 | 83 | next_bfn = pfn_to_bfn(xen_pfn); |
b097186f | 84 | |
bf707266 | 85 | for (i = 1; i < nr_pages; i++) |
9435cce8 | 86 | if (pfn_to_bfn(++xen_pfn) != ++next_bfn) |
bf707266 | 87 | return 1; |
b097186f | 88 | |
bf707266 | 89 | return 0; |
b097186f KRW |
90 | } |
91 | ||
38ba51de | 92 | static int is_xen_swiotlb_buffer(struct device *dev, dma_addr_t dma_addr) |
b097186f | 93 | { |
91ffe4ad | 94 | unsigned long bfn = XEN_PFN_DOWN(dma_to_phys(dev, dma_addr)); |
9435cce8 | 95 | unsigned long xen_pfn = bfn_to_local_pfn(bfn); |
e9aab7e4 | 96 | phys_addr_t paddr = (phys_addr_t)xen_pfn << XEN_PAGE_SHIFT; |
b097186f KRW |
97 | |
98 | /* If the address is outside our domain, it CAN | |
99 | * have the same virtual address as another address | |
100 | * in our domain. Therefore _only_ check address within our domain. | |
101 | */ | |
16bc75f3 CH |
102 | if (pfn_valid(PFN_DOWN(paddr))) |
103 | return is_swiotlb_buffer(paddr); | |
b097186f KRW |
104 | return 0; |
105 | } | |
106 | ||
6bcd4ea7 | 107 | static int xen_swiotlb_fixup(void *buf, unsigned long nslabs) |
b097186f KRW |
108 | { |
109 | int i, rc; | |
110 | int dma_bits; | |
69908907 | 111 | dma_addr_t dma_handle; |
1b65c4e5 | 112 | phys_addr_t p = virt_to_phys(buf); |
b097186f KRW |
113 | |
114 | dma_bits = get_order(IO_TLB_SEGSIZE << IO_TLB_SHIFT) + PAGE_SHIFT; | |
115 | ||
116 | i = 0; | |
117 | do { | |
118 | int slabs = min(nslabs - i, (unsigned long)IO_TLB_SEGSIZE); | |
119 | ||
120 | do { | |
121 | rc = xen_create_contiguous_region( | |
1b65c4e5 | 122 | p + (i << IO_TLB_SHIFT), |
b097186f | 123 | get_order(slabs << IO_TLB_SHIFT), |
69908907 | 124 | dma_bits, &dma_handle); |
e6fa0dc8 | 125 | } while (rc && dma_bits++ < MAX_DMA_BITS); |
b097186f KRW |
126 | if (rc) |
127 | return rc; | |
128 | ||
129 | i += slabs; | |
130 | } while (i < nslabs); | |
131 | return 0; | |
132 | } | |
133 | ||
5bab7864 KRW |
134 | enum xen_swiotlb_err { |
135 | XEN_SWIOTLB_UNKNOWN = 0, | |
136 | XEN_SWIOTLB_ENOMEM, | |
137 | XEN_SWIOTLB_EFIXUP | |
138 | }; | |
139 | ||
140 | static const char *xen_swiotlb_error(enum xen_swiotlb_err err) | |
141 | { | |
142 | switch (err) { | |
143 | case XEN_SWIOTLB_ENOMEM: | |
144 | return "Cannot allocate Xen-SWIOTLB buffer\n"; | |
145 | case XEN_SWIOTLB_EFIXUP: | |
146 | return "Failed to get contiguous memory for DMA from Xen!\n"\ | |
147 | "You either: don't have the permissions, do not have"\ | |
148 | " enough free memory under 4GB, or the hypervisor memory"\ | |
149 | " is too fragmented!"; | |
150 | default: | |
151 | break; | |
152 | } | |
153 | return ""; | |
154 | } | |
4035b43d CH |
155 | |
156 | #define DEFAULT_NSLABS ALIGN(SZ_64M >> IO_TLB_SHIFT, IO_TLB_SEGSIZE) | |
157 | ||
a98f5654 | 158 | int __ref xen_swiotlb_init(void) |
b097186f | 159 | { |
5bab7864 | 160 | enum xen_swiotlb_err m_ret = XEN_SWIOTLB_UNKNOWN; |
2d29960a CH |
161 | unsigned long bytes = swiotlb_size_or_default(); |
162 | unsigned long nslabs = bytes >> IO_TLB_SHIFT; | |
163 | unsigned int order, repeat = 3; | |
a98f5654 | 164 | int rc = -ENOMEM; |
cbce9952 | 165 | char *start; |
5f98ecdb | 166 | |
97729b65 SS |
167 | if (io_tlb_default_mem != NULL) { |
168 | pr_warn("swiotlb buffer already initialized\n"); | |
169 | return -EEXIST; | |
170 | } | |
171 | ||
a98f5654 CH |
172 | retry: |
173 | m_ret = XEN_SWIOTLB_ENOMEM; | |
4035b43d | 174 | order = get_order(bytes); |
4e7372e0 | 175 | |
b097186f KRW |
176 | /* |
177 | * Get IO TLB memory from any location. | |
178 | */ | |
b8277600 KRW |
179 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) |
180 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
a98f5654 CH |
181 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { |
182 | start = (void *)xen_get_swiotlb_free_pages(order); | |
183 | if (start) | |
184 | break; | |
185 | order--; | |
b8277600 | 186 | } |
a98f5654 | 187 | if (!start) |
f4b2f07b | 188 | goto error; |
a98f5654 CH |
189 | if (order != get_order(bytes)) { |
190 | pr_warn("Warning: only able to allocate %ld MB for software IO TLB\n", | |
191 | (PAGE_SIZE << order) >> 20); | |
192 | nslabs = SLABS_PER_PAGE << order; | |
193 | bytes = nslabs << IO_TLB_SHIFT; | |
f4b2f07b | 194 | } |
a98f5654 | 195 | |
b097186f KRW |
196 | /* |
197 | * And replace that memory with pages under 4GB. | |
198 | */ | |
6bcd4ea7 | 199 | rc = xen_swiotlb_fixup(start, nslabs); |
f4b2f07b | 200 | if (rc) { |
a98f5654 | 201 | free_pages((unsigned long)start, order); |
5bab7864 | 202 | m_ret = XEN_SWIOTLB_EFIXUP; |
b097186f | 203 | goto error; |
f4b2f07b | 204 | } |
a98f5654 CH |
205 | rc = swiotlb_late_init_with_tbl(start, nslabs); |
206 | if (rc) | |
207 | return rc; | |
208 | swiotlb_set_max_segment(PAGE_SIZE); | |
209 | return 0; | |
b097186f | 210 | error: |
f4b2f07b | 211 | if (repeat--) { |
a98f5654 CH |
212 | /* Min is 2MB */ |
213 | nslabs = max(1024UL, (nslabs >> 1)); | |
4c092c59 JB |
214 | bytes = nslabs << IO_TLB_SHIFT; |
215 | pr_info("Lowering to %luMB\n", bytes >> 20); | |
f4b2f07b KRW |
216 | goto retry; |
217 | } | |
283c0972 | 218 | pr_err("%s (rc:%d)\n", xen_swiotlb_error(m_ret), rc); |
b8277600 | 219 | return rc; |
b097186f | 220 | } |
dceb1a68 | 221 | |
a98f5654 CH |
222 | #ifdef CONFIG_X86 |
223 | void __init xen_swiotlb_init_early(void) | |
224 | { | |
2d29960a CH |
225 | unsigned long bytes = swiotlb_size_or_default(); |
226 | unsigned long nslabs = bytes >> IO_TLB_SHIFT; | |
a98f5654 CH |
227 | unsigned int repeat = 3; |
228 | char *start; | |
229 | int rc; | |
230 | ||
a98f5654 CH |
231 | retry: |
232 | /* | |
233 | * Get IO TLB memory from any location. | |
234 | */ | |
a98f5654 CH |
235 | start = memblock_alloc(PAGE_ALIGN(bytes), PAGE_SIZE); |
236 | if (!start) | |
237 | panic("%s: Failed to allocate %lu bytes align=0x%lx\n", | |
238 | __func__, PAGE_ALIGN(bytes), PAGE_SIZE); | |
239 | ||
240 | /* | |
241 | * And replace that memory with pages under 4GB. | |
242 | */ | |
6bcd4ea7 | 243 | rc = xen_swiotlb_fixup(start, nslabs); |
a98f5654 CH |
244 | if (rc) { |
245 | memblock_free(__pa(start), PAGE_ALIGN(bytes)); | |
246 | if (repeat--) { | |
247 | /* Min is 2MB */ | |
248 | nslabs = max(1024UL, (nslabs >> 1)); | |
2d29960a CH |
249 | bytes = nslabs << IO_TLB_SHIFT; |
250 | pr_info("Lowering to %luMB\n", bytes >> 20); | |
a98f5654 CH |
251 | goto retry; |
252 | } | |
253 | panic("%s (rc:%d)", xen_swiotlb_error(XEN_SWIOTLB_EFIXUP), rc); | |
254 | } | |
255 | ||
256 | if (swiotlb_init_with_tbl(start, nslabs, false)) | |
257 | panic("Cannot allocate SWIOTLB buffer"); | |
258 | swiotlb_set_max_segment(PAGE_SIZE); | |
259 | } | |
260 | #endif /* CONFIG_X86 */ | |
261 | ||
dceb1a68 | 262 | static void * |
b097186f | 263 | xen_swiotlb_alloc_coherent(struct device *hwdev, size_t size, |
baa676fc | 264 | dma_addr_t *dma_handle, gfp_t flags, |
00085f1e | 265 | unsigned long attrs) |
b097186f KRW |
266 | { |
267 | void *ret; | |
268 | int order = get_order(size); | |
269 | u64 dma_mask = DMA_BIT_MASK(32); | |
6810df88 KRW |
270 | phys_addr_t phys; |
271 | dma_addr_t dev_addr; | |
b097186f KRW |
272 | |
273 | /* | |
274 | * Ignore region specifiers - the kernel's ideas of | |
275 | * pseudo-phys memory layout has nothing to do with the | |
276 | * machine physical layout. We can't allocate highmem | |
277 | * because we can't return a pointer to it. | |
278 | */ | |
279 | flags &= ~(__GFP_DMA | __GFP_HIGHMEM); | |
280 | ||
7250f422 JJ |
281 | /* Convert the size to actually allocated. */ |
282 | size = 1UL << (order + XEN_PAGE_SHIFT); | |
283 | ||
1b65c4e5 SS |
284 | /* On ARM this function returns an ioremap'ped virtual address for |
285 | * which virt_to_phys doesn't return the corresponding physical | |
286 | * address. In fact on ARM virt_to_phys only works for kernel direct | |
287 | * mapped RAM memory. Also see comment below. | |
288 | */ | |
289 | ret = xen_alloc_coherent_pages(hwdev, size, dma_handle, flags, attrs); | |
b097186f | 290 | |
6810df88 KRW |
291 | if (!ret) |
292 | return ret; | |
293 | ||
b097186f | 294 | if (hwdev && hwdev->coherent_dma_mask) |
038d07a2 | 295 | dma_mask = hwdev->coherent_dma_mask; |
b097186f | 296 | |
91ffe4ad | 297 | /* At this point dma_handle is the dma address, next we are |
1b65c4e5 SS |
298 | * going to set it to the machine address. |
299 | * Do not use virt_to_phys(ret) because on ARM it doesn't correspond | |
300 | * to *dma_handle. */ | |
91ffe4ad SS |
301 | phys = dma_to_phys(hwdev, *dma_handle); |
302 | dev_addr = xen_phys_to_dma(hwdev, phys); | |
6810df88 KRW |
303 | if (((dev_addr + size - 1 <= dma_mask)) && |
304 | !range_straddles_page_boundary(phys, size)) | |
305 | *dma_handle = dev_addr; | |
306 | else { | |
1b65c4e5 | 307 | if (xen_create_contiguous_region(phys, order, |
69908907 | 308 | fls64(dma_mask), dma_handle) != 0) { |
1b65c4e5 | 309 | xen_free_coherent_pages(hwdev, size, ret, (dma_addr_t)phys, attrs); |
b097186f KRW |
310 | return NULL; |
311 | } | |
91ffe4ad | 312 | *dma_handle = phys_to_dma(hwdev, *dma_handle); |
b877ac98 | 313 | SetPageXenRemapped(virt_to_page(ret)); |
b097186f | 314 | } |
6810df88 | 315 | memset(ret, 0, size); |
b097186f KRW |
316 | return ret; |
317 | } | |
b097186f | 318 | |
dceb1a68 | 319 | static void |
b097186f | 320 | xen_swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, |
00085f1e | 321 | dma_addr_t dev_addr, unsigned long attrs) |
b097186f KRW |
322 | { |
323 | int order = get_order(size); | |
6810df88 KRW |
324 | phys_addr_t phys; |
325 | u64 dma_mask = DMA_BIT_MASK(32); | |
8b1e868f | 326 | struct page *page; |
b097186f | 327 | |
6810df88 KRW |
328 | if (hwdev && hwdev->coherent_dma_mask) |
329 | dma_mask = hwdev->coherent_dma_mask; | |
330 | ||
1b65c4e5 SS |
331 | /* do not use virt_to_phys because on ARM it doesn't return you the |
332 | * physical address */ | |
91ffe4ad | 333 | phys = xen_dma_to_phys(hwdev, dev_addr); |
6810df88 | 334 | |
7250f422 JJ |
335 | /* Convert the size to actually allocated. */ |
336 | size = 1UL << (order + XEN_PAGE_SHIFT); | |
337 | ||
8b1e868f BO |
338 | if (is_vmalloc_addr(vaddr)) |
339 | page = vmalloc_to_page(vaddr); | |
340 | else | |
341 | page = virt_to_page(vaddr); | |
342 | ||
50f6393f | 343 | if (!WARN_ON((dev_addr + size - 1 > dma_mask) || |
b877ac98 | 344 | range_straddles_page_boundary(phys, size)) && |
8b1e868f | 345 | TestClearPageXenRemapped(page)) |
1b65c4e5 | 346 | xen_destroy_contiguous_region(phys, order); |
6810df88 | 347 | |
91ffe4ad SS |
348 | xen_free_coherent_pages(hwdev, size, vaddr, phys_to_dma(hwdev, phys), |
349 | attrs); | |
b097186f | 350 | } |
b097186f KRW |
351 | |
352 | /* | |
353 | * Map a single buffer of the indicated size for DMA in streaming mode. The | |
354 | * physical address to use is returned. | |
355 | * | |
356 | * Once the device is given the dma address, the device owns this memory until | |
357 | * either xen_swiotlb_unmap_page or xen_swiotlb_dma_sync_single is performed. | |
358 | */ | |
dceb1a68 | 359 | static dma_addr_t xen_swiotlb_map_page(struct device *dev, struct page *page, |
b097186f KRW |
360 | unsigned long offset, size_t size, |
361 | enum dma_data_direction dir, | |
00085f1e | 362 | unsigned long attrs) |
b097186f | 363 | { |
e05ed4d1 | 364 | phys_addr_t map, phys = page_to_phys(page) + offset; |
91ffe4ad | 365 | dma_addr_t dev_addr = xen_phys_to_dma(dev, phys); |
b097186f KRW |
366 | |
367 | BUG_ON(dir == DMA_NONE); | |
368 | /* | |
369 | * If the address happens to be in the device's DMA window, | |
370 | * we can safely return the device addr and not worry about bounce | |
371 | * buffering it. | |
372 | */ | |
68a33b17 | 373 | if (dma_capable(dev, dev_addr, size, true) && |
a4dba130 | 374 | !range_straddles_page_boundary(phys, size) && |
291be10f | 375 | !xen_arch_need_swiotlb(dev, phys, dev_addr) && |
063b8271 CH |
376 | swiotlb_force != SWIOTLB_FORCE) |
377 | goto done; | |
b097186f KRW |
378 | |
379 | /* | |
380 | * Oh well, have to allocate and map a bounce buffer. | |
381 | */ | |
2b2b614d ZK |
382 | trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force); |
383 | ||
fc0021aa | 384 | map = swiotlb_tbl_map_single(dev, phys, size, size, dir, attrs); |
9c106119 | 385 | if (map == (phys_addr_t)DMA_MAPPING_ERROR) |
a4abe0ad | 386 | return DMA_MAPPING_ERROR; |
b097186f | 387 | |
b4dca151 | 388 | phys = map; |
91ffe4ad | 389 | dev_addr = xen_phys_to_dma(dev, map); |
b097186f KRW |
390 | |
391 | /* | |
392 | * Ensure that the address returned is DMA'ble | |
393 | */ | |
68a33b17 | 394 | if (unlikely(!dma_capable(dev, dev_addr, size, true))) { |
2973073a | 395 | swiotlb_tbl_unmap_single(dev, map, size, dir, |
063b8271 CH |
396 | attrs | DMA_ATTR_SKIP_CPU_SYNC); |
397 | return DMA_MAPPING_ERROR; | |
398 | } | |
76418421 | 399 | |
063b8271 | 400 | done: |
63f0620c SS |
401 | if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) { |
402 | if (pfn_valid(PFN_DOWN(dma_to_phys(dev, dev_addr)))) | |
403 | arch_sync_dma_for_device(phys, size, dir); | |
404 | else | |
405 | xen_dma_sync_for_device(dev, dev_addr, size, dir); | |
406 | } | |
063b8271 | 407 | return dev_addr; |
b097186f | 408 | } |
b097186f KRW |
409 | |
410 | /* | |
411 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | |
412 | * match what was provided for in a previous xen_swiotlb_map_page call. All | |
413 | * other usages are undefined. | |
414 | * | |
415 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
416 | * whatever the device wrote there. | |
417 | */ | |
bf7954e7 CH |
418 | static void xen_swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, |
419 | size_t size, enum dma_data_direction dir, unsigned long attrs) | |
b097186f | 420 | { |
91ffe4ad | 421 | phys_addr_t paddr = xen_dma_to_phys(hwdev, dev_addr); |
b097186f KRW |
422 | |
423 | BUG_ON(dir == DMA_NONE); | |
424 | ||
63f0620c SS |
425 | if (!dev_is_dma_coherent(hwdev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) { |
426 | if (pfn_valid(PFN_DOWN(dma_to_phys(hwdev, dev_addr)))) | |
427 | arch_sync_dma_for_cpu(paddr, size, dir); | |
428 | else | |
429 | xen_dma_sync_for_cpu(hwdev, dev_addr, size, dir); | |
430 | } | |
6cf05463 | 431 | |
b097186f | 432 | /* NOTE: We use dev_addr here, not paddr! */ |
38ba51de | 433 | if (is_xen_swiotlb_buffer(hwdev, dev_addr)) |
2973073a | 434 | swiotlb_tbl_unmap_single(hwdev, paddr, size, dir, attrs); |
b097186f KRW |
435 | } |
436 | ||
b097186f | 437 | static void |
2e12dcee CH |
438 | xen_swiotlb_sync_single_for_cpu(struct device *dev, dma_addr_t dma_addr, |
439 | size_t size, enum dma_data_direction dir) | |
b097186f | 440 | { |
91ffe4ad | 441 | phys_addr_t paddr = xen_dma_to_phys(dev, dma_addr); |
6cf05463 | 442 | |
63f0620c SS |
443 | if (!dev_is_dma_coherent(dev)) { |
444 | if (pfn_valid(PFN_DOWN(dma_to_phys(dev, dma_addr)))) | |
445 | arch_sync_dma_for_cpu(paddr, size, dir); | |
446 | else | |
447 | xen_dma_sync_for_cpu(dev, dma_addr, size, dir); | |
448 | } | |
6cf05463 | 449 | |
38ba51de | 450 | if (is_xen_swiotlb_buffer(dev, dma_addr)) |
80808d27 | 451 | swiotlb_sync_single_for_cpu(dev, paddr, size, dir); |
b097186f KRW |
452 | } |
453 | ||
2e12dcee CH |
454 | static void |
455 | xen_swiotlb_sync_single_for_device(struct device *dev, dma_addr_t dma_addr, | |
456 | size_t size, enum dma_data_direction dir) | |
b097186f | 457 | { |
91ffe4ad | 458 | phys_addr_t paddr = xen_dma_to_phys(dev, dma_addr); |
b097186f | 459 | |
38ba51de | 460 | if (is_xen_swiotlb_buffer(dev, dma_addr)) |
80808d27 | 461 | swiotlb_sync_single_for_device(dev, paddr, size, dir); |
2e12dcee | 462 | |
63f0620c SS |
463 | if (!dev_is_dma_coherent(dev)) { |
464 | if (pfn_valid(PFN_DOWN(dma_to_phys(dev, dma_addr)))) | |
465 | arch_sync_dma_for_device(paddr, size, dir); | |
466 | else | |
467 | xen_dma_sync_for_device(dev, dma_addr, size, dir); | |
468 | } | |
b097186f | 469 | } |
dceb1a68 CH |
470 | |
471 | /* | |
472 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | |
473 | * concerning calls here are the same as for swiotlb_unmap_page() above. | |
474 | */ | |
475 | static void | |
aca351cc CH |
476 | xen_swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, |
477 | enum dma_data_direction dir, unsigned long attrs) | |
dceb1a68 CH |
478 | { |
479 | struct scatterlist *sg; | |
480 | int i; | |
481 | ||
482 | BUG_ON(dir == DMA_NONE); | |
483 | ||
484 | for_each_sg(sgl, sg, nelems, i) | |
bf7954e7 CH |
485 | xen_swiotlb_unmap_page(hwdev, sg->dma_address, sg_dma_len(sg), |
486 | dir, attrs); | |
dceb1a68 CH |
487 | |
488 | } | |
b097186f | 489 | |
dceb1a68 | 490 | static int |
8b35d9fe | 491 | xen_swiotlb_map_sg(struct device *dev, struct scatterlist *sgl, int nelems, |
aca351cc | 492 | enum dma_data_direction dir, unsigned long attrs) |
b097186f KRW |
493 | { |
494 | struct scatterlist *sg; | |
495 | int i; | |
496 | ||
497 | BUG_ON(dir == DMA_NONE); | |
498 | ||
499 | for_each_sg(sgl, sg, nelems, i) { | |
8b35d9fe CH |
500 | sg->dma_address = xen_swiotlb_map_page(dev, sg_page(sg), |
501 | sg->offset, sg->length, dir, attrs); | |
502 | if (sg->dma_address == DMA_MAPPING_ERROR) | |
503 | goto out_unmap; | |
781575cd | 504 | sg_dma_len(sg) = sg->length; |
b097186f | 505 | } |
8b35d9fe | 506 | |
b097186f | 507 | return nelems; |
8b35d9fe CH |
508 | out_unmap: |
509 | xen_swiotlb_unmap_sg(dev, sgl, i, dir, attrs | DMA_ATTR_SKIP_CPU_SYNC); | |
510 | sg_dma_len(sgl) = 0; | |
511 | return 0; | |
b097186f | 512 | } |
b097186f | 513 | |
b097186f | 514 | static void |
2e12dcee CH |
515 | xen_swiotlb_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl, |
516 | int nelems, enum dma_data_direction dir) | |
b097186f KRW |
517 | { |
518 | struct scatterlist *sg; | |
519 | int i; | |
520 | ||
2e12dcee CH |
521 | for_each_sg(sgl, sg, nelems, i) { |
522 | xen_swiotlb_sync_single_for_cpu(dev, sg->dma_address, | |
523 | sg->length, dir); | |
524 | } | |
b097186f | 525 | } |
b097186f | 526 | |
dceb1a68 | 527 | static void |
2e12dcee | 528 | xen_swiotlb_sync_sg_for_device(struct device *dev, struct scatterlist *sgl, |
b097186f KRW |
529 | int nelems, enum dma_data_direction dir) |
530 | { | |
2e12dcee CH |
531 | struct scatterlist *sg; |
532 | int i; | |
533 | ||
534 | for_each_sg(sgl, sg, nelems, i) { | |
535 | xen_swiotlb_sync_single_for_device(dev, sg->dma_address, | |
536 | sg->length, dir); | |
537 | } | |
b097186f | 538 | } |
b097186f | 539 | |
b097186f KRW |
540 | /* |
541 | * Return whether the given device DMA address mask can be supported | |
542 | * properly. For example, if your device can only drive the low 24-bits | |
543 | * during bus mastering, then you would pass 0x00ffffff as the mask to | |
544 | * this function. | |
545 | */ | |
dceb1a68 | 546 | static int |
b097186f KRW |
547 | xen_swiotlb_dma_supported(struct device *hwdev, u64 mask) |
548 | { | |
2d29960a | 549 | return xen_phys_to_dma(hwdev, io_tlb_default_mem->end - 1) <= mask; |
b097186f | 550 | } |
eb1ddc00 | 551 | |
dceb1a68 CH |
552 | const struct dma_map_ops xen_swiotlb_dma_ops = { |
553 | .alloc = xen_swiotlb_alloc_coherent, | |
554 | .free = xen_swiotlb_free_coherent, | |
555 | .sync_single_for_cpu = xen_swiotlb_sync_single_for_cpu, | |
556 | .sync_single_for_device = xen_swiotlb_sync_single_for_device, | |
557 | .sync_sg_for_cpu = xen_swiotlb_sync_sg_for_cpu, | |
558 | .sync_sg_for_device = xen_swiotlb_sync_sg_for_device, | |
aca351cc CH |
559 | .map_sg = xen_swiotlb_map_sg, |
560 | .unmap_sg = xen_swiotlb_unmap_sg, | |
dceb1a68 CH |
561 | .map_page = xen_swiotlb_map_page, |
562 | .unmap_page = xen_swiotlb_unmap_page, | |
563 | .dma_supported = xen_swiotlb_dma_supported, | |
922659ea CH |
564 | .mmap = dma_common_mmap, |
565 | .get_sgtable = dma_common_get_sgtable, | |
efa70f2f CH |
566 | .alloc_pages = dma_common_alloc_pages, |
567 | .free_pages = dma_common_free_pages, | |
dceb1a68 | 568 | }; |