Commit | Line | Data |
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b097186f KRW |
1 | /* |
2 | * Copyright 2010 | |
3 | * by Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
4 | * | |
5 | * This code provides a IOMMU for Xen PV guests with PCI passthrough. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License v2.0 as published by | |
9 | * the Free Software Foundation | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * PV guests under Xen are running in an non-contiguous memory architecture. | |
17 | * | |
18 | * When PCI pass-through is utilized, this necessitates an IOMMU for | |
19 | * translating bus (DMA) to virtual and vice-versa and also providing a | |
20 | * mechanism to have contiguous pages for device drivers operations (say DMA | |
21 | * operations). | |
22 | * | |
23 | * Specifically, under Xen the Linux idea of pages is an illusion. It | |
24 | * assumes that pages start at zero and go up to the available memory. To | |
25 | * help with that, the Linux Xen MMU provides a lookup mechanism to | |
26 | * translate the page frame numbers (PFN) to machine frame numbers (MFN) | |
27 | * and vice-versa. The MFN are the "real" frame numbers. Furthermore | |
28 | * memory is not contiguous. Xen hypervisor stitches memory for guests | |
29 | * from different pools, which means there is no guarantee that PFN==MFN | |
30 | * and PFN+1==MFN+1. Lastly with Xen 4.0, pages (in debug mode) are | |
31 | * allocated in descending order (high to low), meaning the guest might | |
32 | * never get any MFN's under the 4GB mark. | |
33 | * | |
34 | */ | |
35 | ||
283c0972 JP |
36 | #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt |
37 | ||
b097186f | 38 | #include <linux/bootmem.h> |
ea8c64ac | 39 | #include <linux/dma-direct.h> |
63c9744b | 40 | #include <linux/export.h> |
b097186f KRW |
41 | #include <xen/swiotlb-xen.h> |
42 | #include <xen/page.h> | |
43 | #include <xen/xen-ops.h> | |
f4b2f07b | 44 | #include <xen/hvc-console.h> |
2b2b614d | 45 | |
83862ccf | 46 | #include <asm/dma-mapping.h> |
1b65c4e5 | 47 | #include <asm/xen/page-coherent.h> |
e1d8f62a | 48 | |
2b2b614d | 49 | #include <trace/events/swiotlb.h> |
b097186f KRW |
50 | /* |
51 | * Used to do a quick range check in swiotlb_tbl_unmap_single and | |
52 | * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this | |
53 | * API. | |
54 | */ | |
55 | ||
4d048dbc CH |
56 | #define XEN_SWIOTLB_ERROR_CODE (~(dma_addr_t)0x0) |
57 | ||
b097186f KRW |
58 | static char *xen_io_tlb_start, *xen_io_tlb_end; |
59 | static unsigned long xen_io_tlb_nslabs; | |
60 | /* | |
61 | * Quick lookup value of the bus address of the IOTLB. | |
62 | */ | |
63 | ||
b8b0f559 | 64 | static u64 start_dma_addr; |
b097186f | 65 | |
e17b2f11 | 66 | /* |
9435cce8 | 67 | * Both of these functions should avoid XEN_PFN_PHYS because phys_addr_t |
e17b2f11 IC |
68 | * can be 32bit when dma_addr_t is 64bit leading to a loss in |
69 | * information if the shift is done before casting to 64bit. | |
70 | */ | |
6b42a7ea | 71 | static inline dma_addr_t xen_phys_to_bus(phys_addr_t paddr) |
b097186f | 72 | { |
9435cce8 JG |
73 | unsigned long bfn = pfn_to_bfn(XEN_PFN_DOWN(paddr)); |
74 | dma_addr_t dma = (dma_addr_t)bfn << XEN_PAGE_SHIFT; | |
e17b2f11 | 75 | |
9435cce8 | 76 | dma |= paddr & ~XEN_PAGE_MASK; |
e17b2f11 IC |
77 | |
78 | return dma; | |
b097186f KRW |
79 | } |
80 | ||
6b42a7ea | 81 | static inline phys_addr_t xen_bus_to_phys(dma_addr_t baddr) |
b097186f | 82 | { |
9435cce8 JG |
83 | unsigned long xen_pfn = bfn_to_pfn(XEN_PFN_DOWN(baddr)); |
84 | dma_addr_t dma = (dma_addr_t)xen_pfn << XEN_PAGE_SHIFT; | |
e17b2f11 IC |
85 | phys_addr_t paddr = dma; |
86 | ||
9435cce8 | 87 | paddr |= baddr & ~XEN_PAGE_MASK; |
e17b2f11 IC |
88 | |
89 | return paddr; | |
b097186f KRW |
90 | } |
91 | ||
6b42a7ea | 92 | static inline dma_addr_t xen_virt_to_bus(void *address) |
b097186f KRW |
93 | { |
94 | return xen_phys_to_bus(virt_to_phys(address)); | |
95 | } | |
96 | ||
9435cce8 | 97 | static int check_pages_physically_contiguous(unsigned long xen_pfn, |
b097186f KRW |
98 | unsigned int offset, |
99 | size_t length) | |
100 | { | |
32e09870 | 101 | unsigned long next_bfn; |
b097186f KRW |
102 | int i; |
103 | int nr_pages; | |
104 | ||
9435cce8 JG |
105 | next_bfn = pfn_to_bfn(xen_pfn); |
106 | nr_pages = (offset + length + XEN_PAGE_SIZE-1) >> XEN_PAGE_SHIFT; | |
b097186f KRW |
107 | |
108 | for (i = 1; i < nr_pages; i++) { | |
9435cce8 | 109 | if (pfn_to_bfn(++xen_pfn) != ++next_bfn) |
b097186f KRW |
110 | return 0; |
111 | } | |
112 | return 1; | |
113 | } | |
114 | ||
6b42a7ea | 115 | static inline int range_straddles_page_boundary(phys_addr_t p, size_t size) |
b097186f | 116 | { |
9435cce8 JG |
117 | unsigned long xen_pfn = XEN_PFN_DOWN(p); |
118 | unsigned int offset = p & ~XEN_PAGE_MASK; | |
b097186f | 119 | |
9435cce8 | 120 | if (offset + size <= XEN_PAGE_SIZE) |
b097186f | 121 | return 0; |
9435cce8 | 122 | if (check_pages_physically_contiguous(xen_pfn, offset, size)) |
b097186f KRW |
123 | return 0; |
124 | return 1; | |
125 | } | |
126 | ||
127 | static int is_xen_swiotlb_buffer(dma_addr_t dma_addr) | |
128 | { | |
9435cce8 JG |
129 | unsigned long bfn = XEN_PFN_DOWN(dma_addr); |
130 | unsigned long xen_pfn = bfn_to_local_pfn(bfn); | |
131 | phys_addr_t paddr = XEN_PFN_PHYS(xen_pfn); | |
b097186f KRW |
132 | |
133 | /* If the address is outside our domain, it CAN | |
134 | * have the same virtual address as another address | |
135 | * in our domain. Therefore _only_ check address within our domain. | |
136 | */ | |
9435cce8 | 137 | if (pfn_valid(PFN_DOWN(paddr))) { |
b097186f KRW |
138 | return paddr >= virt_to_phys(xen_io_tlb_start) && |
139 | paddr < virt_to_phys(xen_io_tlb_end); | |
140 | } | |
141 | return 0; | |
142 | } | |
143 | ||
144 | static int max_dma_bits = 32; | |
145 | ||
146 | static int | |
147 | xen_swiotlb_fixup(void *buf, size_t size, unsigned long nslabs) | |
148 | { | |
149 | int i, rc; | |
150 | int dma_bits; | |
69908907 | 151 | dma_addr_t dma_handle; |
1b65c4e5 | 152 | phys_addr_t p = virt_to_phys(buf); |
b097186f KRW |
153 | |
154 | dma_bits = get_order(IO_TLB_SEGSIZE << IO_TLB_SHIFT) + PAGE_SHIFT; | |
155 | ||
156 | i = 0; | |
157 | do { | |
158 | int slabs = min(nslabs - i, (unsigned long)IO_TLB_SEGSIZE); | |
159 | ||
160 | do { | |
161 | rc = xen_create_contiguous_region( | |
1b65c4e5 | 162 | p + (i << IO_TLB_SHIFT), |
b097186f | 163 | get_order(slabs << IO_TLB_SHIFT), |
69908907 | 164 | dma_bits, &dma_handle); |
b097186f KRW |
165 | } while (rc && dma_bits++ < max_dma_bits); |
166 | if (rc) | |
167 | return rc; | |
168 | ||
169 | i += slabs; | |
170 | } while (i < nslabs); | |
171 | return 0; | |
172 | } | |
1cef36a5 KRW |
173 | static unsigned long xen_set_nslabs(unsigned long nr_tbl) |
174 | { | |
175 | if (!nr_tbl) { | |
176 | xen_io_tlb_nslabs = (64 * 1024 * 1024 >> IO_TLB_SHIFT); | |
177 | xen_io_tlb_nslabs = ALIGN(xen_io_tlb_nslabs, IO_TLB_SEGSIZE); | |
178 | } else | |
179 | xen_io_tlb_nslabs = nr_tbl; | |
b097186f | 180 | |
1cef36a5 KRW |
181 | return xen_io_tlb_nslabs << IO_TLB_SHIFT; |
182 | } | |
b097186f | 183 | |
5bab7864 KRW |
184 | enum xen_swiotlb_err { |
185 | XEN_SWIOTLB_UNKNOWN = 0, | |
186 | XEN_SWIOTLB_ENOMEM, | |
187 | XEN_SWIOTLB_EFIXUP | |
188 | }; | |
189 | ||
190 | static const char *xen_swiotlb_error(enum xen_swiotlb_err err) | |
191 | { | |
192 | switch (err) { | |
193 | case XEN_SWIOTLB_ENOMEM: | |
194 | return "Cannot allocate Xen-SWIOTLB buffer\n"; | |
195 | case XEN_SWIOTLB_EFIXUP: | |
196 | return "Failed to get contiguous memory for DMA from Xen!\n"\ | |
197 | "You either: don't have the permissions, do not have"\ | |
198 | " enough free memory under 4GB, or the hypervisor memory"\ | |
199 | " is too fragmented!"; | |
200 | default: | |
201 | break; | |
202 | } | |
203 | return ""; | |
204 | } | |
b8277600 | 205 | int __ref xen_swiotlb_init(int verbose, bool early) |
b097186f | 206 | { |
b8277600 | 207 | unsigned long bytes, order; |
f4b2f07b | 208 | int rc = -ENOMEM; |
5bab7864 | 209 | enum xen_swiotlb_err m_ret = XEN_SWIOTLB_UNKNOWN; |
f4b2f07b | 210 | unsigned int repeat = 3; |
5f98ecdb | 211 | |
1cef36a5 | 212 | xen_io_tlb_nslabs = swiotlb_nr_tbl(); |
f4b2f07b | 213 | retry: |
1cef36a5 | 214 | bytes = xen_set_nslabs(xen_io_tlb_nslabs); |
b8277600 | 215 | order = get_order(xen_io_tlb_nslabs << IO_TLB_SHIFT); |
b097186f KRW |
216 | /* |
217 | * Get IO TLB memory from any location. | |
218 | */ | |
b8277600 KRW |
219 | if (early) |
220 | xen_io_tlb_start = alloc_bootmem_pages(PAGE_ALIGN(bytes)); | |
221 | else { | |
222 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) | |
223 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
224 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | |
8746515d | 225 | xen_io_tlb_start = (void *)xen_get_swiotlb_free_pages(order); |
b8277600 KRW |
226 | if (xen_io_tlb_start) |
227 | break; | |
228 | order--; | |
229 | } | |
230 | if (order != get_order(bytes)) { | |
283c0972 JP |
231 | pr_warn("Warning: only able to allocate %ld MB for software IO TLB\n", |
232 | (PAGE_SIZE << order) >> 20); | |
b8277600 KRW |
233 | xen_io_tlb_nslabs = SLABS_PER_PAGE << order; |
234 | bytes = xen_io_tlb_nslabs << IO_TLB_SHIFT; | |
235 | } | |
236 | } | |
f4b2f07b | 237 | if (!xen_io_tlb_start) { |
5bab7864 | 238 | m_ret = XEN_SWIOTLB_ENOMEM; |
f4b2f07b KRW |
239 | goto error; |
240 | } | |
b097186f KRW |
241 | xen_io_tlb_end = xen_io_tlb_start + bytes; |
242 | /* | |
243 | * And replace that memory with pages under 4GB. | |
244 | */ | |
245 | rc = xen_swiotlb_fixup(xen_io_tlb_start, | |
246 | bytes, | |
247 | xen_io_tlb_nslabs); | |
f4b2f07b | 248 | if (rc) { |
b8277600 KRW |
249 | if (early) |
250 | free_bootmem(__pa(xen_io_tlb_start), PAGE_ALIGN(bytes)); | |
251 | else { | |
252 | free_pages((unsigned long)xen_io_tlb_start, order); | |
253 | xen_io_tlb_start = NULL; | |
254 | } | |
5bab7864 | 255 | m_ret = XEN_SWIOTLB_EFIXUP; |
b097186f | 256 | goto error; |
f4b2f07b | 257 | } |
b097186f | 258 | start_dma_addr = xen_virt_to_bus(xen_io_tlb_start); |
c468bdee | 259 | if (early) { |
ac2cbab2 YL |
260 | if (swiotlb_init_with_tbl(xen_io_tlb_start, xen_io_tlb_nslabs, |
261 | verbose)) | |
262 | panic("Cannot allocate SWIOTLB buffer"); | |
c468bdee KRW |
263 | rc = 0; |
264 | } else | |
b8277600 | 265 | rc = swiotlb_late_init_with_tbl(xen_io_tlb_start, xen_io_tlb_nslabs); |
7453c549 KRW |
266 | |
267 | if (!rc) | |
268 | swiotlb_set_max_segment(PAGE_SIZE); | |
269 | ||
b8277600 | 270 | return rc; |
b097186f | 271 | error: |
f4b2f07b KRW |
272 | if (repeat--) { |
273 | xen_io_tlb_nslabs = max(1024UL, /* Min is 2MB */ | |
274 | (xen_io_tlb_nslabs >> 1)); | |
283c0972 JP |
275 | pr_info("Lowering to %luMB\n", |
276 | (xen_io_tlb_nslabs << IO_TLB_SHIFT) >> 20); | |
f4b2f07b KRW |
277 | goto retry; |
278 | } | |
283c0972 | 279 | pr_err("%s (rc:%d)\n", xen_swiotlb_error(m_ret), rc); |
b8277600 KRW |
280 | if (early) |
281 | panic("%s (rc:%d)", xen_swiotlb_error(m_ret), rc); | |
282 | else | |
283 | free_pages((unsigned long)xen_io_tlb_start, order); | |
284 | return rc; | |
b097186f | 285 | } |
dceb1a68 CH |
286 | |
287 | static void * | |
b097186f | 288 | xen_swiotlb_alloc_coherent(struct device *hwdev, size_t size, |
baa676fc | 289 | dma_addr_t *dma_handle, gfp_t flags, |
00085f1e | 290 | unsigned long attrs) |
b097186f KRW |
291 | { |
292 | void *ret; | |
293 | int order = get_order(size); | |
294 | u64 dma_mask = DMA_BIT_MASK(32); | |
6810df88 KRW |
295 | phys_addr_t phys; |
296 | dma_addr_t dev_addr; | |
b097186f KRW |
297 | |
298 | /* | |
299 | * Ignore region specifiers - the kernel's ideas of | |
300 | * pseudo-phys memory layout has nothing to do with the | |
301 | * machine physical layout. We can't allocate highmem | |
302 | * because we can't return a pointer to it. | |
303 | */ | |
304 | flags &= ~(__GFP_DMA | __GFP_HIGHMEM); | |
305 | ||
1b65c4e5 SS |
306 | /* On ARM this function returns an ioremap'ped virtual address for |
307 | * which virt_to_phys doesn't return the corresponding physical | |
308 | * address. In fact on ARM virt_to_phys only works for kernel direct | |
309 | * mapped RAM memory. Also see comment below. | |
310 | */ | |
311 | ret = xen_alloc_coherent_pages(hwdev, size, dma_handle, flags, attrs); | |
b097186f | 312 | |
6810df88 KRW |
313 | if (!ret) |
314 | return ret; | |
315 | ||
b097186f | 316 | if (hwdev && hwdev->coherent_dma_mask) |
038d07a2 | 317 | dma_mask = hwdev->coherent_dma_mask; |
b097186f | 318 | |
1b65c4e5 SS |
319 | /* At this point dma_handle is the physical address, next we are |
320 | * going to set it to the machine address. | |
321 | * Do not use virt_to_phys(ret) because on ARM it doesn't correspond | |
322 | * to *dma_handle. */ | |
323 | phys = *dma_handle; | |
6810df88 KRW |
324 | dev_addr = xen_phys_to_bus(phys); |
325 | if (((dev_addr + size - 1 <= dma_mask)) && | |
326 | !range_straddles_page_boundary(phys, size)) | |
327 | *dma_handle = dev_addr; | |
328 | else { | |
1b65c4e5 | 329 | if (xen_create_contiguous_region(phys, order, |
69908907 | 330 | fls64(dma_mask), dma_handle) != 0) { |
1b65c4e5 | 331 | xen_free_coherent_pages(hwdev, size, ret, (dma_addr_t)phys, attrs); |
b097186f KRW |
332 | return NULL; |
333 | } | |
b097186f | 334 | } |
6810df88 | 335 | memset(ret, 0, size); |
b097186f KRW |
336 | return ret; |
337 | } | |
b097186f | 338 | |
dceb1a68 | 339 | static void |
b097186f | 340 | xen_swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, |
00085f1e | 341 | dma_addr_t dev_addr, unsigned long attrs) |
b097186f KRW |
342 | { |
343 | int order = get_order(size); | |
6810df88 KRW |
344 | phys_addr_t phys; |
345 | u64 dma_mask = DMA_BIT_MASK(32); | |
b097186f | 346 | |
6810df88 KRW |
347 | if (hwdev && hwdev->coherent_dma_mask) |
348 | dma_mask = hwdev->coherent_dma_mask; | |
349 | ||
1b65c4e5 SS |
350 | /* do not use virt_to_phys because on ARM it doesn't return you the |
351 | * physical address */ | |
352 | phys = xen_bus_to_phys(dev_addr); | |
6810df88 | 353 | |
4855c92d | 354 | if (((dev_addr + size - 1 <= dma_mask)) || |
6810df88 | 355 | range_straddles_page_boundary(phys, size)) |
1b65c4e5 | 356 | xen_destroy_contiguous_region(phys, order); |
6810df88 | 357 | |
1b65c4e5 | 358 | xen_free_coherent_pages(hwdev, size, vaddr, (dma_addr_t)phys, attrs); |
b097186f | 359 | } |
b097186f KRW |
360 | |
361 | /* | |
362 | * Map a single buffer of the indicated size for DMA in streaming mode. The | |
363 | * physical address to use is returned. | |
364 | * | |
365 | * Once the device is given the dma address, the device owns this memory until | |
366 | * either xen_swiotlb_unmap_page or xen_swiotlb_dma_sync_single is performed. | |
367 | */ | |
dceb1a68 | 368 | static dma_addr_t xen_swiotlb_map_page(struct device *dev, struct page *page, |
b097186f KRW |
369 | unsigned long offset, size_t size, |
370 | enum dma_data_direction dir, | |
00085f1e | 371 | unsigned long attrs) |
b097186f | 372 | { |
e05ed4d1 | 373 | phys_addr_t map, phys = page_to_phys(page) + offset; |
b097186f | 374 | dma_addr_t dev_addr = xen_phys_to_bus(phys); |
b097186f KRW |
375 | |
376 | BUG_ON(dir == DMA_NONE); | |
377 | /* | |
378 | * If the address happens to be in the device's DMA window, | |
379 | * we can safely return the device addr and not worry about bounce | |
380 | * buffering it. | |
381 | */ | |
382 | if (dma_capable(dev, dev_addr, size) && | |
a4dba130 | 383 | !range_straddles_page_boundary(phys, size) && |
291be10f | 384 | !xen_arch_need_swiotlb(dev, phys, dev_addr) && |
ae7871be | 385 | (swiotlb_force != SWIOTLB_FORCE)) { |
6cf05463 SS |
386 | /* we are not interested in the dma_addr returned by |
387 | * xen_dma_map_page, only in the potential cache flushes executed | |
388 | * by the function. */ | |
a0f2dee0 | 389 | xen_dma_map_page(dev, page, dev_addr, offset, size, dir, attrs); |
b097186f | 390 | return dev_addr; |
6cf05463 | 391 | } |
b097186f KRW |
392 | |
393 | /* | |
394 | * Oh well, have to allocate and map a bounce buffer. | |
395 | */ | |
2b2b614d ZK |
396 | trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force); |
397 | ||
0443fa00 AD |
398 | map = swiotlb_tbl_map_single(dev, start_dma_addr, phys, size, dir, |
399 | attrs); | |
e05ed4d1 | 400 | if (map == SWIOTLB_MAP_ERROR) |
4d048dbc | 401 | return XEN_SWIOTLB_ERROR_CODE; |
b097186f | 402 | |
f1225ee4 | 403 | dev_addr = xen_phys_to_bus(map); |
6cf05463 | 404 | xen_dma_map_page(dev, pfn_to_page(map >> PAGE_SHIFT), |
a0f2dee0 | 405 | dev_addr, map & ~PAGE_MASK, size, dir, attrs); |
b097186f KRW |
406 | |
407 | /* | |
408 | * Ensure that the address returned is DMA'ble | |
409 | */ | |
76418421 AD |
410 | if (dma_capable(dev, dev_addr, size)) |
411 | return dev_addr; | |
412 | ||
d29fa0cb AD |
413 | attrs |= DMA_ATTR_SKIP_CPU_SYNC; |
414 | swiotlb_tbl_unmap_single(dev, map, size, dir, attrs); | |
76418421 | 415 | |
4d048dbc | 416 | return XEN_SWIOTLB_ERROR_CODE; |
b097186f | 417 | } |
b097186f KRW |
418 | |
419 | /* | |
420 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | |
421 | * match what was provided for in a previous xen_swiotlb_map_page call. All | |
422 | * other usages are undefined. | |
423 | * | |
424 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
425 | * whatever the device wrote there. | |
426 | */ | |
427 | static void xen_unmap_single(struct device *hwdev, dma_addr_t dev_addr, | |
6cf05463 | 428 | size_t size, enum dma_data_direction dir, |
00085f1e | 429 | unsigned long attrs) |
b097186f KRW |
430 | { |
431 | phys_addr_t paddr = xen_bus_to_phys(dev_addr); | |
432 | ||
433 | BUG_ON(dir == DMA_NONE); | |
434 | ||
d6883e6f | 435 | xen_dma_unmap_page(hwdev, dev_addr, size, dir, attrs); |
6cf05463 | 436 | |
b097186f KRW |
437 | /* NOTE: We use dev_addr here, not paddr! */ |
438 | if (is_xen_swiotlb_buffer(dev_addr)) { | |
0443fa00 | 439 | swiotlb_tbl_unmap_single(hwdev, paddr, size, dir, attrs); |
b097186f KRW |
440 | return; |
441 | } | |
442 | ||
443 | if (dir != DMA_FROM_DEVICE) | |
444 | return; | |
445 | ||
446 | /* | |
447 | * phys_to_virt doesn't work with hihgmem page but we could | |
448 | * call dma_mark_clean() with hihgmem page here. However, we | |
449 | * are fine since dma_mark_clean() is null on POWERPC. We can | |
450 | * make dma_mark_clean() take a physical address if necessary. | |
451 | */ | |
452 | dma_mark_clean(phys_to_virt(paddr), size); | |
453 | } | |
454 | ||
dceb1a68 | 455 | static void xen_swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, |
b097186f | 456 | size_t size, enum dma_data_direction dir, |
00085f1e | 457 | unsigned long attrs) |
b097186f | 458 | { |
6cf05463 | 459 | xen_unmap_single(hwdev, dev_addr, size, dir, attrs); |
b097186f | 460 | } |
b097186f KRW |
461 | |
462 | /* | |
463 | * Make physical memory consistent for a single streaming mode DMA translation | |
464 | * after a transfer. | |
465 | * | |
466 | * If you perform a xen_swiotlb_map_page() but wish to interrogate the buffer | |
467 | * using the cpu, yet do not wish to teardown the dma mapping, you must | |
468 | * call this function before doing so. At the next point you give the dma | |
469 | * address back to the card, you must first perform a | |
470 | * xen_swiotlb_dma_sync_for_device, and then the device again owns the buffer | |
471 | */ | |
472 | static void | |
473 | xen_swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, | |
474 | size_t size, enum dma_data_direction dir, | |
475 | enum dma_sync_target target) | |
476 | { | |
477 | phys_addr_t paddr = xen_bus_to_phys(dev_addr); | |
478 | ||
479 | BUG_ON(dir == DMA_NONE); | |
480 | ||
6cf05463 | 481 | if (target == SYNC_FOR_CPU) |
d6883e6f | 482 | xen_dma_sync_single_for_cpu(hwdev, dev_addr, size, dir); |
6cf05463 | 483 | |
b097186f | 484 | /* NOTE: We use dev_addr here, not paddr! */ |
6cf05463 | 485 | if (is_xen_swiotlb_buffer(dev_addr)) |
fbfda893 | 486 | swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target); |
6cf05463 SS |
487 | |
488 | if (target == SYNC_FOR_DEVICE) | |
9490c6c6 | 489 | xen_dma_sync_single_for_device(hwdev, dev_addr, size, dir); |
b097186f KRW |
490 | |
491 | if (dir != DMA_FROM_DEVICE) | |
492 | return; | |
493 | ||
494 | dma_mark_clean(phys_to_virt(paddr), size); | |
495 | } | |
496 | ||
497 | void | |
498 | xen_swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
499 | size_t size, enum dma_data_direction dir) | |
500 | { | |
501 | xen_swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); | |
502 | } | |
b097186f KRW |
503 | |
504 | void | |
505 | xen_swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
506 | size_t size, enum dma_data_direction dir) | |
507 | { | |
508 | xen_swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); | |
509 | } | |
dceb1a68 CH |
510 | |
511 | /* | |
512 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | |
513 | * concerning calls here are the same as for swiotlb_unmap_page() above. | |
514 | */ | |
515 | static void | |
516 | xen_swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, | |
517 | int nelems, enum dma_data_direction dir, | |
518 | unsigned long attrs) | |
519 | { | |
520 | struct scatterlist *sg; | |
521 | int i; | |
522 | ||
523 | BUG_ON(dir == DMA_NONE); | |
524 | ||
525 | for_each_sg(sgl, sg, nelems, i) | |
526 | xen_unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir, attrs); | |
527 | ||
528 | } | |
b097186f KRW |
529 | |
530 | /* | |
531 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | |
532 | * This is the scatter-gather version of the above xen_swiotlb_map_page | |
533 | * interface. Here the scatter gather list elements are each tagged with the | |
534 | * appropriate dma address and length. They are obtained via | |
535 | * sg_dma_{address,length}(SG). | |
536 | * | |
537 | * NOTE: An implementation may be able to use a smaller number of | |
538 | * DMA address/length pairs than there are SG table elements. | |
539 | * (for example via virtual mapping capabilities) | |
540 | * The routine returns the number of addr/length pairs actually | |
541 | * used, at most nents. | |
542 | * | |
543 | * Device ownership issues as mentioned above for xen_swiotlb_map_page are the | |
544 | * same here. | |
545 | */ | |
dceb1a68 | 546 | static int |
b097186f KRW |
547 | xen_swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, |
548 | int nelems, enum dma_data_direction dir, | |
00085f1e | 549 | unsigned long attrs) |
b097186f KRW |
550 | { |
551 | struct scatterlist *sg; | |
552 | int i; | |
553 | ||
554 | BUG_ON(dir == DMA_NONE); | |
555 | ||
556 | for_each_sg(sgl, sg, nelems, i) { | |
557 | phys_addr_t paddr = sg_phys(sg); | |
558 | dma_addr_t dev_addr = xen_phys_to_bus(paddr); | |
559 | ||
ae7871be | 560 | if (swiotlb_force == SWIOTLB_FORCE || |
291be10f | 561 | xen_arch_need_swiotlb(hwdev, paddr, dev_addr) || |
b097186f KRW |
562 | !dma_capable(hwdev, dev_addr, sg->length) || |
563 | range_straddles_page_boundary(paddr, sg->length)) { | |
e05ed4d1 AD |
564 | phys_addr_t map = swiotlb_tbl_map_single(hwdev, |
565 | start_dma_addr, | |
566 | sg_phys(sg), | |
567 | sg->length, | |
0443fa00 | 568 | dir, attrs); |
e05ed4d1 | 569 | if (map == SWIOTLB_MAP_ERROR) { |
783d0281 | 570 | dev_warn(hwdev, "swiotlb buffer is full\n"); |
b097186f KRW |
571 | /* Don't panic here, we expect map_sg users |
572 | to do proper error handling. */ | |
0443fa00 | 573 | attrs |= DMA_ATTR_SKIP_CPU_SYNC; |
b097186f KRW |
574 | xen_swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, |
575 | attrs); | |
781575cd | 576 | sg_dma_len(sgl) = 0; |
15177608 | 577 | return 0; |
b097186f | 578 | } |
f1225ee4 | 579 | dev_addr = xen_phys_to_bus(map); |
71bfae90 | 580 | xen_dma_map_page(hwdev, pfn_to_page(map >> PAGE_SHIFT), |
a0f2dee0 | 581 | dev_addr, |
71bfae90 SS |
582 | map & ~PAGE_MASK, |
583 | sg->length, | |
584 | dir, | |
585 | attrs); | |
f1225ee4 | 586 | sg->dma_address = dev_addr; |
6cf05463 SS |
587 | } else { |
588 | /* we are not interested in the dma_addr returned by | |
589 | * xen_dma_map_page, only in the potential cache flushes executed | |
590 | * by the function. */ | |
591 | xen_dma_map_page(hwdev, pfn_to_page(paddr >> PAGE_SHIFT), | |
a0f2dee0 | 592 | dev_addr, |
6cf05463 SS |
593 | paddr & ~PAGE_MASK, |
594 | sg->length, | |
595 | dir, | |
596 | attrs); | |
b097186f | 597 | sg->dma_address = dev_addr; |
6cf05463 | 598 | } |
781575cd | 599 | sg_dma_len(sg) = sg->length; |
b097186f KRW |
600 | } |
601 | return nelems; | |
602 | } | |
b097186f | 603 | |
b097186f KRW |
604 | /* |
605 | * Make physical memory consistent for a set of streaming mode DMA translations | |
606 | * after a transfer. | |
607 | * | |
608 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules | |
609 | * and usage. | |
610 | */ | |
611 | static void | |
612 | xen_swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, | |
613 | int nelems, enum dma_data_direction dir, | |
614 | enum dma_sync_target target) | |
615 | { | |
616 | struct scatterlist *sg; | |
617 | int i; | |
618 | ||
619 | for_each_sg(sgl, sg, nelems, i) | |
620 | xen_swiotlb_sync_single(hwdev, sg->dma_address, | |
781575cd | 621 | sg_dma_len(sg), dir, target); |
b097186f KRW |
622 | } |
623 | ||
dceb1a68 | 624 | static void |
b097186f KRW |
625 | xen_swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, |
626 | int nelems, enum dma_data_direction dir) | |
627 | { | |
628 | xen_swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); | |
629 | } | |
b097186f | 630 | |
dceb1a68 | 631 | static void |
b097186f KRW |
632 | xen_swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, |
633 | int nelems, enum dma_data_direction dir) | |
634 | { | |
635 | xen_swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); | |
636 | } | |
b097186f | 637 | |
b097186f KRW |
638 | /* |
639 | * Return whether the given device DMA address mask can be supported | |
640 | * properly. For example, if your device can only drive the low 24-bits | |
641 | * during bus mastering, then you would pass 0x00ffffff as the mask to | |
642 | * this function. | |
643 | */ | |
dceb1a68 | 644 | static int |
b097186f KRW |
645 | xen_swiotlb_dma_supported(struct device *hwdev, u64 mask) |
646 | { | |
647 | return xen_virt_to_bus(xen_io_tlb_end - 1) <= mask; | |
648 | } | |
eb1ddc00 | 649 | |
7e91c7df SS |
650 | /* |
651 | * Create userspace mapping for the DMA-coherent memory. | |
652 | * This function should be called with the pages from the current domain only, | |
653 | * passing pages mapped from other domains would lead to memory corruption. | |
654 | */ | |
dceb1a68 | 655 | static int |
7e91c7df SS |
656 | xen_swiotlb_dma_mmap(struct device *dev, struct vm_area_struct *vma, |
657 | void *cpu_addr, dma_addr_t dma_addr, size_t size, | |
658 | unsigned long attrs) | |
659 | { | |
660 | #if defined(CONFIG_ARM) || defined(CONFIG_ARM64) | |
d5ff5061 SS |
661 | if (xen_get_dma_ops(dev)->mmap) |
662 | return xen_get_dma_ops(dev)->mmap(dev, vma, cpu_addr, | |
7e91c7df SS |
663 | dma_addr, size, attrs); |
664 | #endif | |
665 | return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size); | |
666 | } | |
69369f52 AA |
667 | |
668 | /* | |
669 | * This function should be called with the pages from the current domain only, | |
670 | * passing pages mapped from other domains would lead to memory corruption. | |
671 | */ | |
dceb1a68 | 672 | static int |
69369f52 AA |
673 | xen_swiotlb_get_sgtable(struct device *dev, struct sg_table *sgt, |
674 | void *cpu_addr, dma_addr_t handle, size_t size, | |
675 | unsigned long attrs) | |
676 | { | |
677 | #if defined(CONFIG_ARM) || defined(CONFIG_ARM64) | |
d5ff5061 | 678 | if (xen_get_dma_ops(dev)->get_sgtable) { |
69369f52 AA |
679 | #if 0 |
680 | /* | |
681 | * This check verifies that the page belongs to the current domain and | |
682 | * is not one mapped from another domain. | |
683 | * This check is for debug only, and should not go to production build | |
684 | */ | |
685 | unsigned long bfn = PHYS_PFN(dma_to_phys(dev, handle)); | |
686 | BUG_ON (!page_is_ram(bfn)); | |
687 | #endif | |
d5ff5061 | 688 | return xen_get_dma_ops(dev)->get_sgtable(dev, sgt, cpu_addr, |
69369f52 AA |
689 | handle, size, attrs); |
690 | } | |
691 | #endif | |
692 | return dma_common_get_sgtable(dev, sgt, cpu_addr, handle, size); | |
693 | } | |
dceb1a68 | 694 | |
4d048dbc CH |
695 | static int xen_swiotlb_mapping_error(struct device *dev, dma_addr_t dma_addr) |
696 | { | |
697 | return dma_addr == XEN_SWIOTLB_ERROR_CODE; | |
698 | } | |
699 | ||
dceb1a68 CH |
700 | const struct dma_map_ops xen_swiotlb_dma_ops = { |
701 | .alloc = xen_swiotlb_alloc_coherent, | |
702 | .free = xen_swiotlb_free_coherent, | |
703 | .sync_single_for_cpu = xen_swiotlb_sync_single_for_cpu, | |
704 | .sync_single_for_device = xen_swiotlb_sync_single_for_device, | |
705 | .sync_sg_for_cpu = xen_swiotlb_sync_sg_for_cpu, | |
706 | .sync_sg_for_device = xen_swiotlb_sync_sg_for_device, | |
707 | .map_sg = xen_swiotlb_map_sg_attrs, | |
708 | .unmap_sg = xen_swiotlb_unmap_sg_attrs, | |
709 | .map_page = xen_swiotlb_map_page, | |
710 | .unmap_page = xen_swiotlb_unmap_page, | |
711 | .dma_supported = xen_swiotlb_dma_supported, | |
dceb1a68 CH |
712 | .mmap = xen_swiotlb_dma_mmap, |
713 | .get_sgtable = xen_swiotlb_get_sgtable, | |
4d048dbc | 714 | .mapping_error = xen_swiotlb_mapping_error, |
dceb1a68 | 715 | }; |