Merge tag 'x86_core_for_v5.17_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-block.git] / drivers / xen / swiotlb-xen.c
CommitLineData
d9523678 1// SPDX-License-Identifier: GPL-2.0-only
b097186f
KRW
2/*
3 * Copyright 2010
4 * by Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
5 *
6 * This code provides a IOMMU for Xen PV guests with PCI passthrough.
7 *
b097186f
KRW
8 * PV guests under Xen are running in an non-contiguous memory architecture.
9 *
10 * When PCI pass-through is utilized, this necessitates an IOMMU for
11 * translating bus (DMA) to virtual and vice-versa and also providing a
12 * mechanism to have contiguous pages for device drivers operations (say DMA
13 * operations).
14 *
15 * Specifically, under Xen the Linux idea of pages is an illusion. It
16 * assumes that pages start at zero and go up to the available memory. To
17 * help with that, the Linux Xen MMU provides a lookup mechanism to
18 * translate the page frame numbers (PFN) to machine frame numbers (MFN)
19 * and vice-versa. The MFN are the "real" frame numbers. Furthermore
20 * memory is not contiguous. Xen hypervisor stitches memory for guests
21 * from different pools, which means there is no guarantee that PFN==MFN
22 * and PFN+1==MFN+1. Lastly with Xen 4.0, pages (in debug mode) are
23 * allocated in descending order (high to low), meaning the guest might
24 * never get any MFN's under the 4GB mark.
b097186f
KRW
25 */
26
283c0972
JP
27#define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
28
2013288f 29#include <linux/memblock.h>
ea8c64ac 30#include <linux/dma-direct.h>
9f4df96b 31#include <linux/dma-map-ops.h>
63c9744b 32#include <linux/export.h>
b097186f
KRW
33#include <xen/swiotlb-xen.h>
34#include <xen/page.h>
35#include <xen/xen-ops.h>
f4b2f07b 36#include <xen/hvc-console.h>
2b2b614d 37
83862ccf 38#include <asm/dma-mapping.h>
1b65c4e5 39#include <asm/xen/page-coherent.h>
e1d8f62a 40
2b2b614d 41#include <trace/events/swiotlb.h>
e6fa0dc8 42#define MAX_DMA_BITS 32
b097186f 43
b097186f
KRW
44/*
45 * Quick lookup value of the bus address of the IOTLB.
46 */
47
91ffe4ad 48static inline phys_addr_t xen_phys_to_bus(struct device *dev, phys_addr_t paddr)
b097186f 49{
9435cce8 50 unsigned long bfn = pfn_to_bfn(XEN_PFN_DOWN(paddr));
91ffe4ad 51 phys_addr_t baddr = (phys_addr_t)bfn << XEN_PAGE_SHIFT;
e17b2f11 52
91ffe4ad
SS
53 baddr |= paddr & ~XEN_PAGE_MASK;
54 return baddr;
55}
e17b2f11 56
91ffe4ad
SS
57static inline dma_addr_t xen_phys_to_dma(struct device *dev, phys_addr_t paddr)
58{
59 return phys_to_dma(dev, xen_phys_to_bus(dev, paddr));
b097186f
KRW
60}
61
91ffe4ad
SS
62static inline phys_addr_t xen_bus_to_phys(struct device *dev,
63 phys_addr_t baddr)
b097186f 64{
9435cce8 65 unsigned long xen_pfn = bfn_to_pfn(XEN_PFN_DOWN(baddr));
91ffe4ad
SS
66 phys_addr_t paddr = (xen_pfn << XEN_PAGE_SHIFT) |
67 (baddr & ~XEN_PAGE_MASK);
e17b2f11
IC
68
69 return paddr;
b097186f
KRW
70}
71
91ffe4ad
SS
72static inline phys_addr_t xen_dma_to_phys(struct device *dev,
73 dma_addr_t dma_addr)
74{
75 return xen_bus_to_phys(dev, dma_to_phys(dev, dma_addr));
76}
77
bf707266 78static inline int range_straddles_page_boundary(phys_addr_t p, size_t size)
b097186f 79{
bf707266
JG
80 unsigned long next_bfn, xen_pfn = XEN_PFN_DOWN(p);
81 unsigned int i, nr_pages = XEN_PFN_UP(xen_offset_in_page(p) + size);
b097186f 82
9435cce8 83 next_bfn = pfn_to_bfn(xen_pfn);
b097186f 84
bf707266 85 for (i = 1; i < nr_pages; i++)
9435cce8 86 if (pfn_to_bfn(++xen_pfn) != ++next_bfn)
bf707266 87 return 1;
b097186f 88
bf707266 89 return 0;
b097186f
KRW
90}
91
38ba51de 92static int is_xen_swiotlb_buffer(struct device *dev, dma_addr_t dma_addr)
b097186f 93{
91ffe4ad 94 unsigned long bfn = XEN_PFN_DOWN(dma_to_phys(dev, dma_addr));
9435cce8 95 unsigned long xen_pfn = bfn_to_local_pfn(bfn);
e9aab7e4 96 phys_addr_t paddr = (phys_addr_t)xen_pfn << XEN_PAGE_SHIFT;
b097186f
KRW
97
98 /* If the address is outside our domain, it CAN
99 * have the same virtual address as another address
100 * in our domain. Therefore _only_ check address within our domain.
101 */
16bc75f3 102 if (pfn_valid(PFN_DOWN(paddr)))
7fd856aa 103 return is_swiotlb_buffer(dev, paddr);
b097186f
KRW
104 return 0;
105}
106
6bcd4ea7 107static int xen_swiotlb_fixup(void *buf, unsigned long nslabs)
b097186f 108{
d9a688ad
JB
109 int rc;
110 unsigned int order = get_order(IO_TLB_SEGSIZE << IO_TLB_SHIFT);
111 unsigned int i, dma_bits = order + PAGE_SHIFT;
69908907 112 dma_addr_t dma_handle;
1b65c4e5 113 phys_addr_t p = virt_to_phys(buf);
b097186f 114
d9a688ad
JB
115 BUILD_BUG_ON(IO_TLB_SEGSIZE & (IO_TLB_SEGSIZE - 1));
116 BUG_ON(nslabs % IO_TLB_SEGSIZE);
b097186f
KRW
117
118 i = 0;
119 do {
b097186f
KRW
120 do {
121 rc = xen_create_contiguous_region(
d9a688ad 122 p + (i << IO_TLB_SHIFT), order,
69908907 123 dma_bits, &dma_handle);
e6fa0dc8 124 } while (rc && dma_bits++ < MAX_DMA_BITS);
b097186f
KRW
125 if (rc)
126 return rc;
127
d9a688ad 128 i += IO_TLB_SEGSIZE;
b097186f
KRW
129 } while (i < nslabs);
130 return 0;
131}
132
5bab7864
KRW
133enum xen_swiotlb_err {
134 XEN_SWIOTLB_UNKNOWN = 0,
135 XEN_SWIOTLB_ENOMEM,
136 XEN_SWIOTLB_EFIXUP
137};
138
139static const char *xen_swiotlb_error(enum xen_swiotlb_err err)
140{
141 switch (err) {
142 case XEN_SWIOTLB_ENOMEM:
143 return "Cannot allocate Xen-SWIOTLB buffer\n";
144 case XEN_SWIOTLB_EFIXUP:
145 return "Failed to get contiguous memory for DMA from Xen!\n"\
146 "You either: don't have the permissions, do not have"\
147 " enough free memory under 4GB, or the hypervisor memory"\
148 " is too fragmented!";
149 default:
150 break;
151 }
152 return "";
153}
4035b43d 154
68573c1b 155int xen_swiotlb_init(void)
b097186f 156{
5bab7864 157 enum xen_swiotlb_err m_ret = XEN_SWIOTLB_UNKNOWN;
2d29960a
CH
158 unsigned long bytes = swiotlb_size_or_default();
159 unsigned long nslabs = bytes >> IO_TLB_SHIFT;
160 unsigned int order, repeat = 3;
a98f5654 161 int rc = -ENOMEM;
cbce9952 162 char *start;
5f98ecdb 163
463e862a 164 if (io_tlb_default_mem.nslabs) {
97729b65
SS
165 pr_warn("swiotlb buffer already initialized\n");
166 return -EEXIST;
167 }
168
a98f5654
CH
169retry:
170 m_ret = XEN_SWIOTLB_ENOMEM;
4035b43d 171 order = get_order(bytes);
4e7372e0 172
b097186f
KRW
173 /*
174 * Get IO TLB memory from any location.
175 */
b8277600
KRW
176#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
177#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
a98f5654
CH
178 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
179 start = (void *)xen_get_swiotlb_free_pages(order);
180 if (start)
181 break;
182 order--;
b8277600 183 }
a98f5654 184 if (!start)
79ca5f77 185 goto exit;
a98f5654
CH
186 if (order != get_order(bytes)) {
187 pr_warn("Warning: only able to allocate %ld MB for software IO TLB\n",
188 (PAGE_SIZE << order) >> 20);
189 nslabs = SLABS_PER_PAGE << order;
190 bytes = nslabs << IO_TLB_SHIFT;
f4b2f07b 191 }
a98f5654 192
b097186f
KRW
193 /*
194 * And replace that memory with pages under 4GB.
195 */
6bcd4ea7 196 rc = xen_swiotlb_fixup(start, nslabs);
f4b2f07b 197 if (rc) {
a98f5654 198 free_pages((unsigned long)start, order);
5bab7864 199 m_ret = XEN_SWIOTLB_EFIXUP;
b097186f 200 goto error;
f4b2f07b 201 }
a98f5654
CH
202 rc = swiotlb_late_init_with_tbl(start, nslabs);
203 if (rc)
204 return rc;
205 swiotlb_set_max_segment(PAGE_SIZE);
206 return 0;
b097186f 207error:
cabb7f89 208 if (nslabs > 1024 && repeat--) {
a98f5654 209 /* Min is 2MB */
d9a688ad 210 nslabs = max(1024UL, ALIGN(nslabs >> 1, IO_TLB_SEGSIZE));
4c092c59
JB
211 bytes = nslabs << IO_TLB_SHIFT;
212 pr_info("Lowering to %luMB\n", bytes >> 20);
f4b2f07b
KRW
213 goto retry;
214 }
79ca5f77 215exit:
283c0972 216 pr_err("%s (rc:%d)\n", xen_swiotlb_error(m_ret), rc);
b8277600 217 return rc;
b097186f 218}
dceb1a68 219
a98f5654
CH
220#ifdef CONFIG_X86
221void __init xen_swiotlb_init_early(void)
222{
2d29960a
CH
223 unsigned long bytes = swiotlb_size_or_default();
224 unsigned long nslabs = bytes >> IO_TLB_SHIFT;
a98f5654
CH
225 unsigned int repeat = 3;
226 char *start;
227 int rc;
228
a98f5654
CH
229retry:
230 /*
231 * Get IO TLB memory from any location.
232 */
9074c79b
JB
233 start = memblock_alloc(PAGE_ALIGN(bytes),
234 IO_TLB_SEGSIZE << IO_TLB_SHIFT);
a98f5654 235 if (!start)
9074c79b
JB
236 panic("%s: Failed to allocate %lu bytes\n",
237 __func__, PAGE_ALIGN(bytes));
a98f5654
CH
238
239 /*
240 * And replace that memory with pages under 4GB.
241 */
6bcd4ea7 242 rc = xen_swiotlb_fixup(start, nslabs);
a98f5654 243 if (rc) {
4421cca0 244 memblock_free(start, PAGE_ALIGN(bytes));
cabb7f89 245 if (nslabs > 1024 && repeat--) {
a98f5654 246 /* Min is 2MB */
d9a688ad 247 nslabs = max(1024UL, ALIGN(nslabs >> 1, IO_TLB_SEGSIZE));
2d29960a
CH
248 bytes = nslabs << IO_TLB_SHIFT;
249 pr_info("Lowering to %luMB\n", bytes >> 20);
a98f5654
CH
250 goto retry;
251 }
252 panic("%s (rc:%d)", xen_swiotlb_error(XEN_SWIOTLB_EFIXUP), rc);
253 }
254
7fd880a3 255 if (swiotlb_init_with_tbl(start, nslabs, true))
a98f5654
CH
256 panic("Cannot allocate SWIOTLB buffer");
257 swiotlb_set_max_segment(PAGE_SIZE);
258}
259#endif /* CONFIG_X86 */
260
dceb1a68 261static void *
b097186f 262xen_swiotlb_alloc_coherent(struct device *hwdev, size_t size,
baa676fc 263 dma_addr_t *dma_handle, gfp_t flags,
00085f1e 264 unsigned long attrs)
b097186f
KRW
265{
266 void *ret;
267 int order = get_order(size);
268 u64 dma_mask = DMA_BIT_MASK(32);
6810df88
KRW
269 phys_addr_t phys;
270 dma_addr_t dev_addr;
b097186f
KRW
271
272 /*
273 * Ignore region specifiers - the kernel's ideas of
274 * pseudo-phys memory layout has nothing to do with the
275 * machine physical layout. We can't allocate highmem
276 * because we can't return a pointer to it.
277 */
278 flags &= ~(__GFP_DMA | __GFP_HIGHMEM);
279
7250f422
JJ
280 /* Convert the size to actually allocated. */
281 size = 1UL << (order + XEN_PAGE_SHIFT);
282
1b65c4e5
SS
283 /* On ARM this function returns an ioremap'ped virtual address for
284 * which virt_to_phys doesn't return the corresponding physical
285 * address. In fact on ARM virt_to_phys only works for kernel direct
286 * mapped RAM memory. Also see comment below.
287 */
288 ret = xen_alloc_coherent_pages(hwdev, size, dma_handle, flags, attrs);
b097186f 289
6810df88
KRW
290 if (!ret)
291 return ret;
292
b097186f 293 if (hwdev && hwdev->coherent_dma_mask)
038d07a2 294 dma_mask = hwdev->coherent_dma_mask;
b097186f 295
91ffe4ad 296 /* At this point dma_handle is the dma address, next we are
1b65c4e5
SS
297 * going to set it to the machine address.
298 * Do not use virt_to_phys(ret) because on ARM it doesn't correspond
299 * to *dma_handle. */
91ffe4ad
SS
300 phys = dma_to_phys(hwdev, *dma_handle);
301 dev_addr = xen_phys_to_dma(hwdev, phys);
6810df88
KRW
302 if (((dev_addr + size - 1 <= dma_mask)) &&
303 !range_straddles_page_boundary(phys, size))
304 *dma_handle = dev_addr;
305 else {
1b65c4e5 306 if (xen_create_contiguous_region(phys, order,
69908907 307 fls64(dma_mask), dma_handle) != 0) {
1b65c4e5 308 xen_free_coherent_pages(hwdev, size, ret, (dma_addr_t)phys, attrs);
b097186f
KRW
309 return NULL;
310 }
91ffe4ad 311 *dma_handle = phys_to_dma(hwdev, *dma_handle);
b877ac98 312 SetPageXenRemapped(virt_to_page(ret));
b097186f 313 }
6810df88 314 memset(ret, 0, size);
b097186f
KRW
315 return ret;
316}
b097186f 317
dceb1a68 318static void
b097186f 319xen_swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
00085f1e 320 dma_addr_t dev_addr, unsigned long attrs)
b097186f
KRW
321{
322 int order = get_order(size);
6810df88
KRW
323 phys_addr_t phys;
324 u64 dma_mask = DMA_BIT_MASK(32);
8b1e868f 325 struct page *page;
b097186f 326
6810df88
KRW
327 if (hwdev && hwdev->coherent_dma_mask)
328 dma_mask = hwdev->coherent_dma_mask;
329
1b65c4e5
SS
330 /* do not use virt_to_phys because on ARM it doesn't return you the
331 * physical address */
91ffe4ad 332 phys = xen_dma_to_phys(hwdev, dev_addr);
6810df88 333
7250f422
JJ
334 /* Convert the size to actually allocated. */
335 size = 1UL << (order + XEN_PAGE_SHIFT);
336
8b1e868f
BO
337 if (is_vmalloc_addr(vaddr))
338 page = vmalloc_to_page(vaddr);
339 else
340 page = virt_to_page(vaddr);
341
50f6393f 342 if (!WARN_ON((dev_addr + size - 1 > dma_mask) ||
b877ac98 343 range_straddles_page_boundary(phys, size)) &&
8b1e868f 344 TestClearPageXenRemapped(page))
1b65c4e5 345 xen_destroy_contiguous_region(phys, order);
6810df88 346
91ffe4ad
SS
347 xen_free_coherent_pages(hwdev, size, vaddr, phys_to_dma(hwdev, phys),
348 attrs);
b097186f 349}
b097186f
KRW
350
351/*
352 * Map a single buffer of the indicated size for DMA in streaming mode. The
353 * physical address to use is returned.
354 *
355 * Once the device is given the dma address, the device owns this memory until
356 * either xen_swiotlb_unmap_page or xen_swiotlb_dma_sync_single is performed.
357 */
dceb1a68 358static dma_addr_t xen_swiotlb_map_page(struct device *dev, struct page *page,
b097186f
KRW
359 unsigned long offset, size_t size,
360 enum dma_data_direction dir,
00085f1e 361 unsigned long attrs)
b097186f 362{
e05ed4d1 363 phys_addr_t map, phys = page_to_phys(page) + offset;
91ffe4ad 364 dma_addr_t dev_addr = xen_phys_to_dma(dev, phys);
b097186f
KRW
365
366 BUG_ON(dir == DMA_NONE);
367 /*
368 * If the address happens to be in the device's DMA window,
369 * we can safely return the device addr and not worry about bounce
370 * buffering it.
371 */
68a33b17 372 if (dma_capable(dev, dev_addr, size, true) &&
a4dba130 373 !range_straddles_page_boundary(phys, size) &&
291be10f 374 !xen_arch_need_swiotlb(dev, phys, dev_addr) &&
903cd0f3 375 !is_swiotlb_force_bounce(dev))
063b8271 376 goto done;
b097186f
KRW
377
378 /*
379 * Oh well, have to allocate and map a bounce buffer.
380 */
2b2b614d
ZK
381 trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force);
382
e81e99ba 383 map = swiotlb_tbl_map_single(dev, phys, size, size, 0, dir, attrs);
9c106119 384 if (map == (phys_addr_t)DMA_MAPPING_ERROR)
a4abe0ad 385 return DMA_MAPPING_ERROR;
b097186f 386
b4dca151 387 phys = map;
91ffe4ad 388 dev_addr = xen_phys_to_dma(dev, map);
b097186f
KRW
389
390 /*
391 * Ensure that the address returned is DMA'ble
392 */
68a33b17 393 if (unlikely(!dma_capable(dev, dev_addr, size, true))) {
2973073a 394 swiotlb_tbl_unmap_single(dev, map, size, dir,
063b8271
CH
395 attrs | DMA_ATTR_SKIP_CPU_SYNC);
396 return DMA_MAPPING_ERROR;
397 }
76418421 398
063b8271 399done:
63f0620c
SS
400 if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) {
401 if (pfn_valid(PFN_DOWN(dma_to_phys(dev, dev_addr))))
402 arch_sync_dma_for_device(phys, size, dir);
403 else
404 xen_dma_sync_for_device(dev, dev_addr, size, dir);
405 }
063b8271 406 return dev_addr;
b097186f 407}
b097186f
KRW
408
409/*
410 * Unmap a single streaming mode DMA translation. The dma_addr and size must
411 * match what was provided for in a previous xen_swiotlb_map_page call. All
412 * other usages are undefined.
413 *
414 * After this call, reads by the cpu to the buffer are guaranteed to see
415 * whatever the device wrote there.
416 */
bf7954e7
CH
417static void xen_swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
418 size_t size, enum dma_data_direction dir, unsigned long attrs)
b097186f 419{
91ffe4ad 420 phys_addr_t paddr = xen_dma_to_phys(hwdev, dev_addr);
b097186f
KRW
421
422 BUG_ON(dir == DMA_NONE);
423
63f0620c
SS
424 if (!dev_is_dma_coherent(hwdev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) {
425 if (pfn_valid(PFN_DOWN(dma_to_phys(hwdev, dev_addr))))
426 arch_sync_dma_for_cpu(paddr, size, dir);
427 else
428 xen_dma_sync_for_cpu(hwdev, dev_addr, size, dir);
429 }
6cf05463 430
b097186f 431 /* NOTE: We use dev_addr here, not paddr! */
38ba51de 432 if (is_xen_swiotlb_buffer(hwdev, dev_addr))
2973073a 433 swiotlb_tbl_unmap_single(hwdev, paddr, size, dir, attrs);
b097186f
KRW
434}
435
b097186f 436static void
2e12dcee
CH
437xen_swiotlb_sync_single_for_cpu(struct device *dev, dma_addr_t dma_addr,
438 size_t size, enum dma_data_direction dir)
b097186f 439{
91ffe4ad 440 phys_addr_t paddr = xen_dma_to_phys(dev, dma_addr);
6cf05463 441
63f0620c
SS
442 if (!dev_is_dma_coherent(dev)) {
443 if (pfn_valid(PFN_DOWN(dma_to_phys(dev, dma_addr))))
444 arch_sync_dma_for_cpu(paddr, size, dir);
445 else
446 xen_dma_sync_for_cpu(dev, dma_addr, size, dir);
447 }
6cf05463 448
38ba51de 449 if (is_xen_swiotlb_buffer(dev, dma_addr))
80808d27 450 swiotlb_sync_single_for_cpu(dev, paddr, size, dir);
b097186f
KRW
451}
452
2e12dcee
CH
453static void
454xen_swiotlb_sync_single_for_device(struct device *dev, dma_addr_t dma_addr,
455 size_t size, enum dma_data_direction dir)
b097186f 456{
91ffe4ad 457 phys_addr_t paddr = xen_dma_to_phys(dev, dma_addr);
b097186f 458
38ba51de 459 if (is_xen_swiotlb_buffer(dev, dma_addr))
80808d27 460 swiotlb_sync_single_for_device(dev, paddr, size, dir);
2e12dcee 461
63f0620c
SS
462 if (!dev_is_dma_coherent(dev)) {
463 if (pfn_valid(PFN_DOWN(dma_to_phys(dev, dma_addr))))
464 arch_sync_dma_for_device(paddr, size, dir);
465 else
466 xen_dma_sync_for_device(dev, dma_addr, size, dir);
467 }
b097186f 468}
dceb1a68
CH
469
470/*
471 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
472 * concerning calls here are the same as for swiotlb_unmap_page() above.
473 */
474static void
aca351cc
CH
475xen_swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
476 enum dma_data_direction dir, unsigned long attrs)
dceb1a68
CH
477{
478 struct scatterlist *sg;
479 int i;
480
481 BUG_ON(dir == DMA_NONE);
482
483 for_each_sg(sgl, sg, nelems, i)
bf7954e7
CH
484 xen_swiotlb_unmap_page(hwdev, sg->dma_address, sg_dma_len(sg),
485 dir, attrs);
dceb1a68
CH
486
487}
b097186f 488
dceb1a68 489static int
8b35d9fe 490xen_swiotlb_map_sg(struct device *dev, struct scatterlist *sgl, int nelems,
aca351cc 491 enum dma_data_direction dir, unsigned long attrs)
b097186f
KRW
492{
493 struct scatterlist *sg;
494 int i;
495
496 BUG_ON(dir == DMA_NONE);
497
498 for_each_sg(sgl, sg, nelems, i) {
8b35d9fe
CH
499 sg->dma_address = xen_swiotlb_map_page(dev, sg_page(sg),
500 sg->offset, sg->length, dir, attrs);
501 if (sg->dma_address == DMA_MAPPING_ERROR)
502 goto out_unmap;
781575cd 503 sg_dma_len(sg) = sg->length;
b097186f 504 }
8b35d9fe 505
b097186f 506 return nelems;
8b35d9fe
CH
507out_unmap:
508 xen_swiotlb_unmap_sg(dev, sgl, i, dir, attrs | DMA_ATTR_SKIP_CPU_SYNC);
509 sg_dma_len(sgl) = 0;
2c647ebe 510 return -EIO;
b097186f 511}
b097186f 512
b097186f 513static void
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514xen_swiotlb_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl,
515 int nelems, enum dma_data_direction dir)
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516{
517 struct scatterlist *sg;
518 int i;
519
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520 for_each_sg(sgl, sg, nelems, i) {
521 xen_swiotlb_sync_single_for_cpu(dev, sg->dma_address,
522 sg->length, dir);
523 }
b097186f 524}
b097186f 525
dceb1a68 526static void
2e12dcee 527xen_swiotlb_sync_sg_for_device(struct device *dev, struct scatterlist *sgl,
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528 int nelems, enum dma_data_direction dir)
529{
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530 struct scatterlist *sg;
531 int i;
532
533 for_each_sg(sgl, sg, nelems, i) {
534 xen_swiotlb_sync_single_for_device(dev, sg->dma_address,
535 sg->length, dir);
536 }
b097186f 537}
b097186f 538
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539/*
540 * Return whether the given device DMA address mask can be supported
541 * properly. For example, if your device can only drive the low 24-bits
542 * during bus mastering, then you would pass 0x00ffffff as the mask to
543 * this function.
544 */
dceb1a68 545static int
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546xen_swiotlb_dma_supported(struct device *hwdev, u64 mask)
547{
463e862a 548 return xen_phys_to_dma(hwdev, io_tlb_default_mem.end - 1) <= mask;
b097186f 549}
eb1ddc00 550
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551const struct dma_map_ops xen_swiotlb_dma_ops = {
552 .alloc = xen_swiotlb_alloc_coherent,
553 .free = xen_swiotlb_free_coherent,
554 .sync_single_for_cpu = xen_swiotlb_sync_single_for_cpu,
555 .sync_single_for_device = xen_swiotlb_sync_single_for_device,
556 .sync_sg_for_cpu = xen_swiotlb_sync_sg_for_cpu,
557 .sync_sg_for_device = xen_swiotlb_sync_sg_for_device,
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558 .map_sg = xen_swiotlb_map_sg,
559 .unmap_sg = xen_swiotlb_unmap_sg,
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560 .map_page = xen_swiotlb_map_page,
561 .unmap_page = xen_swiotlb_unmap_page,
562 .dma_supported = xen_swiotlb_dma_supported,
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563 .mmap = dma_common_mmap,
564 .get_sgtable = dma_common_get_sgtable,
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565 .alloc_pages = dma_common_alloc_pages,
566 .free_pages = dma_common_free_pages,
dceb1a68 567};