Commit | Line | Data |
---|---|---|
2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
b4cc4aa2 JMG |
2 | /* |
3 | * W83977F Watchdog Timer Driver for Winbond W83977F I/O Chip | |
4 | * | |
5 | * (c) Copyright 2005 Jose Goncalves <jose.goncalves@inov.pt> | |
6 | * | |
7 | * Based on w83877f_wdt.c by Scott Jennings, | |
8 | * and wdt977.c by Woody Suwalski | |
9 | * | |
10 | * ----------------------- | |
b4cc4aa2 JMG |
11 | */ |
12 | ||
27c766aa JP |
13 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
14 | ||
b4cc4aa2 JMG |
15 | #include <linux/module.h> |
16 | #include <linux/moduleparam.h> | |
b4cc4aa2 JMG |
17 | #include <linux/types.h> |
18 | #include <linux/kernel.h> | |
19 | #include <linux/fs.h> | |
20 | #include <linux/miscdevice.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/ioport.h> | |
23 | #include <linux/watchdog.h> | |
24 | #include <linux/notifier.h> | |
25 | #include <linux/reboot.h> | |
84af401a AC |
26 | #include <linux/uaccess.h> |
27 | #include <linux/io.h> | |
b4cc4aa2 | 28 | |
b4cc4aa2 JMG |
29 | |
30 | #define WATCHDOG_VERSION "1.00" | |
31 | #define WATCHDOG_NAME "W83977F WDT" | |
b4cc4aa2 JMG |
32 | |
33 | #define IO_INDEX_PORT 0x3F0 | |
34 | #define IO_DATA_PORT (IO_INDEX_PORT+1) | |
35 | ||
36 | #define UNLOCK_DATA 0x87 | |
37 | #define LOCK_DATA 0xAA | |
38 | #define DEVICE_REGISTER 0x07 | |
39 | ||
40 | #define DEFAULT_TIMEOUT 45 /* default timeout in seconds */ | |
41 | ||
42 | static int timeout = DEFAULT_TIMEOUT; | |
43 | static int timeoutW; /* timeout in watchdog counter units */ | |
44 | static unsigned long timer_alive; | |
45 | static int testmode; | |
46 | static char expect_close; | |
c7dfd0cc | 47 | static DEFINE_SPINLOCK(spinlock); |
b4cc4aa2 JMG |
48 | |
49 | module_param(timeout, int, 0); | |
84af401a AC |
50 | MODULE_PARM_DESC(timeout, |
51 | "Watchdog timeout in seconds (15..7635), default=" | |
52 | __MODULE_STRING(DEFAULT_TIMEOUT) ")"); | |
b4cc4aa2 | 53 | module_param(testmode, int, 0); |
84af401a | 54 | MODULE_PARM_DESC(testmode, "Watchdog testmode (1 = no reboot), default=0"); |
b4cc4aa2 | 55 | |
86a1e189 WVS |
56 | static bool nowayout = WATCHDOG_NOWAYOUT; |
57 | module_param(nowayout, bool, 0); | |
84af401a AC |
58 | MODULE_PARM_DESC(nowayout, |
59 | "Watchdog cannot be stopped once started (default=" | |
60 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
b4cc4aa2 JMG |
61 | |
62 | /* | |
63 | * Start the watchdog | |
64 | */ | |
65 | ||
66 | static int wdt_start(void) | |
67 | { | |
68 | unsigned long flags; | |
69 | ||
70 | spin_lock_irqsave(&spinlock, flags); | |
71 | ||
72 | /* Unlock the SuperIO chip */ | |
84af401a AC |
73 | outb_p(UNLOCK_DATA, IO_INDEX_PORT); |
74 | outb_p(UNLOCK_DATA, IO_INDEX_PORT); | |
b4cc4aa2 JMG |
75 | |
76 | /* | |
77 | * Select device Aux2 (device=8) to set watchdog regs F2, F3 and F4. | |
78 | * F2 has the timeout in watchdog counter units. | |
79 | * F3 is set to enable watchdog LED blink at timeout. | |
80 | * F4 is used to just clear the TIMEOUT'ed state (bit 0). | |
81 | */ | |
84af401a AC |
82 | outb_p(DEVICE_REGISTER, IO_INDEX_PORT); |
83 | outb_p(0x08, IO_DATA_PORT); | |
84 | outb_p(0xF2, IO_INDEX_PORT); | |
85 | outb_p(timeoutW, IO_DATA_PORT); | |
86 | outb_p(0xF3, IO_INDEX_PORT); | |
87 | outb_p(0x08, IO_DATA_PORT); | |
88 | outb_p(0xF4, IO_INDEX_PORT); | |
89 | outb_p(0x00, IO_DATA_PORT); | |
b4cc4aa2 JMG |
90 | |
91 | /* Set device Aux2 active */ | |
84af401a AC |
92 | outb_p(0x30, IO_INDEX_PORT); |
93 | outb_p(0x01, IO_DATA_PORT); | |
b4cc4aa2 | 94 | |
84af401a | 95 | /* |
b4cc4aa2 JMG |
96 | * Select device Aux1 (dev=7) to set GP16 as the watchdog output |
97 | * (in reg E6) and GP13 as the watchdog LED output (in reg E3). | |
98 | * Map GP16 at pin 119. | |
99 | * In test mode watch the bit 0 on F4 to indicate "triggered" or | |
100 | * check watchdog LED on SBC. | |
101 | */ | |
84af401a AC |
102 | outb_p(DEVICE_REGISTER, IO_INDEX_PORT); |
103 | outb_p(0x07, IO_DATA_PORT); | |
104 | if (!testmode) { | |
b4cc4aa2 JMG |
105 | unsigned pin_map; |
106 | ||
84af401a AC |
107 | outb_p(0xE6, IO_INDEX_PORT); |
108 | outb_p(0x0A, IO_DATA_PORT); | |
109 | outb_p(0x2C, IO_INDEX_PORT); | |
b4cc4aa2 JMG |
110 | pin_map = inb_p(IO_DATA_PORT); |
111 | pin_map |= 0x10; | |
112 | pin_map &= ~(0x20); | |
84af401a AC |
113 | outb_p(0x2C, IO_INDEX_PORT); |
114 | outb_p(pin_map, IO_DATA_PORT); | |
b4cc4aa2 | 115 | } |
84af401a AC |
116 | outb_p(0xE3, IO_INDEX_PORT); |
117 | outb_p(0x08, IO_DATA_PORT); | |
b4cc4aa2 JMG |
118 | |
119 | /* Set device Aux1 active */ | |
84af401a AC |
120 | outb_p(0x30, IO_INDEX_PORT); |
121 | outb_p(0x01, IO_DATA_PORT); | |
b4cc4aa2 JMG |
122 | |
123 | /* Lock the SuperIO chip */ | |
84af401a | 124 | outb_p(LOCK_DATA, IO_INDEX_PORT); |
b4cc4aa2 JMG |
125 | |
126 | spin_unlock_irqrestore(&spinlock, flags); | |
127 | ||
27c766aa | 128 | pr_info("activated\n"); |
b4cc4aa2 JMG |
129 | |
130 | return 0; | |
131 | } | |
132 | ||
133 | /* | |
134 | * Stop the watchdog | |
135 | */ | |
136 | ||
137 | static int wdt_stop(void) | |
138 | { | |
139 | unsigned long flags; | |
140 | ||
141 | spin_lock_irqsave(&spinlock, flags); | |
142 | ||
143 | /* Unlock the SuperIO chip */ | |
84af401a AC |
144 | outb_p(UNLOCK_DATA, IO_INDEX_PORT); |
145 | outb_p(UNLOCK_DATA, IO_INDEX_PORT); | |
b4cc4aa2 | 146 | |
84af401a | 147 | /* |
b4cc4aa2 JMG |
148 | * Select device Aux2 (device=8) to set watchdog regs F2, F3 and F4. |
149 | * F2 is reset to its default value (watchdog timer disabled). | |
150 | * F3 is reset to its default state. | |
151 | * F4 clears the TIMEOUT'ed state (bit 0) - back to default. | |
152 | */ | |
84af401a AC |
153 | outb_p(DEVICE_REGISTER, IO_INDEX_PORT); |
154 | outb_p(0x08, IO_DATA_PORT); | |
155 | outb_p(0xF2, IO_INDEX_PORT); | |
156 | outb_p(0xFF, IO_DATA_PORT); | |
157 | outb_p(0xF3, IO_INDEX_PORT); | |
158 | outb_p(0x00, IO_DATA_PORT); | |
159 | outb_p(0xF4, IO_INDEX_PORT); | |
160 | outb_p(0x00, IO_DATA_PORT); | |
161 | outb_p(0xF2, IO_INDEX_PORT); | |
162 | outb_p(0x00, IO_DATA_PORT); | |
b4cc4aa2 JMG |
163 | |
164 | /* | |
84af401a | 165 | * Select device Aux1 (dev=7) to set GP16 (in reg E6) and |
b4cc4aa2 JMG |
166 | * Gp13 (in reg E3) as inputs. |
167 | */ | |
84af401a AC |
168 | outb_p(DEVICE_REGISTER, IO_INDEX_PORT); |
169 | outb_p(0x07, IO_DATA_PORT); | |
170 | if (!testmode) { | |
171 | outb_p(0xE6, IO_INDEX_PORT); | |
172 | outb_p(0x01, IO_DATA_PORT); | |
b4cc4aa2 | 173 | } |
84af401a AC |
174 | outb_p(0xE3, IO_INDEX_PORT); |
175 | outb_p(0x01, IO_DATA_PORT); | |
b4cc4aa2 JMG |
176 | |
177 | /* Lock the SuperIO chip */ | |
84af401a | 178 | outb_p(LOCK_DATA, IO_INDEX_PORT); |
b4cc4aa2 JMG |
179 | |
180 | spin_unlock_irqrestore(&spinlock, flags); | |
181 | ||
27c766aa | 182 | pr_info("shutdown\n"); |
b4cc4aa2 JMG |
183 | |
184 | return 0; | |
185 | } | |
186 | ||
187 | /* | |
188 | * Send a keepalive ping to the watchdog | |
189 | * This is done by simply re-writing the timeout to reg. 0xF2 | |
190 | */ | |
191 | ||
192 | static int wdt_keepalive(void) | |
193 | { | |
194 | unsigned long flags; | |
195 | ||
196 | spin_lock_irqsave(&spinlock, flags); | |
197 | ||
198 | /* Unlock the SuperIO chip */ | |
84af401a AC |
199 | outb_p(UNLOCK_DATA, IO_INDEX_PORT); |
200 | outb_p(UNLOCK_DATA, IO_INDEX_PORT); | |
b4cc4aa2 JMG |
201 | |
202 | /* Select device Aux2 (device=8) to kick watchdog reg F2 */ | |
84af401a AC |
203 | outb_p(DEVICE_REGISTER, IO_INDEX_PORT); |
204 | outb_p(0x08, IO_DATA_PORT); | |
205 | outb_p(0xF2, IO_INDEX_PORT); | |
206 | outb_p(timeoutW, IO_DATA_PORT); | |
b4cc4aa2 JMG |
207 | |
208 | /* Lock the SuperIO chip */ | |
84af401a | 209 | outb_p(LOCK_DATA, IO_INDEX_PORT); |
b4cc4aa2 JMG |
210 | |
211 | spin_unlock_irqrestore(&spinlock, flags); | |
212 | ||
213 | return 0; | |
214 | } | |
215 | ||
216 | /* | |
217 | * Set the watchdog timeout value | |
218 | */ | |
219 | ||
220 | static int wdt_set_timeout(int t) | |
221 | { | |
62ed853c | 222 | unsigned int tmrval; |
b4cc4aa2 JMG |
223 | |
224 | /* | |
225 | * Convert seconds to watchdog counter time units, rounding up. | |
84af401a | 226 | * On PCM-5335 watchdog units are 30 seconds/step with 15 sec startup |
b4cc4aa2 JMG |
227 | * value. This information is supplied in the PCM-5335 manual and was |
228 | * checked by me on a real board. This is a bit strange because W83977f | |
229 | * datasheet says counter unit is in minutes! | |
230 | */ | |
231 | if (t < 15) | |
232 | return -EINVAL; | |
233 | ||
234 | tmrval = ((t + 15) + 29) / 30; | |
235 | ||
236 | if (tmrval > 255) | |
237 | return -EINVAL; | |
238 | ||
239 | /* | |
84af401a | 240 | * timeout is the timeout in seconds, |
b4cc4aa2 JMG |
241 | * timeoutW is the timeout in watchdog counter units. |
242 | */ | |
243 | timeoutW = tmrval; | |
244 | timeout = (timeoutW * 30) - 15; | |
245 | return 0; | |
246 | } | |
247 | ||
248 | /* | |
249 | * Get the watchdog status | |
250 | */ | |
251 | ||
252 | static int wdt_get_status(int *status) | |
253 | { | |
254 | int new_status; | |
255 | unsigned long flags; | |
256 | ||
257 | spin_lock_irqsave(&spinlock, flags); | |
258 | ||
259 | /* Unlock the SuperIO chip */ | |
84af401a AC |
260 | outb_p(UNLOCK_DATA, IO_INDEX_PORT); |
261 | outb_p(UNLOCK_DATA, IO_INDEX_PORT); | |
b4cc4aa2 JMG |
262 | |
263 | /* Select device Aux2 (device=8) to read watchdog reg F4 */ | |
84af401a AC |
264 | outb_p(DEVICE_REGISTER, IO_INDEX_PORT); |
265 | outb_p(0x08, IO_DATA_PORT); | |
266 | outb_p(0xF4, IO_INDEX_PORT); | |
b4cc4aa2 JMG |
267 | new_status = inb_p(IO_DATA_PORT); |
268 | ||
269 | /* Lock the SuperIO chip */ | |
84af401a | 270 | outb_p(LOCK_DATA, IO_INDEX_PORT); |
b4cc4aa2 JMG |
271 | |
272 | spin_unlock_irqrestore(&spinlock, flags); | |
273 | ||
274 | *status = 0; | |
275 | if (new_status & 1) | |
276 | *status |= WDIOF_CARDRESET; | |
277 | ||
278 | return 0; | |
279 | } | |
280 | ||
281 | ||
282 | /* | |
283 | * /dev/watchdog handling | |
284 | */ | |
285 | ||
286 | static int wdt_open(struct inode *inode, struct file *file) | |
287 | { | |
288 | /* If the watchdog is alive we don't need to start it again */ | |
84af401a | 289 | if (test_and_set_bit(0, &timer_alive)) |
b4cc4aa2 JMG |
290 | return -EBUSY; |
291 | ||
292 | if (nowayout) | |
293 | __module_get(THIS_MODULE); | |
294 | ||
295 | wdt_start(); | |
c5bf68fe | 296 | return stream_open(inode, file); |
b4cc4aa2 JMG |
297 | } |
298 | ||
299 | static int wdt_release(struct inode *inode, struct file *file) | |
300 | { | |
301 | /* | |
302 | * Shut off the timer. | |
303 | * Lock it in if it's a module and we set nowayout | |
304 | */ | |
84af401a | 305 | if (expect_close == 42) { |
b4cc4aa2 JMG |
306 | wdt_stop(); |
307 | clear_bit(0, &timer_alive); | |
308 | } else { | |
309 | wdt_keepalive(); | |
27c766aa | 310 | pr_crit("unexpected close, not stopping watchdog!\n"); |
b4cc4aa2 JMG |
311 | } |
312 | expect_close = 0; | |
313 | return 0; | |
314 | } | |
315 | ||
316 | /* | |
317 | * wdt_write: | |
318 | * @file: file handle to the watchdog | |
319 | * @buf: buffer to write (unused as data does not matter here | |
320 | * @count: count of bytes | |
321 | * @ppos: pointer to the position to write. No seeks allowed | |
322 | * | |
323 | * A write to a watchdog device is defined as a keepalive signal. Any | |
324 | * write of data will do, as we we don't define content meaning. | |
325 | */ | |
326 | ||
327 | static ssize_t wdt_write(struct file *file, const char __user *buf, | |
328 | size_t count, loff_t *ppos) | |
329 | { | |
330 | /* See if we got the magic character 'V' and reload the timer */ | |
84af401a AC |
331 | if (count) { |
332 | if (!nowayout) { | |
b4cc4aa2 JMG |
333 | size_t ofs; |
334 | ||
84af401a AC |
335 | /* note: just in case someone wrote the |
336 | magic character long ago */ | |
b4cc4aa2 JMG |
337 | expect_close = 0; |
338 | ||
84af401a AC |
339 | /* scan to see whether or not we got the |
340 | magic character */ | |
341 | for (ofs = 0; ofs != count; ofs++) { | |
b4cc4aa2 JMG |
342 | char c; |
343 | if (get_user(c, buf + ofs)) | |
344 | return -EFAULT; | |
84af401a | 345 | if (c == 'V') |
b4cc4aa2 | 346 | expect_close = 42; |
b4cc4aa2 JMG |
347 | } |
348 | } | |
349 | ||
350 | /* someone wrote to us, we should restart timer */ | |
351 | wdt_keepalive(); | |
352 | } | |
353 | return count; | |
354 | } | |
355 | ||
356 | /* | |
357 | * wdt_ioctl: | |
358 | * @inode: inode of the device | |
359 | * @file: file handle to the device | |
360 | * @cmd: watchdog command | |
361 | * @arg: argument pointer | |
362 | * | |
363 | * The watchdog API defines a common set of functions for all watchdogs | |
364 | * according to their available features. | |
365 | */ | |
366 | ||
42747d71 | 367 | static const struct watchdog_info ident = { |
b4cc4aa2 JMG |
368 | .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING, |
369 | .firmware_version = 1, | |
370 | .identity = WATCHDOG_NAME, | |
371 | }; | |
372 | ||
84af401a | 373 | static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
b4cc4aa2 JMG |
374 | { |
375 | int status; | |
376 | int new_options, retval = -EINVAL; | |
377 | int new_timeout; | |
378 | union { | |
379 | struct watchdog_info __user *ident; | |
380 | int __user *i; | |
381 | } uarg; | |
382 | ||
383 | uarg.i = (int __user *)arg; | |
384 | ||
84af401a | 385 | switch (cmd) { |
b4cc4aa2 | 386 | case WDIOC_GETSUPPORT: |
84af401a AC |
387 | return copy_to_user(uarg.ident, &ident, |
388 | sizeof(ident)) ? -EFAULT : 0; | |
b4cc4aa2 JMG |
389 | |
390 | case WDIOC_GETSTATUS: | |
391 | wdt_get_status(&status); | |
392 | return put_user(status, uarg.i); | |
393 | ||
394 | case WDIOC_GETBOOTSTATUS: | |
395 | return put_user(0, uarg.i); | |
396 | ||
b4cc4aa2 | 397 | case WDIOC_SETOPTIONS: |
84af401a | 398 | if (get_user(new_options, uarg.i)) |
b4cc4aa2 JMG |
399 | return -EFAULT; |
400 | ||
401 | if (new_options & WDIOS_DISABLECARD) { | |
402 | wdt_stop(); | |
403 | retval = 0; | |
404 | } | |
405 | ||
406 | if (new_options & WDIOS_ENABLECARD) { | |
407 | wdt_start(); | |
408 | retval = 0; | |
409 | } | |
410 | ||
411 | return retval; | |
412 | ||
0c06090c WVS |
413 | case WDIOC_KEEPALIVE: |
414 | wdt_keepalive(); | |
415 | return 0; | |
416 | ||
b4cc4aa2 JMG |
417 | case WDIOC_SETTIMEOUT: |
418 | if (get_user(new_timeout, uarg.i)) | |
419 | return -EFAULT; | |
420 | ||
421 | if (wdt_set_timeout(new_timeout)) | |
143a2e54 | 422 | return -EINVAL; |
b4cc4aa2 JMG |
423 | |
424 | wdt_keepalive(); | |
3ff0751f | 425 | /* Fall through */ |
b4cc4aa2 JMG |
426 | |
427 | case WDIOC_GETTIMEOUT: | |
428 | return put_user(timeout, uarg.i); | |
429 | ||
0c06090c WVS |
430 | default: |
431 | return -ENOTTY; | |
432 | ||
b4cc4aa2 JMG |
433 | } |
434 | } | |
435 | ||
436 | static int wdt_notify_sys(struct notifier_block *this, unsigned long code, | |
437 | void *unused) | |
438 | { | |
84af401a | 439 | if (code == SYS_DOWN || code == SYS_HALT) |
b4cc4aa2 JMG |
440 | wdt_stop(); |
441 | return NOTIFY_DONE; | |
442 | } | |
443 | ||
84af401a | 444 | static const struct file_operations wdt_fops = { |
b4cc4aa2 JMG |
445 | .owner = THIS_MODULE, |
446 | .llseek = no_llseek, | |
447 | .write = wdt_write, | |
84af401a | 448 | .unlocked_ioctl = wdt_ioctl, |
b6dfb247 | 449 | .compat_ioctl = compat_ptr_ioctl, |
b4cc4aa2 JMG |
450 | .open = wdt_open, |
451 | .release = wdt_release, | |
452 | }; | |
453 | ||
84af401a | 454 | static struct miscdevice wdt_miscdev = { |
b4cc4aa2 JMG |
455 | .minor = WATCHDOG_MINOR, |
456 | .name = "watchdog", | |
457 | .fops = &wdt_fops, | |
458 | }; | |
459 | ||
460 | static struct notifier_block wdt_notifier = { | |
461 | .notifier_call = wdt_notify_sys, | |
462 | }; | |
463 | ||
464 | static int __init w83977f_wdt_init(void) | |
465 | { | |
466 | int rc; | |
467 | ||
27c766aa | 468 | pr_info("driver v%s\n", WATCHDOG_VERSION); |
b4cc4aa2 | 469 | |
b4cc4aa2 | 470 | /* |
84af401a | 471 | * Check that the timeout value is within it's range; |
b4cc4aa2 JMG |
472 | * if not reset to the default |
473 | */ | |
474 | if (wdt_set_timeout(timeout)) { | |
475 | wdt_set_timeout(DEFAULT_TIMEOUT); | |
27c766aa JP |
476 | pr_info("timeout value must be 15 <= timeout <= 7635, using %d\n", |
477 | DEFAULT_TIMEOUT); | |
b4cc4aa2 JMG |
478 | } |
479 | ||
84af401a | 480 | if (!request_region(IO_INDEX_PORT, 2, WATCHDOG_NAME)) { |
27c766aa | 481 | pr_err("I/O address 0x%04x already in use\n", IO_INDEX_PORT); |
b4cc4aa2 JMG |
482 | rc = -EIO; |
483 | goto err_out; | |
484 | } | |
485 | ||
c6cb13ae | 486 | rc = register_reboot_notifier(&wdt_notifier); |
84af401a | 487 | if (rc) { |
27c766aa | 488 | pr_err("cannot register reboot notifier (err=%d)\n", rc); |
b4cc4aa2 JMG |
489 | goto err_out_region; |
490 | } | |
491 | ||
c6cb13ae | 492 | rc = misc_register(&wdt_miscdev); |
84af401a | 493 | if (rc) { |
27c766aa JP |
494 | pr_err("cannot register miscdev on minor=%d (err=%d)\n", |
495 | wdt_miscdev.minor, rc); | |
c6cb13ae | 496 | goto err_out_reboot; |
b4cc4aa2 JMG |
497 | } |
498 | ||
27c766aa JP |
499 | pr_info("initialized. timeout=%d sec (nowayout=%d testmode=%d)\n", |
500 | timeout, nowayout, testmode); | |
b4cc4aa2 JMG |
501 | |
502 | return 0; | |
503 | ||
c6cb13ae WVS |
504 | err_out_reboot: |
505 | unregister_reboot_notifier(&wdt_notifier); | |
b4cc4aa2 | 506 | err_out_region: |
84af401a | 507 | release_region(IO_INDEX_PORT, 2); |
b4cc4aa2 JMG |
508 | err_out: |
509 | return rc; | |
510 | } | |
511 | ||
512 | static void __exit w83977f_wdt_exit(void) | |
513 | { | |
514 | wdt_stop(); | |
515 | misc_deregister(&wdt_miscdev); | |
516 | unregister_reboot_notifier(&wdt_notifier); | |
84af401a | 517 | release_region(IO_INDEX_PORT, 2); |
b4cc4aa2 JMG |
518 | } |
519 | ||
520 | module_init(w83977f_wdt_init); | |
521 | module_exit(w83977f_wdt_exit); | |
522 | ||
523 | MODULE_AUTHOR("Jose Goncalves <jose.goncalves@inov.pt>"); | |
524 | MODULE_DESCRIPTION("Driver for watchdog timer in W83977F I/O chip"); | |
525 | MODULE_LICENSE("GPL"); |