[linux-block.git] / drivers / watchdog / sa1100_wdt.c

// SPDX-License-Identifier: GPL-2.0+
/*
 *	Watchdog driver for the SA11x0/PXA2xx
 *
 *	(c) Copyright 2000 Oleg Drokin <green@crimea.edu>
 *	    Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
 *
 *	Neither Oleg Drokin nor iXcelerator.com admit liability nor provide
 *	warranty for any of this software. This material is provided
 *	"AS-IS" and at no charge.
 *
 *	(c) Copyright 2000           Oleg Drokin <green@crimea.edu>
 *
 *	27/11/2000 Initial release
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/clk.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/platform_device.h>
#include <linux/miscdevice.h>
#include <linux/watchdog.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/bitops.h>
#include <linux/uaccess.h>
#include <linux/timex.h>

#define REG_OSMR0  	0x0000  /* OS timer Match Reg. 0 */
#define REG_OSMR1  	0x0004  /* OS timer Match Reg. 1 */
#define REG_OSMR2  	0x0008  /* OS timer Match Reg. 2 */
#define REG_OSMR3  	0x000c  /* OS timer Match Reg. 3 */
#define REG_OSCR   	0x0010  /* OS timer Counter Reg. */
#define REG_OSSR   	0x0014  /* OS timer Status Reg. */
#define REG_OWER   	0x0018  /* OS timer Watch-dog Enable Reg. */
#define REG_OIER  	0x001C  /* OS timer Interrupt Enable Reg. */

#define OSSR_M3		(1 << 3)	/* Match status channel 3 */
#define OSSR_M2		(1 << 2)	/* Match status channel 2 */
#define OSSR_M1		(1 << 1)	/* Match status channel 1 */
#define OSSR_M0		(1 << 0)	/* Match status channel 0 */

#define OWER_WME	(1 << 0)	/* Watchdog Match Enable */

#define OIER_E3		(1 << 3)	/* Interrupt enable channel 3 */
#define OIER_E2		(1 << 2)	/* Interrupt enable channel 2 */
#define OIER_E1		(1 << 1)	/* Interrupt enable channel 1 */
#define OIER_E0		(1 << 0)	/* Interrupt enable channel 0 */

static unsigned long oscr_freq;
static unsigned long sa1100wdt_users;
static unsigned int pre_margin;
static int boot_status;
static void __iomem *reg_base;

static inline void sa1100_wr(u32 val, u32 offset)
{
	writel_relaxed(val, reg_base + offset);
}

static inline u32 sa1100_rd(u32 offset)
{
	return readl_relaxed(reg_base + offset);
}

/*
 *	Allow only one person to hold it open
 */
static int sa1100dog_open(struct inode *inode, struct file *file)
{
	if (test_and_set_bit(1, &sa1100wdt_users))
		return -EBUSY;

	/* Activate SA1100 Watchdog timer */
	sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3);
	sa1100_wr(OSSR_M3, REG_OSSR);
	sa1100_wr(OWER_WME, REG_OWER);
	sa1100_wr(sa1100_rd(REG_OIER) | OIER_E3, REG_OIER);
	return stream_open(inode, file);
}

/*
 * The watchdog cannot be disabled.
 *
 * Previous comments suggested that turning off the interrupt by
 * clearing REG_OIER[E3] would prevent the watchdog timing out but this
 * does not appear to be true (at least on the PXA255).
 */
static int sa1100dog_release(struct inode *inode, struct file *file)
{
	pr_crit("Device closed - timer will not stop\n");
	clear_bit(1, &sa1100wdt_users);
	return 0;
}

static ssize_t sa1100dog_write(struct file *file, const char __user *data,
						size_t len, loff_t *ppos)
{
	if (len)
		/* Refresh OSMR3 timer. */
		sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3);
	return len;
}

static const struct watchdog_info ident = {
	.options	= WDIOF_CARDRESET | WDIOF_SETTIMEOUT
				| WDIOF_KEEPALIVEPING,
	.identity	= "SA1100/PXA255 Watchdog",
	.firmware_version	= 1,
};

static long sa1100dog_ioctl(struct file *file, unsigned int cmd,
							unsigned long arg)
{
	int ret = -ENOTTY;
	int time;
	void __user *argp = (void __user *)arg;
	int __user *p = argp;

	switch (cmd) {
	case WDIOC_GETSUPPORT:
		ret = copy_to_user(argp, &ident,
				   sizeof(ident)) ? -EFAULT : 0;
		break;

	case WDIOC_GETSTATUS:
		ret = put_user(0, p);
		break;

	case WDIOC_GETBOOTSTATUS:
		ret = put_user(boot_status, p);
		break;

	case WDIOC_KEEPALIVE:
		sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3);
		ret = 0;
		break;

	case WDIOC_SETTIMEOUT:
		ret = get_user(time, p);
		if (ret)
			break;

		if (time <= 0 || (oscr_freq * (long long)time >= 0xffffffff)) {
			ret = -EINVAL;
			break;
		}

		pre_margin = oscr_freq * time;
		sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3);
		fallthrough;

	case WDIOC_GETTIMEOUT:
		ret = put_user(pre_margin / oscr_freq, p);
		break;
	}
	return ret;
}

static const struct file_operations sa1100dog_fops = {
	.owner		= THIS_MODULE,
	.llseek		= no_llseek,
	.write		= sa1100dog_write,
	.unlocked_ioctl	= sa1100dog_ioctl,
	.compat_ioctl	= compat_ptr_ioctl,
	.open		= sa1100dog_open,
	.release	= sa1100dog_release,
};

static struct miscdevice sa1100dog_miscdev = {
	.minor		= WATCHDOG_MINOR,
	.name		= "watchdog",
	.fops		= &sa1100dog_fops,
};

static int margin = 60;		/* (secs) Default is 1 minute */
static struct clk *clk;

static int sa1100dog_probe(struct platform_device *pdev)
{
	int ret;
	int *platform_data;
	struct resource *res;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res)
		return -ENXIO;
	reg_base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
	ret = PTR_ERR_OR_ZERO(reg_base);
	if (ret)
		return ret;

	clk = clk_get(NULL, "OSTIMER0");
	if (IS_ERR(clk)) {
		pr_err("SA1100/PXA2xx Watchdog Timer: clock not found: %d\n",
		       (int) PTR_ERR(clk));
		return PTR_ERR(clk);
	}

	ret = clk_prepare_enable(clk);
	if (ret) {
		pr_err("SA1100/PXA2xx Watchdog Timer: clock failed to prepare+enable: %d\n",
		       ret);
		goto err;
	}

	oscr_freq = clk_get_rate(clk);

	platform_data = pdev->dev.platform_data;
	if (platform_data && *platform_data)
		boot_status = WDIOF_CARDRESET;
	pre_margin = oscr_freq * margin;

	ret = misc_register(&sa1100dog_miscdev);
	if (ret == 0) {
		pr_info("SA1100/PXA2xx Watchdog Timer: timer margin %d sec\n",
			margin);
		return 0;
	}

	clk_disable_unprepare(clk);
err:
	clk_put(clk);
	return ret;
}

static void sa1100dog_remove(struct platform_device *pdev)
{
	misc_deregister(&sa1100dog_miscdev);
	clk_disable_unprepare(clk);
	clk_put(clk);
}

static struct platform_driver sa1100dog_driver = {
	.driver.name = "sa1100_wdt",
	.probe	  = sa1100dog_probe,
	.remove_new	  = sa1100dog_remove,
};
module_platform_driver(sa1100dog_driver);

MODULE_AUTHOR("Oleg Drokin <green@crimea.edu>");
MODULE_DESCRIPTION("SA1100/PXA2xx Watchdog");

module_param(margin, int, 0);
MODULE_PARM_DESC(margin, "Watchdog margin in seconds (default 60s)");

MODULE_LICENSE("GPL");
Commit	Line	Data
d0173278	1	// SPDX-License-Identifier: GPL-2.0+
1da177e4 LT	2	/*
	3	* Watchdog driver for the SA11x0/PXA2xx
	4	*
143a2e54 WVS	5	* (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
143a2e54 WVS	6	* Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
1da177e4	7	*
1da177e4 LT	8	* Neither Oleg Drokin nor iXcelerator.com admit liability nor provide
	9	* warranty for any of this software. This material is provided
	10	* "AS-IS" and at no charge.
	11	*
	12	* (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
	13	*
143a2e54	14	* 27/11/2000 Initial release
1da177e4	15	*/
27c766aa JP	16
	17	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
	18
1da177e4 LT	19	#include <linux/module.h>
1da177e4 LT	20	#include <linux/moduleparam.h>
6924089c	21	#include <linux/clk.h>
1da177e4 LT	22	#include <linux/types.h>
	23	#include <linux/kernel.h>
	24	#include <linux/fs.h>
e86bd43b	25	#include <linux/platform_device.h>
1da177e4 LT	26	#include <linux/miscdevice.h>
	27	#include <linux/watchdog.h>
	28	#include <linux/init.h>
23019a73	29	#include <linux/io.h>
1977f032	30	#include <linux/bitops.h>
f19e0312	31	#include <linux/uaccess.h>
87c52578	32	#include <linux/timex.h>
1da177e4	33
e86bd43b AB	34	#define REG_OSMR0 0x0000 /* OS timer Match Reg. 0 */
	35	#define REG_OSMR1 0x0004 /* OS timer Match Reg. 1 */
	36	#define REG_OSMR2 0x0008 /* OS timer Match Reg. 2 */
	37	#define REG_OSMR3 0x000c /* OS timer Match Reg. 3 */
	38	#define REG_OSCR 0x0010 /* OS timer Counter Reg. */
	39	#define REG_OSSR 0x0014 /* OS timer Status Reg. */
	40	#define REG_OWER 0x0018 /* OS timer Watch-dog Enable Reg. */
	41	#define REG_OIER 0x001C /* OS timer Interrupt Enable Reg. */
1da177e4	42
e86bd43b AB	43	#define OSSR_M3 (1 << 3) /* Match status channel 3 */
	44	#define OSSR_M2 (1 << 2) /* Match status channel 2 */
	45	#define OSSR_M1 (1 << 1) /* Match status channel 1 */
	46	#define OSSR_M0 (1 << 0) /* Match status channel 0 */
	47
	48	#define OWER_WME (1 << 0) /* Watchdog Match Enable */
	49
	50	#define OIER_E3 (1 << 3) /* Interrupt enable channel 3 */
	51	#define OIER_E2 (1 << 2) /* Interrupt enable channel 2 */
	52	#define OIER_E1 (1 << 1) /* Interrupt enable channel 1 */
	53	#define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */
1da177e4	54
28a62385	55	static unsigned long oscr_freq;
1da177e4	56	static unsigned long sa1100wdt_users;
a6f052e3	57	static unsigned int pre_margin;
1da177e4	58	static int boot_status;
e86bd43b AB	59	static void __iomem *reg_base;
	60
	61	static inline void sa1100_wr(u32 val, u32 offset)
	62	{
	63	writel_relaxed(val, reg_base + offset);
	64	}
	65
	66	static inline u32 sa1100_rd(u32 offset)
	67	{
	68	return readl_relaxed(reg_base + offset);
	69	}
1da177e4 LT	70
	71	/*
	72	* Allow only one person to hold it open
	73	*/
	74	static int sa1100dog_open(struct inode inode, struct file file)
	75	{
f19e0312	76	if (test_and_set_bit(1, &sa1100wdt_users))
1da177e4 LT	77	return -EBUSY;
	78
	79	/* Activate SA1100 Watchdog timer */
e86bd43b AB	80	sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3);
	81	sa1100_wr(OSSR_M3, REG_OSSR);
	82	sa1100_wr(OWER_WME, REG_OWER);
	83	sa1100_wr(sa1100_rd(REG_OIER) \| OIER_E3, REG_OIER);
c5bf68fe	84	return stream_open(inode, file);
1da177e4 LT	85	}
	86
	87	/*
9bbd0375 IC	88	* The watchdog cannot be disabled.
	89	*
	90	* Previous comments suggested that turning off the interrupt by
e86bd43b	91	* clearing REG_OIER[E3] would prevent the watchdog timing out but this
9bbd0375	92	* does not appear to be true (at least on the PXA255).
1da177e4 LT	93	*/
	94	static int sa1100dog_release(struct inode inode, struct file file)
	95	{
27c766aa	96	pr_crit("Device closed - timer will not stop\n");
1da177e4	97	clear_bit(1, &sa1100wdt_users);
1da177e4 LT	98	return 0;
	99	}
	100
f19e0312 AC	101	static ssize_t sa1100dog_write(struct file file, const char __user data,
f19e0312 AC	102	size_t len, loff_t *ppos)
1da177e4	103	{
9bbd0375	104	if (len)
1da177e4	105	/* Refresh OSMR3 timer. */
e86bd43b	106	sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3);
1da177e4 LT	107	return len;
	108	}
	109
f19e0312 AC	110	static const struct watchdog_info ident = {
	111	.options = WDIOF_CARDRESET \| WDIOF_SETTIMEOUT
	112	\| WDIOF_KEEPALIVEPING,
9bbd0375	113	.identity = "SA1100/PXA255 Watchdog",
a6f052e3	114	.firmware_version = 1,
1da177e4 LT	115	};
1da177e4 LT	116
f19e0312 AC	117	static long sa1100dog_ioctl(struct file *file, unsigned int cmd,
f19e0312 AC	118	unsigned long arg)
1da177e4	119	{
795b89d2	120	int ret = -ENOTTY;
1da177e4	121	int time;
3a69e579 IC	122	void __user argp = (void __user )arg;
3a69e579 IC	123	int __user *p = argp;
1da177e4 LT	124
	125	switch (cmd) {
	126	case WDIOC_GETSUPPORT:
3a69e579	127	ret = copy_to_user(argp, &ident,
1da177e4 LT	128	sizeof(ident)) ? -EFAULT : 0;
	129	break;
	130
	131	case WDIOC_GETSTATUS:
3a69e579	132	ret = put_user(0, p);
1da177e4 LT	133	break;
	134
	135	case WDIOC_GETBOOTSTATUS:
3a69e579	136	ret = put_user(boot_status, p);
1da177e4 LT	137	break;
1da177e4 LT	138
0c06090c	139	case WDIOC_KEEPALIVE:
e86bd43b	140	sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3);
0c06090c WVS	141	ret = 0;
	142	break;
	143
1da177e4	144	case WDIOC_SETTIMEOUT:
3a69e579	145	ret = get_user(time, p);
1da177e4 LT	146	if (ret)
	147	break;
	148
a6f052e3	149	if (time <= 0 \|\| (oscr_freq * (long long)time >= 0xffffffff)) {
1da177e4 LT	150	ret = -EINVAL;
	151	break;
	152	}
	153
28a62385	154	pre_margin = oscr_freq * time;
e86bd43b	155	sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3);
bd490f82	156	fallthrough;
1da177e4 LT	157
1da177e4 LT	158	case WDIOC_GETTIMEOUT:
28a62385	159	ret = put_user(pre_margin / oscr_freq, p);
1da177e4	160	break;
1da177e4 LT	161	}
	162	return ret;
	163	}
	164
f19e0312	165	static const struct file_operations sa1100dog_fops = {
1da177e4 LT	166	.owner = THIS_MODULE,
	167	.llseek = no_llseek,
	168	.write = sa1100dog_write,
f19e0312	169	.unlocked_ioctl = sa1100dog_ioctl,
b6dfb247	170	.compat_ioctl = compat_ptr_ioctl,
1da177e4 LT	171	.open = sa1100dog_open,
	172	.release = sa1100dog_release,
	173	};
	174
f19e0312	175	static struct miscdevice sa1100dog_miscdev = {
1da177e4	176	.minor = WATCHDOG_MINOR,
9bbd0375	177	.name = "watchdog",
1da177e4 LT	178	.fops = &sa1100dog_fops,
	179	};
	180
e86bd43b	181	static int margin = 60; /* (secs) Default is 1 minute */
6924089c	182	static struct clk *clk;
1da177e4	183
e86bd43b	184	static int sa1100dog_probe(struct platform_device *pdev)
1da177e4 LT	185	{
1da177e4 LT	186	int ret;
e86bd43b AB	187	int *platform_data;
	188	struct resource *res;
	189
	190	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	191	if (!res)
	192	return -ENXIO;
	193	reg_base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
	194	ret = PTR_ERR_OR_ZERO(reg_base);
	195	if (ret)
	196	return ret;
1da177e4	197
6924089c RJ	198	clk = clk_get(NULL, "OSTIMER0");
	199	if (IS_ERR(clk)) {
	200	pr_err("SA1100/PXA2xx Watchdog Timer: clock not found: %d\n",
	201	(int) PTR_ERR(clk));
	202	return PTR_ERR(clk);
	203	}
	204
	205	ret = clk_prepare_enable(clk);
	206	if (ret) {
	207	pr_err("SA1100/PXA2xx Watchdog Timer: clock failed to prepare+enable: %d\n",
	208	ret);
	209	goto err;
	210	}
	211
	212	oscr_freq = clk_get_rate(clk);
28a62385	213
e86bd43b AB	214	platform_data = pdev->dev.platform_data;
	215	if (platform_data && *platform_data)
	216	boot_status = WDIOF_CARDRESET;
28a62385	217	pre_margin = oscr_freq * margin;
1da177e4 LT	218
1da177e4 LT	219	ret = misc_register(&sa1100dog_miscdev);
027d89d9	220	if (ret == 0) {
27c766aa JP	221	pr_info("SA1100/PXA2xx Watchdog Timer: timer margin %d sec\n",
27c766aa JP	222	margin);
027d89d9 VZ	223	return 0;
	224	}
	225
6924089c	226	clk_disable_unprepare(clk);
027d89d9	227	err:
6924089c RJ	228	clk_put(clk);
6924089c RJ	229	return ret;
1da177e4 LT	230	}
1da177e4 LT	231
4dca58a8	232	static void sa1100dog_remove(struct platform_device *pdev)
1da177e4 LT	233	{
1da177e4 LT	234	misc_deregister(&sa1100dog_miscdev);
6924089c RJ	235	clk_disable_unprepare(clk);
6924089c RJ	236	clk_put(clk);
1da177e4 LT	237	}
1da177e4 LT	238
74b31987	239	static struct platform_driver sa1100dog_driver = {
e86bd43b AB	240	.driver.name = "sa1100_wdt",
e86bd43b AB	241	.probe = sa1100dog_probe,
4dca58a8	242	.remove_new = sa1100dog_remove,
e86bd43b AB	243	};
e86bd43b AB	244	module_platform_driver(sa1100dog_driver);
1da177e4 LT	245
	246	MODULE_AUTHOR("Oleg Drokin <green@crimea.edu>");
	247	MODULE_DESCRIPTION("SA1100/PXA2xx Watchdog");
	248
	249	module_param(margin, int, 0);
	250	MODULE_PARM_DESC(margin, "Watchdog margin in seconds (default 60s)");
	251
1da177e4	252	MODULE_LICENSE("GPL");