[linux-2.6-block.git] / drivers / watchdog / rti_wdt.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Watchdog driver for the K3 RTI module
 *
 * (c) Copyright 2019-2020 Texas Instruments Inc.
 * All rights reserved.
 */

#include <linux/clk.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/types.h>
#include <linux/watchdog.h>

#define DEFAULT_HEARTBEAT 60

/* Max heartbeat is calculated at 32kHz source clock */
#define MAX_HEARTBEAT	1000

/* Timer register set definition */
#define RTIDWDCTRL	0x90
#define RTIDWDPRLD	0x94
#define RTIWDSTATUS	0x98
#define RTIWDKEY	0x9c
#define RTIDWDCNTR	0xa0
#define RTIWWDRXCTRL	0xa4
#define RTIWWDSIZECTRL	0xa8

#define RTIWWDRX_NMI	0xa

#define RTIWWDSIZE_50P		0x50
#define RTIWWDSIZE_25P		0x500
#define RTIWWDSIZE_12P5		0x5000
#define RTIWWDSIZE_6P25		0x50000
#define RTIWWDSIZE_3P125	0x500000

#define WDENABLE_KEY	0xa98559da

#define WDKEY_SEQ0		0xe51a
#define WDKEY_SEQ1		0xa35c

#define WDT_PRELOAD_SHIFT	13

#define WDT_PRELOAD_MAX		0xfff

#define DWDST			BIT(1)

#define PON_REASON_SOF_NUM	0xBBBBCCCC
#define PON_REASON_MAGIC_NUM	0xDDDDDDDD
#define PON_REASON_EOF_NUM	0xCCCCBBBB
#define RESERVED_MEM_MIN_SIZE	12

static int heartbeat = DEFAULT_HEARTBEAT;

/*
 * struct to hold data for each WDT device
 * @base - base io address of WD device
 * @freq - source clock frequency of WDT
 * @wdd  - hold watchdog device as is in WDT core
 */
struct rti_wdt_device {
	void __iomem		*base;
	unsigned long		freq;
	struct watchdog_device	wdd;
};

static int rti_wdt_start(struct watchdog_device *wdd)
{
	u32 timer_margin;
	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);

	/* set timeout period */
	timer_margin = (u64)wdd->timeout * wdt->freq;
	timer_margin >>= WDT_PRELOAD_SHIFT;
	if (timer_margin > WDT_PRELOAD_MAX)
		timer_margin = WDT_PRELOAD_MAX;
	writel_relaxed(timer_margin, wdt->base + RTIDWDPRLD);

	/*
	 * RTI only supports a windowed mode, where the watchdog can only
	 * be petted during the open window; not too early or not too late.
	 * The HW configuration options only allow for the open window size
	 * to be 50% or less than that; we obviouly want to configure the open
	 * window as large as possible so we select the 50% option.
	 */
	wdd->min_hw_heartbeat_ms = 500 * wdd->timeout;

	/* Generate NMI when wdt expires */
	writel_relaxed(RTIWWDRX_NMI, wdt->base + RTIWWDRXCTRL);

	/* Open window size 50%; this is the largest window size available */
	writel_relaxed(RTIWWDSIZE_50P, wdt->base + RTIWWDSIZECTRL);

	readl_relaxed(wdt->base + RTIWWDSIZECTRL);

	/* enable watchdog */
	writel_relaxed(WDENABLE_KEY, wdt->base + RTIDWDCTRL);
	return 0;
}

static int rti_wdt_ping(struct watchdog_device *wdd)
{
	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);

	/* put watchdog in service state */
	writel_relaxed(WDKEY_SEQ0, wdt->base + RTIWDKEY);
	/* put watchdog in active state */
	writel_relaxed(WDKEY_SEQ1, wdt->base + RTIWDKEY);

	return 0;
}

static int rti_wdt_setup_hw_hb(struct watchdog_device *wdd, u32 wsize)
{
	/*
	 * RTI only supports a windowed mode, where the watchdog can only
	 * be petted during the open window; not too early or not too late.
	 * The HW configuration options only allow for the open window size
	 * to be 50% or less than that.
	 */
	switch (wsize) {
	case RTIWWDSIZE_50P:
		/* 50% open window => 50% min heartbeat */
		wdd->min_hw_heartbeat_ms = 500 * heartbeat;
		break;

	case RTIWWDSIZE_25P:
		/* 25% open window => 75% min heartbeat */
		wdd->min_hw_heartbeat_ms = 750 * heartbeat;
		break;

	case RTIWWDSIZE_12P5:
		/* 12.5% open window => 87.5% min heartbeat */
		wdd->min_hw_heartbeat_ms = 875 * heartbeat;
		break;

	case RTIWWDSIZE_6P25:
		/* 6.5% open window => 93.5% min heartbeat */
		wdd->min_hw_heartbeat_ms = 935 * heartbeat;
		break;

	case RTIWWDSIZE_3P125:
		/* 3.125% open window => 96.9% min heartbeat */
		wdd->min_hw_heartbeat_ms = 969 * heartbeat;
		break;

	default:
		return -EINVAL;
	}

	return 0;
}

static unsigned int rti_wdt_get_timeleft_ms(struct watchdog_device *wdd)
{
	u64 timer_counter;
	u32 val;
	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);

	/* if timeout has occurred then return 0 */
	val = readl_relaxed(wdt->base + RTIWDSTATUS);
	if (val & DWDST)
		return 0;

	timer_counter = readl_relaxed(wdt->base + RTIDWDCNTR);

	timer_counter *= 1000;

	do_div(timer_counter, wdt->freq);

	return timer_counter;
}

static unsigned int rti_wdt_get_timeleft(struct watchdog_device *wdd)
{
	return rti_wdt_get_timeleft_ms(wdd) / 1000;
}

static const struct watchdog_info rti_wdt_info = {
	.options = WDIOF_KEEPALIVEPING,
	.identity = "K3 RTI Watchdog",
};

static const struct watchdog_ops rti_wdt_ops = {
	.owner		= THIS_MODULE,
	.start		= rti_wdt_start,
	.ping		= rti_wdt_ping,
	.get_timeleft	= rti_wdt_get_timeleft,
};

static int rti_wdt_probe(struct platform_device *pdev)
{
	int ret = 0;
	struct device *dev = &pdev->dev;
	struct watchdog_device *wdd;
	struct rti_wdt_device *wdt;
	struct clk *clk;
	u32 last_ping = 0;
	struct device_node *node;
	u32 reserved_mem_size;
	struct resource res;
	u32 *vaddr;
	u64 paddr;

	wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
	if (!wdt)
		return -ENOMEM;

	clk = clk_get(dev, NULL);
	if (IS_ERR(clk))
		return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n");

	wdt->freq = clk_get_rate(clk);

	clk_put(clk);

	if (!wdt->freq) {
		dev_err(dev, "Failed to get fck rate.\n");
		return -EINVAL;
	}

	/*
	 * If watchdog is running at 32k clock, it is not accurate.
	 * Adjust frequency down in this case so that we don't pet
	 * the watchdog too often.
	 */
	if (wdt->freq < 32768)
		wdt->freq = wdt->freq * 9 / 10;

	pm_runtime_enable(dev);
	ret = pm_runtime_resume_and_get(dev);
	if (ret < 0) {
		pm_runtime_disable(&pdev->dev);
		return dev_err_probe(dev, ret, "runtime pm failed\n");
	}

	platform_set_drvdata(pdev, wdt);

	wdd = &wdt->wdd;
	wdd->info = &rti_wdt_info;
	wdd->ops = &rti_wdt_ops;
	wdd->min_timeout = 1;
	wdd->max_hw_heartbeat_ms = (WDT_PRELOAD_MAX << WDT_PRELOAD_SHIFT) /
		wdt->freq * 1000;
	wdd->parent = dev;

	watchdog_set_drvdata(wdd, wdt);
	watchdog_set_nowayout(wdd, 1);
	watchdog_set_restart_priority(wdd, 128);

	wdt->base = devm_platform_ioremap_resource(pdev, 0);
	if (IS_ERR(wdt->base)) {
		ret = PTR_ERR(wdt->base);
		goto err_iomap;
	}

	if (readl(wdt->base + RTIDWDCTRL) == WDENABLE_KEY) {
		int preset_heartbeat;
		u32 time_left_ms;
		u64 heartbeat_ms;
		u32 wsize;

		set_bit(WDOG_HW_RUNNING, &wdd->status);
		time_left_ms = rti_wdt_get_timeleft_ms(wdd);
		heartbeat_ms = readl(wdt->base + RTIDWDPRLD);
		heartbeat_ms <<= WDT_PRELOAD_SHIFT;
		heartbeat_ms *= 1000;
		do_div(heartbeat_ms, wdt->freq);
		preset_heartbeat = heartbeat_ms + 500;
		preset_heartbeat /= 1000;
		if (preset_heartbeat != heartbeat)
			dev_warn(dev, "watchdog already running, ignoring heartbeat config!\n");

		heartbeat = preset_heartbeat;

		wsize = readl(wdt->base + RTIWWDSIZECTRL);
		ret = rti_wdt_setup_hw_hb(wdd, wsize);
		if (ret) {
			dev_err(dev, "bad window size.\n");
			goto err_iomap;
		}

		last_ping = heartbeat_ms - time_left_ms;
		if (time_left_ms > heartbeat_ms) {
			dev_warn(dev, "time_left > heartbeat? Assuming last ping just before now.\n");
			last_ping = 0;
		}
	}

	node = of_parse_phandle(pdev->dev.of_node, "memory-region", 0);
	if (node) {
		ret = of_address_to_resource(node, 0, &res);
		if (ret) {
			dev_err(dev, "No memory address assigned to the region.\n");
			goto err_iomap;
		}

		/*
		 * If reserved memory is defined for watchdog reset cause.
		 * Readout the Power-on(PON) reason and pass to bootstatus.
		 */
		paddr = res.start;
		reserved_mem_size = resource_size(&res);
		if (reserved_mem_size < RESERVED_MEM_MIN_SIZE) {
			dev_err(dev, "The size of reserved memory is too small.\n");
			ret = -EINVAL;
			goto err_iomap;
		}

		vaddr = memremap(paddr, reserved_mem_size, MEMREMAP_WB);
		if (!vaddr) {
			dev_err(dev, "Failed to map memory-region.\n");
			ret = -ENOMEM;
			goto err_iomap;
		}

		if (vaddr[0] == PON_REASON_SOF_NUM &&
		    vaddr[1] == PON_REASON_MAGIC_NUM &&
		    vaddr[2] == PON_REASON_EOF_NUM) {
			wdd->bootstatus |= WDIOF_CARDRESET;
		}
		memset(vaddr, 0, reserved_mem_size);
		memunmap(vaddr);
	}

	watchdog_init_timeout(wdd, heartbeat, dev);

	ret = watchdog_register_device(wdd);
	if (ret) {
		dev_err(dev, "cannot register watchdog device\n");
		goto err_iomap;
	}

	if (last_ping)
		watchdog_set_last_hw_keepalive(wdd, last_ping);

	return 0;

err_iomap:
	pm_runtime_put_sync(&pdev->dev);
	pm_runtime_disable(&pdev->dev);

	return ret;
}

static void rti_wdt_remove(struct platform_device *pdev)
{
	struct rti_wdt_device *wdt = platform_get_drvdata(pdev);

	watchdog_unregister_device(&wdt->wdd);
	pm_runtime_put(&pdev->dev);
	pm_runtime_disable(&pdev->dev);
}

static const struct of_device_id rti_wdt_of_match[] = {
	{ .compatible = "ti,j7-rti-wdt", },
	{},
};
MODULE_DEVICE_TABLE(of, rti_wdt_of_match);

static struct platform_driver rti_wdt_driver = {
	.driver = {
		.name = "rti-wdt",
		.of_match_table = rti_wdt_of_match,
	},
	.probe = rti_wdt_probe,
	.remove_new = rti_wdt_remove,
};

module_platform_driver(rti_wdt_driver);

MODULE_AUTHOR("Tero Kristo <t-kristo@ti.com>");
MODULE_DESCRIPTION("K3 RTI Watchdog Driver");

module_param(heartbeat, int, 0);
MODULE_PARM_DESC(heartbeat,
		 "Watchdog heartbeat period in seconds from 1 to "
		 __MODULE_STRING(MAX_HEARTBEAT) ", default "
		 __MODULE_STRING(DEFAULT_HEARTBEAT));

MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:rti-wdt");
Commit	Line	Data
2d63908b TK	1	// SPDX-License-Identifier: GPL-2.0
	2	/*
	3	* Watchdog driver for the K3 RTI module
	4	*
	5	* (c) Copyright 2019-2020 Texas Instruments Inc.
	6	* All rights reserved.
	7	*/
	8
	9	#include <linux/clk.h>
	10	#include <linux/device.h>
	11	#include <linux/err.h>
	12	#include <linux/io.h>
	13	#include <linux/kernel.h>
	14	#include <linux/mod_devicetable.h>
	15	#include <linux/module.h>
	16	#include <linux/moduleparam.h>
f20ca595 LHQ	17	#include <linux/of.h>
f20ca595 LHQ	18	#include <linux/of_address.h>
2d63908b TK	19	#include <linux/platform_device.h>
	20	#include <linux/pm_runtime.h>
	21	#include <linux/types.h>
	22	#include <linux/watchdog.h>
	23
	24	#define DEFAULT_HEARTBEAT 60
	25
	26	/* Max heartbeat is calculated at 32kHz source clock */
	27	#define MAX_HEARTBEAT 1000
	28
	29	/* Timer register set definition */
	30	#define RTIDWDCTRL 0x90
	31	#define RTIDWDPRLD 0x94
	32	#define RTIWDSTATUS 0x98
	33	#define RTIWDKEY 0x9c
	34	#define RTIDWDCNTR 0xa0
	35	#define RTIWWDRXCTRL 0xa4
	36	#define RTIWWDSIZECTRL 0xa8
	37
	38	#define RTIWWDRX_NMI 0xa
	39
5527483f TK	40	#define RTIWWDSIZE_50P 0x50
	41	#define RTIWWDSIZE_25P 0x500
	42	#define RTIWWDSIZE_12P5 0x5000
	43	#define RTIWWDSIZE_6P25 0x50000
	44	#define RTIWWDSIZE_3P125 0x500000
2d63908b TK	45
	46	#define WDENABLE_KEY 0xa98559da
	47
	48	#define WDKEY_SEQ0 0xe51a
	49	#define WDKEY_SEQ1 0xa35c
	50
	51	#define WDT_PRELOAD_SHIFT 13
	52
	53	#define WDT_PRELOAD_MAX 0xfff
	54
	55	#define DWDST BIT(1)
	56
f20ca595 LHQ	57	#define PON_REASON_SOF_NUM 0xBBBBCCCC
	58	#define PON_REASON_MAGIC_NUM 0xDDDDDDDD
	59	#define PON_REASON_EOF_NUM 0xCCCCBBBB
	60	#define RESERVED_MEM_MIN_SIZE 12
	61
5527483f	62	static int heartbeat = DEFAULT_HEARTBEAT;
2d63908b TK	63
	64	/*
	65	* struct to hold data for each WDT device
	66	* @base - base io address of WD device
	67	* @freq - source clock frequency of WDT
	68	* @wdd - hold watchdog device as is in WDT core
	69	*/
	70	struct rti_wdt_device {
	71	void __iomem *base;
	72	unsigned long freq;
	73	struct watchdog_device wdd;
	74	};
	75
	76	static int rti_wdt_start(struct watchdog_device *wdd)
	77	{
	78	u32 timer_margin;
	79	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
	80
	81	/* set timeout period */
	82	timer_margin = (u64)wdd->timeout * wdt->freq;
	83	timer_margin >>= WDT_PRELOAD_SHIFT;
	84	if (timer_margin > WDT_PRELOAD_MAX)
	85	timer_margin = WDT_PRELOAD_MAX;
	86	writel_relaxed(timer_margin, wdt->base + RTIDWDPRLD);
	87
	88	/*
	89	* RTI only supports a windowed mode, where the watchdog can only
	90	* be petted during the open window; not too early or not too late.
	91	* The HW configuration options only allow for the open window size
	92	* to be 50% or less than that; we obviouly want to configure the open
5527483f	93	* window as large as possible so we select the 50% option.
2d63908b	94	*/
5527483f	95	wdd->min_hw_heartbeat_ms = 500 * wdd->timeout;
2d63908b TK	96
	97	/* Generate NMI when wdt expires */
	98	writel_relaxed(RTIWWDRX_NMI, wdt->base + RTIWWDRXCTRL);
	99
	100	/* Open window size 50%; this is the largest window size available */
	101	writel_relaxed(RTIWWDSIZE_50P, wdt->base + RTIWWDSIZECTRL);
	102
	103	readl_relaxed(wdt->base + RTIWWDSIZECTRL);
	104
	105	/* enable watchdog */
	106	writel_relaxed(WDENABLE_KEY, wdt->base + RTIDWDCTRL);
	107	return 0;
	108	}
	109
	110	static int rti_wdt_ping(struct watchdog_device *wdd)
	111	{
	112	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
	113
	114	/* put watchdog in service state */
	115	writel_relaxed(WDKEY_SEQ0, wdt->base + RTIWDKEY);
	116	/* put watchdog in active state */
	117	writel_relaxed(WDKEY_SEQ1, wdt->base + RTIWDKEY);
	118
	119	return 0;
	120	}
	121
5527483f TK	122	static int rti_wdt_setup_hw_hb(struct watchdog_device *wdd, u32 wsize)
	123	{
	124	/*
	125	* RTI only supports a windowed mode, where the watchdog can only
	126	* be petted during the open window; not too early or not too late.
	127	* The HW configuration options only allow for the open window size
	128	* to be 50% or less than that.
	129	*/
	130	switch (wsize) {
	131	case RTIWWDSIZE_50P:
	132	/* 50% open window => 50% min heartbeat */
	133	wdd->min_hw_heartbeat_ms = 500 * heartbeat;
	134	break;
	135
	136	case RTIWWDSIZE_25P:
	137	/* 25% open window => 75% min heartbeat */
	138	wdd->min_hw_heartbeat_ms = 750 * heartbeat;
	139	break;
	140
	141	case RTIWWDSIZE_12P5:
	142	/* 12.5% open window => 87.5% min heartbeat */
	143	wdd->min_hw_heartbeat_ms = 875 * heartbeat;
	144	break;
	145
	146	case RTIWWDSIZE_6P25:
	147	/* 6.5% open window => 93.5% min heartbeat */
	148	wdd->min_hw_heartbeat_ms = 935 * heartbeat;
	149	break;
	150
	151	case RTIWWDSIZE_3P125:
	152	/* 3.125% open window => 96.9% min heartbeat */
	153	wdd->min_hw_heartbeat_ms = 969 * heartbeat;
	154	break;
	155
	156	default:
	157	return -EINVAL;
	158	}
	159
	160	return 0;
	161	}
	162
	163	static unsigned int rti_wdt_get_timeleft_ms(struct watchdog_device *wdd)
2d63908b TK	164	{
	165	u64 timer_counter;
	166	u32 val;
	167	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
	168
	169	/* if timeout has occurred then return 0 */
	170	val = readl_relaxed(wdt->base + RTIWDSTATUS);
	171	if (val & DWDST)
	172	return 0;
	173
	174	timer_counter = readl_relaxed(wdt->base + RTIDWDCNTR);
	175
5527483f TK	176	timer_counter *= 1000;
5527483f TK	177
2d63908b TK	178	do_div(timer_counter, wdt->freq);
	179
	180	return timer_counter;
	181	}
	182
5527483f TK	183	static unsigned int rti_wdt_get_timeleft(struct watchdog_device *wdd)
	184	{
	185	return rti_wdt_get_timeleft_ms(wdd) / 1000;
	186	}
	187
2d63908b TK	188	static const struct watchdog_info rti_wdt_info = {
	189	.options = WDIOF_KEEPALIVEPING,
	190	.identity = "K3 RTI Watchdog",
	191	};
	192
	193	static const struct watchdog_ops rti_wdt_ops = {
	194	.owner = THIS_MODULE,
	195	.start = rti_wdt_start,
	196	.ping = rti_wdt_ping,
	197	.get_timeleft = rti_wdt_get_timeleft,
	198	};
	199
	200	static int rti_wdt_probe(struct platform_device *pdev)
	201	{
	202	int ret = 0;
	203	struct device *dev = &pdev->dev;
2d63908b TK	204	struct watchdog_device *wdd;
	205	struct rti_wdt_device *wdt;
	206	struct clk *clk;
5527483f	207	u32 last_ping = 0;
f20ca595 LHQ	208	struct device_node *node;
	209	u32 reserved_mem_size;
	210	struct resource res;
	211	u32 *vaddr;
	212	u64 paddr;
2d63908b TK	213
	214	wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
	215	if (!wdt)
	216	return -ENOMEM;
	217
	218	clk = clk_get(dev, NULL);
d342951b KK	219	if (IS_ERR(clk))
d342951b KK	220	return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n");
2d63908b TK	221
	222	wdt->freq = clk_get_rate(clk);
	223
	224	clk_put(clk);
	225
	226	if (!wdt->freq) {
	227	dev_err(dev, "Failed to get fck rate.\n");
	228	return -EINVAL;
	229	}
	230
5527483f TK	231	/*
	232	* If watchdog is running at 32k clock, it is not accurate.
	233	* Adjust frequency down in this case so that we don't pet
	234	* the watchdog too often.
	235	*/
	236	if (wdt->freq < 32768)
	237	wdt->freq = wdt->freq * 9 / 10;
	238
2d63908b	239	pm_runtime_enable(dev);
a1f136fd	240	ret = pm_runtime_resume_and_get(dev);
b3ac0c58	241	if (ret < 0) {
d055ef3a	242	pm_runtime_disable(&pdev->dev);
d342951b	243	return dev_err_probe(dev, ret, "runtime pm failed\n");
8711071e	244	}
2d63908b TK	245
	246	platform_set_drvdata(pdev, wdt);
	247
	248	wdd = &wdt->wdd;
	249	wdd->info = &rti_wdt_info;
	250	wdd->ops = &rti_wdt_ops;
	251	wdd->min_timeout = 1;
	252	wdd->max_hw_heartbeat_ms = (WDT_PRELOAD_MAX << WDT_PRELOAD_SHIFT) /
	253	wdt->freq * 1000;
2d63908b TK	254	wdd->parent = dev;
2d63908b TK	255
2d63908b TK	256	watchdog_set_drvdata(wdd, wdt);
	257	watchdog_set_nowayout(wdd, 1);
	258	watchdog_set_restart_priority(wdd, 128);
	259
b3220bde	260	wdt->base = devm_platform_ioremap_resource(pdev, 0);
2d63908b TK	261	if (IS_ERR(wdt->base)) {
	262	ret = PTR_ERR(wdt->base);
	263	goto err_iomap;
	264	}
	265
5527483f	266	if (readl(wdt->base + RTIDWDCTRL) == WDENABLE_KEY) {
c83f6438	267	int preset_heartbeat;
5527483f TK	268	u32 time_left_ms;
	269	u64 heartbeat_ms;
	270	u32 wsize;
	271
	272	set_bit(WDOG_HW_RUNNING, &wdd->status);
	273	time_left_ms = rti_wdt_get_timeleft_ms(wdd);
	274	heartbeat_ms = readl(wdt->base + RTIDWDPRLD);
	275	heartbeat_ms <<= WDT_PRELOAD_SHIFT;
	276	heartbeat_ms *= 1000;
	277	do_div(heartbeat_ms, wdt->freq);
c83f6438 JK	278	preset_heartbeat = heartbeat_ms + 500;
	279	preset_heartbeat /= 1000;
	280	if (preset_heartbeat != heartbeat)
5527483f TK	281	dev_warn(dev, "watchdog already running, ignoring heartbeat config!\n");
5527483f TK	282
c83f6438	283	heartbeat = preset_heartbeat;
5527483f TK	284
	285	wsize = readl(wdt->base + RTIWWDSIZECTRL);
	286	ret = rti_wdt_setup_hw_hb(wdd, wsize);
	287	if (ret) {
	288	dev_err(dev, "bad window size.\n");
	289	goto err_iomap;
	290	}
	291
	292	last_ping = heartbeat_ms - time_left_ms;
	293	if (time_left_ms > heartbeat_ms) {
	294	dev_warn(dev, "time_left > heartbeat? Assuming last ping just before now.\n");
	295	last_ping = 0;
	296	}
	297	}
	298
f20ca595 LHQ	299	node = of_parse_phandle(pdev->dev.of_node, "memory-region", 0);
	300	if (node) {
	301	ret = of_address_to_resource(node, 0, &res);
	302	if (ret) {
	303	dev_err(dev, "No memory address assigned to the region.\n");
	304	goto err_iomap;
	305	}
	306
	307	/*
	308	* If reserved memory is defined for watchdog reset cause.
	309	* Readout the Power-on(PON) reason and pass to bootstatus.
	310	*/
	311	paddr = res.start;
	312	reserved_mem_size = resource_size(&res);
	313	if (reserved_mem_size < RESERVED_MEM_MIN_SIZE) {
	314	dev_err(dev, "The size of reserved memory is too small.\n");
	315	ret = -EINVAL;
	316	goto err_iomap;
	317	}
	318
	319	vaddr = memremap(paddr, reserved_mem_size, MEMREMAP_WB);
	320	if (!vaddr) {
	321	dev_err(dev, "Failed to map memory-region.\n");
	322	ret = -ENOMEM;
	323	goto err_iomap;
	324	}
	325
	326	if (vaddr[0] == PON_REASON_SOF_NUM &&
	327	vaddr[1] == PON_REASON_MAGIC_NUM &&
	328	vaddr[2] == PON_REASON_EOF_NUM) {
	329	wdd->bootstatus \|= WDIOF_CARDRESET;
	330	}
	331	memset(vaddr, 0, reserved_mem_size);
	332	memunmap(vaddr);
	333	}
	334
5527483f TK	335	watchdog_init_timeout(wdd, heartbeat, dev);
5527483f TK	336
2d63908b TK	337	ret = watchdog_register_device(wdd);
	338	if (ret) {
	339	dev_err(dev, "cannot register watchdog device\n");
	340	goto err_iomap;
	341	}
	342
5527483f TK	343	if (last_ping)
	344	watchdog_set_last_hw_keepalive(wdd, last_ping);
	345
2d63908b TK	346	return 0;
	347
	348	err_iomap:
	349	pm_runtime_put_sync(&pdev->dev);
d5b29c2c	350	pm_runtime_disable(&pdev->dev);
2d63908b TK	351
	352	return ret;
	353	}
	354
4ead88bf	355	static void rti_wdt_remove(struct platform_device *pdev)
2d63908b TK	356	{
	357	struct rti_wdt_device *wdt = platform_get_drvdata(pdev);
	358
	359	watchdog_unregister_device(&wdt->wdd);
	360	pm_runtime_put(&pdev->dev);
d5b29c2c	361	pm_runtime_disable(&pdev->dev);
2d63908b TK	362	}
	363
	364	static const struct of_device_id rti_wdt_of_match[] = {
	365	{ .compatible = "ti,j7-rti-wdt", },
	366	{},
	367	};
	368	MODULE_DEVICE_TABLE(of, rti_wdt_of_match);
	369
	370	static struct platform_driver rti_wdt_driver = {
	371	.driver = {
	372	.name = "rti-wdt",
	373	.of_match_table = rti_wdt_of_match,
	374	},
	375	.probe = rti_wdt_probe,
4ead88bf	376	.remove_new = rti_wdt_remove,
2d63908b TK	377	};
	378
	379	module_platform_driver(rti_wdt_driver);
	380
	381	MODULE_AUTHOR("Tero Kristo <t-kristo@ti.com>");
	382	MODULE_DESCRIPTION("K3 RTI Watchdog Driver");
	383
	384	module_param(heartbeat, int, 0);
	385	MODULE_PARM_DESC(heartbeat,
	386	"Watchdog heartbeat period in seconds from 1 to "
	387	__MODULE_STRING(MAX_HEARTBEAT) ", default "
	388	__MODULE_STRING(DEFAULT_HEARTBEAT));
	389
	390	MODULE_LICENSE("GPL");
	391	MODULE_ALIAS("platform:rti-wdt");