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1094ebe9 JC |
1 | /* Copyright (c) 2014, The Linux Foundation. All rights reserved. |
2 | * | |
3 | * This program is free software; you can redistribute it and/or modify | |
4 | * it under the terms of the GNU General Public License version 2 and | |
5 | * only version 2 as published by the Free Software Foundation. | |
6 | * | |
7 | * This program is distributed in the hope that it will be useful, | |
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
10 | * GNU General Public License for more details. | |
11 | * | |
12 | */ | |
13 | #include <linux/clk.h> | |
05e487d9 | 14 | #include <linux/delay.h> |
1094ebe9 JC |
15 | #include <linux/io.h> |
16 | #include <linux/kernel.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/of.h> | |
19 | #include <linux/platform_device.h> | |
05e487d9 | 20 | #include <linux/reboot.h> |
1094ebe9 JC |
21 | #include <linux/watchdog.h> |
22 | ||
0dfd582e MO |
23 | #define WDT_RST 0x38 |
24 | #define WDT_EN 0x40 | |
25 | #define WDT_BITE_TIME 0x5C | |
1094ebe9 JC |
26 | |
27 | struct qcom_wdt { | |
28 | struct watchdog_device wdd; | |
29 | struct clk *clk; | |
30 | unsigned long rate; | |
05e487d9 | 31 | struct notifier_block restart_nb; |
1094ebe9 JC |
32 | void __iomem *base; |
33 | }; | |
34 | ||
35 | static inline | |
36 | struct qcom_wdt *to_qcom_wdt(struct watchdog_device *wdd) | |
37 | { | |
38 | return container_of(wdd, struct qcom_wdt, wdd); | |
39 | } | |
40 | ||
41 | static int qcom_wdt_start(struct watchdog_device *wdd) | |
42 | { | |
43 | struct qcom_wdt *wdt = to_qcom_wdt(wdd); | |
44 | ||
45 | writel(0, wdt->base + WDT_EN); | |
46 | writel(1, wdt->base + WDT_RST); | |
47 | writel(wdd->timeout * wdt->rate, wdt->base + WDT_BITE_TIME); | |
48 | writel(1, wdt->base + WDT_EN); | |
49 | return 0; | |
50 | } | |
51 | ||
52 | static int qcom_wdt_stop(struct watchdog_device *wdd) | |
53 | { | |
54 | struct qcom_wdt *wdt = to_qcom_wdt(wdd); | |
55 | ||
56 | writel(0, wdt->base + WDT_EN); | |
57 | return 0; | |
58 | } | |
59 | ||
60 | static int qcom_wdt_ping(struct watchdog_device *wdd) | |
61 | { | |
62 | struct qcom_wdt *wdt = to_qcom_wdt(wdd); | |
63 | ||
64 | writel(1, wdt->base + WDT_RST); | |
65 | return 0; | |
66 | } | |
67 | ||
68 | static int qcom_wdt_set_timeout(struct watchdog_device *wdd, | |
69 | unsigned int timeout) | |
70 | { | |
71 | wdd->timeout = timeout; | |
72 | return qcom_wdt_start(wdd); | |
73 | } | |
74 | ||
75 | static const struct watchdog_ops qcom_wdt_ops = { | |
76 | .start = qcom_wdt_start, | |
77 | .stop = qcom_wdt_stop, | |
78 | .ping = qcom_wdt_ping, | |
79 | .set_timeout = qcom_wdt_set_timeout, | |
80 | .owner = THIS_MODULE, | |
81 | }; | |
82 | ||
83 | static const struct watchdog_info qcom_wdt_info = { | |
84 | .options = WDIOF_KEEPALIVEPING | |
85 | | WDIOF_MAGICCLOSE | |
86 | | WDIOF_SETTIMEOUT, | |
87 | .identity = KBUILD_MODNAME, | |
88 | }; | |
89 | ||
05e487d9 JC |
90 | static int qcom_wdt_restart(struct notifier_block *nb, unsigned long action, |
91 | void *data) | |
92 | { | |
93 | struct qcom_wdt *wdt = container_of(nb, struct qcom_wdt, restart_nb); | |
94 | u32 timeout; | |
95 | ||
96 | /* | |
97 | * Trigger watchdog bite: | |
98 | * Setup BITE_TIME to be 128ms, and enable WDT. | |
99 | */ | |
100 | timeout = 128 * wdt->rate / 1000; | |
101 | ||
102 | writel(0, wdt->base + WDT_EN); | |
103 | writel(1, wdt->base + WDT_RST); | |
104 | writel(timeout, wdt->base + WDT_BITE_TIME); | |
105 | writel(1, wdt->base + WDT_EN); | |
106 | ||
107 | /* | |
108 | * Actually make sure the above sequence hits hardware before sleeping. | |
109 | */ | |
110 | wmb(); | |
111 | ||
112 | msleep(150); | |
113 | return NOTIFY_DONE; | |
114 | } | |
115 | ||
1094ebe9 JC |
116 | static int qcom_wdt_probe(struct platform_device *pdev) |
117 | { | |
118 | struct qcom_wdt *wdt; | |
119 | struct resource *res; | |
0dfd582e MO |
120 | struct device_node *np = pdev->dev.of_node; |
121 | u32 percpu_offset; | |
1094ebe9 JC |
122 | int ret; |
123 | ||
124 | wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL); | |
125 | if (!wdt) | |
126 | return -ENOMEM; | |
127 | ||
128 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
0dfd582e MO |
129 | |
130 | /* We use CPU0's DGT for the watchdog */ | |
131 | if (of_property_read_u32(np, "cpu-offset", &percpu_offset)) | |
132 | percpu_offset = 0; | |
133 | ||
134 | res->start += percpu_offset; | |
135 | res->end += percpu_offset; | |
136 | ||
1094ebe9 JC |
137 | wdt->base = devm_ioremap_resource(&pdev->dev, res); |
138 | if (IS_ERR(wdt->base)) | |
139 | return PTR_ERR(wdt->base); | |
140 | ||
141 | wdt->clk = devm_clk_get(&pdev->dev, NULL); | |
142 | if (IS_ERR(wdt->clk)) { | |
143 | dev_err(&pdev->dev, "failed to get input clock\n"); | |
144 | return PTR_ERR(wdt->clk); | |
145 | } | |
146 | ||
147 | ret = clk_prepare_enable(wdt->clk); | |
148 | if (ret) { | |
149 | dev_err(&pdev->dev, "failed to setup clock\n"); | |
150 | return ret; | |
151 | } | |
152 | ||
153 | /* | |
154 | * We use the clock rate to calculate the max timeout, so ensure it's | |
155 | * not zero to avoid a divide-by-zero exception. | |
156 | * | |
157 | * WATCHDOG_CORE assumes units of seconds, if the WDT is clocked such | |
158 | * that it would bite before a second elapses it's usefulness is | |
159 | * limited. Bail if this is the case. | |
160 | */ | |
161 | wdt->rate = clk_get_rate(wdt->clk); | |
162 | if (wdt->rate == 0 || | |
163 | wdt->rate > 0x10000000U) { | |
164 | dev_err(&pdev->dev, "invalid clock rate\n"); | |
165 | ret = -EINVAL; | |
166 | goto err_clk_unprepare; | |
167 | } | |
168 | ||
169 | wdt->wdd.dev = &pdev->dev; | |
170 | wdt->wdd.info = &qcom_wdt_info; | |
171 | wdt->wdd.ops = &qcom_wdt_ops; | |
172 | wdt->wdd.min_timeout = 1; | |
173 | wdt->wdd.max_timeout = 0x10000000U / wdt->rate; | |
6551881c | 174 | wdt->wdd.parent = &pdev->dev; |
1094ebe9 JC |
175 | |
176 | /* | |
177 | * If 'timeout-sec' unspecified in devicetree, assume a 30 second | |
178 | * default, unless the max timeout is less than 30 seconds, then use | |
179 | * the max instead. | |
180 | */ | |
181 | wdt->wdd.timeout = min(wdt->wdd.max_timeout, 30U); | |
182 | watchdog_init_timeout(&wdt->wdd, 0, &pdev->dev); | |
183 | ||
184 | ret = watchdog_register_device(&wdt->wdd); | |
185 | if (ret) { | |
186 | dev_err(&pdev->dev, "failed to register watchdog\n"); | |
187 | goto err_clk_unprepare; | |
188 | } | |
189 | ||
05e487d9 JC |
190 | /* |
191 | * WDT restart notifier has priority 0 (use as a last resort) | |
192 | */ | |
193 | wdt->restart_nb.notifier_call = qcom_wdt_restart; | |
194 | ret = register_restart_handler(&wdt->restart_nb); | |
195 | if (ret) | |
196 | dev_err(&pdev->dev, "failed to setup restart handler\n"); | |
197 | ||
1094ebe9 JC |
198 | platform_set_drvdata(pdev, wdt); |
199 | return 0; | |
200 | ||
201 | err_clk_unprepare: | |
202 | clk_disable_unprepare(wdt->clk); | |
203 | return ret; | |
204 | } | |
205 | ||
206 | static int qcom_wdt_remove(struct platform_device *pdev) | |
207 | { | |
208 | struct qcom_wdt *wdt = platform_get_drvdata(pdev); | |
209 | ||
05e487d9 | 210 | unregister_restart_handler(&wdt->restart_nb); |
1094ebe9 JC |
211 | watchdog_unregister_device(&wdt->wdd); |
212 | clk_disable_unprepare(wdt->clk); | |
213 | return 0; | |
214 | } | |
215 | ||
216 | static const struct of_device_id qcom_wdt_of_table[] = { | |
0dfd582e MO |
217 | { .compatible = "qcom,kpss-timer" }, |
218 | { .compatible = "qcom,scss-timer" }, | |
1094ebe9 JC |
219 | { }, |
220 | }; | |
221 | MODULE_DEVICE_TABLE(of, qcom_wdt_of_table); | |
222 | ||
223 | static struct platform_driver qcom_watchdog_driver = { | |
224 | .probe = qcom_wdt_probe, | |
225 | .remove = qcom_wdt_remove, | |
226 | .driver = { | |
227 | .name = KBUILD_MODNAME, | |
228 | .of_match_table = qcom_wdt_of_table, | |
229 | }, | |
230 | }; | |
231 | module_platform_driver(qcom_watchdog_driver); | |
232 | ||
233 | MODULE_DESCRIPTION("QCOM KPSS Watchdog Driver"); | |
234 | MODULE_LICENSE("GPL v2"); |