[linux-2.6-block.git] / drivers / watchdog / pnx833x_wdt.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 *  PNX833x Hardware Watchdog Driver
 *  Copyright 2008 NXP Semiconductors
 *  Daniel Laird <daniel.j.laird@nxp.com>
 *  Andre McCurdy <andre.mccurdy@nxp.com>
 *
 *  Heavily based upon - IndyDog	0.3
 *  A Hardware Watchdog Device for SGI IP22
 *
 * (c) Copyright 2002 Guido Guenther <agx@sigxcpu.org>, All Rights Reserved.
 *
 * based on softdog.c by Alan Cox <alan@redhat.com>
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/mm.h>
#include <linux/miscdevice.h>
#include <linux/watchdog.h>
#include <linux/notifier.h>
#include <linux/reboot.h>
#include <linux/init.h>
#include <asm/mach-pnx833x/pnx833x.h>

#define WATCHDOG_TIMEOUT 30		/* 30 sec Maximum timeout */
#define WATCHDOG_COUNT_FREQUENCY 68000000U /* Watchdog counts at 68MHZ. */
#define	PNX_WATCHDOG_TIMEOUT	(WATCHDOG_TIMEOUT * WATCHDOG_COUNT_FREQUENCY)
#define PNX_TIMEOUT_VALUE	2040000000U

/** CONFIG block */
#define PNX833X_CONFIG                      (0x07000U)
#define PNX833X_CONFIG_CPU_WATCHDOG         (0x54)
#define PNX833X_CONFIG_CPU_WATCHDOG_COMPARE (0x58)
#define PNX833X_CONFIG_CPU_COUNTERS_CONTROL (0x1c)

/** RESET block */
#define PNX833X_RESET                       (0x08000U)
#define PNX833X_RESET_CONFIG                (0x08)

static int pnx833x_wdt_alive;

/* Set default timeout in MHZ.*/
static int pnx833x_wdt_timeout = PNX_WATCHDOG_TIMEOUT;
module_param(pnx833x_wdt_timeout, int, 0);
MODULE_PARM_DESC(timeout, "Watchdog timeout in Mhz. (68Mhz clock), default="
			__MODULE_STRING(PNX_TIMEOUT_VALUE) "(30 seconds).");

static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
					__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

#define START_DEFAULT	1
static int start_enabled = START_DEFAULT;
module_param(start_enabled, int, 0);
MODULE_PARM_DESC(start_enabled, "Watchdog is started on module insertion "
				"(default=" __MODULE_STRING(START_DEFAULT) ")");

static void pnx833x_wdt_start(void)
{
	/* Enable watchdog causing reset. */
	PNX833X_REG(PNX833X_RESET + PNX833X_RESET_CONFIG) |= 0x1;
	/* Set timeout.*/
	PNX833X_REG(PNX833X_CONFIG +
		PNX833X_CONFIG_CPU_WATCHDOG_COMPARE) = pnx833x_wdt_timeout;
	/* Enable watchdog. */
	PNX833X_REG(PNX833X_CONFIG +
				PNX833X_CONFIG_CPU_COUNTERS_CONTROL) |= 0x1;

	pr_info("Started watchdog timer\n");
}

static void pnx833x_wdt_stop(void)
{
	/* Disable watchdog causing reset. */
	PNX833X_REG(PNX833X_RESET + PNX833X_CONFIG) &= 0xFFFFFFFE;
	/* Disable watchdog.*/
	PNX833X_REG(PNX833X_CONFIG +
			PNX833X_CONFIG_CPU_COUNTERS_CONTROL) &= 0xFFFFFFFE;

	pr_info("Stopped watchdog timer\n");
}

static void pnx833x_wdt_ping(void)
{
	PNX833X_REG(PNX833X_CONFIG +
		PNX833X_CONFIG_CPU_WATCHDOG_COMPARE) = pnx833x_wdt_timeout;
}

/*
 *	Allow only one person to hold it open
 */
static int pnx833x_wdt_open(struct inode *inode, struct file *file)
{
	if (test_and_set_bit(0, &pnx833x_wdt_alive))
		return -EBUSY;

	if (nowayout)
		__module_get(THIS_MODULE);

	/* Activate timer */
	if (!start_enabled)
		pnx833x_wdt_start();

	pnx833x_wdt_ping();

	pr_info("Started watchdog timer\n");

	return stream_open(inode, file);
}

static int pnx833x_wdt_release(struct inode *inode, struct file *file)
{
	/* Shut off the timer.
	 * Lock it in if it's a module and we defined ...NOWAYOUT */
	if (!nowayout)
		pnx833x_wdt_stop(); /* Turn the WDT off */

	clear_bit(0, &pnx833x_wdt_alive);
	return 0;
}

static ssize_t pnx833x_wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos)
{
	/* Refresh the timer. */
	if (len)
		pnx833x_wdt_ping();

	return len;
}

static long pnx833x_wdt_ioctl(struct file *file, unsigned int cmd,
							unsigned long arg)
{
	int options, new_timeout = 0;
	uint32_t timeout, timeout_left = 0;

	static const struct watchdog_info ident = {
		.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
		.firmware_version = 0,
		.identity = "Hardware Watchdog for PNX833x",
	};

	switch (cmd) {
	default:
		return -ENOTTY;

	case WDIOC_GETSUPPORT:
		if (copy_to_user((struct watchdog_info *)arg,
				 &ident, sizeof(ident)))
			return -EFAULT;
		return 0;

	case WDIOC_GETSTATUS:
	case WDIOC_GETBOOTSTATUS:
		return put_user(0, (int *)arg);

	case WDIOC_SETOPTIONS:
		if (get_user(options, (int *)arg))
			return -EFAULT;

		if (options & WDIOS_DISABLECARD)
			pnx833x_wdt_stop();

		if (options & WDIOS_ENABLECARD)
			pnx833x_wdt_start();

		return 0;

	case WDIOC_KEEPALIVE:
		pnx833x_wdt_ping();
		return 0;

	case WDIOC_SETTIMEOUT:
	{
		if (get_user(new_timeout, (int *)arg))
			return -EFAULT;

		pnx833x_wdt_timeout = new_timeout;
		PNX833X_REG(PNX833X_CONFIG +
			PNX833X_CONFIG_CPU_WATCHDOG_COMPARE) = new_timeout;
		return put_user(new_timeout, (int *)arg);
	}

	case WDIOC_GETTIMEOUT:
		timeout = PNX833X_REG(PNX833X_CONFIG +
					PNX833X_CONFIG_CPU_WATCHDOG_COMPARE);
		return put_user(timeout, (int *)arg);

	case WDIOC_GETTIMELEFT:
		timeout_left = PNX833X_REG(PNX833X_CONFIG +
						PNX833X_CONFIG_CPU_WATCHDOG);
		return put_user(timeout_left, (int *)arg);

	}
}

static int pnx833x_wdt_notify_sys(struct notifier_block *this,
					unsigned long code, void *unused)
{
	if (code == SYS_DOWN || code == SYS_HALT)
		pnx833x_wdt_stop(); /* Turn the WDT off */

	return NOTIFY_DONE;
}

static const struct file_operations pnx833x_wdt_fops = {
	.owner		= THIS_MODULE,
	.llseek		= no_llseek,
	.write		= pnx833x_wdt_write,
	.unlocked_ioctl	= pnx833x_wdt_ioctl,
	.compat_ioctl	= compat_ptr_ioctl,
	.open		= pnx833x_wdt_open,
	.release	= pnx833x_wdt_release,
};

static struct miscdevice pnx833x_wdt_miscdev = {
	.minor		= WATCHDOG_MINOR,
	.name		= "watchdog",
	.fops		= &pnx833x_wdt_fops,
};

static struct notifier_block pnx833x_wdt_notifier = {
	.notifier_call = pnx833x_wdt_notify_sys,
};

static int __init watchdog_init(void)
{
	int ret, cause;

	/* Lets check the reason for the reset.*/
	cause = PNX833X_REG(PNX833X_RESET);
	/*If bit 31 is set then watchdog was cause of reset.*/
	if (cause & 0x80000000) {
		pr_info("The system was previously reset due to the watchdog firing - please investigate...\n");
	}

	ret = register_reboot_notifier(&pnx833x_wdt_notifier);
	if (ret) {
		pr_err("cannot register reboot notifier (err=%d)\n", ret);
		return ret;
	}

	ret = misc_register(&pnx833x_wdt_miscdev);
	if (ret) {
		pr_err("cannot register miscdev on minor=%d (err=%d)\n",
		       WATCHDOG_MINOR, ret);
		unregister_reboot_notifier(&pnx833x_wdt_notifier);
		return ret;
	}

	pr_info("Hardware Watchdog Timer for PNX833x: Version 0.1\n");

	if (start_enabled)
		pnx833x_wdt_start();

	return 0;
}

static void __exit watchdog_exit(void)
{
	misc_deregister(&pnx833x_wdt_miscdev);
	unregister_reboot_notifier(&pnx833x_wdt_notifier);
}

module_init(watchdog_init);
module_exit(watchdog_exit);

MODULE_AUTHOR("Daniel Laird/Andre McCurdy");
MODULE_DESCRIPTION("Hardware Watchdog Device for PNX833x");
MODULE_LICENSE("GPL");
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
33c050c5 DL	2	/*
	3	* PNX833x Hardware Watchdog Driver
	4	* Copyright 2008 NXP Semiconductors
	5	* Daniel Laird <daniel.j.laird@nxp.com>
	6	* Andre McCurdy <andre.mccurdy@nxp.com>
	7	*
	8	* Heavily based upon - IndyDog 0.3
	9	* A Hardware Watchdog Device for SGI IP22
	10	*
	11	* (c) Copyright 2002 Guido Guenther <agx@sigxcpu.org>, All Rights Reserved.
	12	*
33c050c5 DL	13	* based on softdog.c by Alan Cox <alan@redhat.com>
	14	*/
	15
27c766aa JP	16	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27c766aa JP	17
33c050c5 DL	18	#include <linux/module.h>
	19	#include <linux/moduleparam.h>
	20	#include <linux/types.h>
	21	#include <linux/kernel.h>
	22	#include <linux/fs.h>
	23	#include <linux/mm.h>
	24	#include <linux/miscdevice.h>
	25	#include <linux/watchdog.h>
	26	#include <linux/notifier.h>
	27	#include <linux/reboot.h>
	28	#include <linux/init.h>
	29	#include <asm/mach-pnx833x/pnx833x.h>
	30
33c050c5 DL	31	#define WATCHDOG_TIMEOUT 30 /* 30 sec Maximum timeout */
33c050c5 DL	32	#define WATCHDOG_COUNT_FREQUENCY 68000000U /* Watchdog counts at 68MHZ. */
76550d32 RD	33	#define PNX_WATCHDOG_TIMEOUT (WATCHDOG_TIMEOUT * WATCHDOG_COUNT_FREQUENCY)
76550d32 RD	34	#define PNX_TIMEOUT_VALUE 2040000000U
33c050c5 DL	35
	36	/** CONFIG block */
	37	#define PNX833X_CONFIG (0x07000U)
	38	#define PNX833X_CONFIG_CPU_WATCHDOG (0x54)
	39	#define PNX833X_CONFIG_CPU_WATCHDOG_COMPARE (0x58)
	40	#define PNX833X_CONFIG_CPU_COUNTERS_CONTROL (0x1c)
	41
	42	/** RESET block */
	43	#define PNX833X_RESET (0x08000U)
	44	#define PNX833X_RESET_CONFIG (0x08)
	45
	46	static int pnx833x_wdt_alive;
	47
	48	/* Set default timeout in MHZ.*/
76550d32	49	static int pnx833x_wdt_timeout = PNX_WATCHDOG_TIMEOUT;
33c050c5 DL	50	module_param(pnx833x_wdt_timeout, int, 0);
33c050c5 DL	51	MODULE_PARM_DESC(timeout, "Watchdog timeout in Mhz. (68Mhz clock), default="
76550d32	52	__MODULE_STRING(PNX_TIMEOUT_VALUE) "(30 seconds).");
33c050c5	53
86a1e189 WVS	54	static bool nowayout = WATCHDOG_NOWAYOUT;
86a1e189 WVS	55	module_param(nowayout, bool, 0);
33c050c5 DL	56	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
	57	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	58
76550d32 RD	59	#define START_DEFAULT 1
76550d32 RD	60	static int start_enabled = START_DEFAULT;
33c050c5 DL	61	module_param(start_enabled, int, 0);
33c050c5 DL	62	MODULE_PARM_DESC(start_enabled, "Watchdog is started on module insertion "
76550d32	63	"(default=" __MODULE_STRING(START_DEFAULT) ")");
33c050c5 DL	64
	65	static void pnx833x_wdt_start(void)
	66	{
	67	/* Enable watchdog causing reset. */
	68	PNX833X_REG(PNX833X_RESET + PNX833X_RESET_CONFIG) \|= 0x1;
	69	/* Set timeout.*/
	70	PNX833X_REG(PNX833X_CONFIG +
	71	PNX833X_CONFIG_CPU_WATCHDOG_COMPARE) = pnx833x_wdt_timeout;
	72	/* Enable watchdog. */
	73	PNX833X_REG(PNX833X_CONFIG +
	74	PNX833X_CONFIG_CPU_COUNTERS_CONTROL) \|= 0x1;
	75
27c766aa	76	pr_info("Started watchdog timer\n");
33c050c5 DL	77	}
	78
	79	static void pnx833x_wdt_stop(void)
	80	{
	81	/* Disable watchdog causing reset. */
	82	PNX833X_REG(PNX833X_RESET + PNX833X_CONFIG) &= 0xFFFFFFFE;
	83	/* Disable watchdog.*/
	84	PNX833X_REG(PNX833X_CONFIG +
	85	PNX833X_CONFIG_CPU_COUNTERS_CONTROL) &= 0xFFFFFFFE;
	86
27c766aa	87	pr_info("Stopped watchdog timer\n");
33c050c5 DL	88	}
	89
	90	static void pnx833x_wdt_ping(void)
	91	{
	92	PNX833X_REG(PNX833X_CONFIG +
	93	PNX833X_CONFIG_CPU_WATCHDOG_COMPARE) = pnx833x_wdt_timeout;
	94	}
	95
	96	/*
	97	* Allow only one person to hold it open
	98	*/
	99	static int pnx833x_wdt_open(struct inode inode, struct file file)
	100	{
	101	if (test_and_set_bit(0, &pnx833x_wdt_alive))
	102	return -EBUSY;
	103
	104	if (nowayout)
	105	__module_get(THIS_MODULE);
	106
	107	/* Activate timer */
	108	if (!start_enabled)
	109	pnx833x_wdt_start();
	110
	111	pnx833x_wdt_ping();
	112
27c766aa	113	pr_info("Started watchdog timer\n");
33c050c5	114
c5bf68fe	115	return stream_open(inode, file);
33c050c5 DL	116	}
	117
	118	static int pnx833x_wdt_release(struct inode inode, struct file file)
	119	{
	120	/* Shut off the timer.
	121	* Lock it in if it's a module and we defined ...NOWAYOUT */
	122	if (!nowayout)
	123	pnx833x_wdt_stop(); /* Turn the WDT off */
	124
	125	clear_bit(0, &pnx833x_wdt_alive);
	126	return 0;
	127	}
	128
	129	static ssize_t pnx833x_wdt_write(struct file file, const char data, size_t len, loff_t *ppos)
	130	{
	131	/* Refresh the timer. */
	132	if (len)
	133	pnx833x_wdt_ping();
	134
	135	return len;
	136	}
	137
	138	static long pnx833x_wdt_ioctl(struct file *file, unsigned int cmd,
	139	unsigned long arg)
	140	{
	141	int options, new_timeout = 0;
	142	uint32_t timeout, timeout_left = 0;
	143
42747d71	144	static const struct watchdog_info ident = {
33c050c5 DL	145	.options = WDIOF_KEEPALIVEPING \| WDIOF_SETTIMEOUT,
	146	.firmware_version = 0,
	147	.identity = "Hardware Watchdog for PNX833x",
	148	};
	149
	150	switch (cmd) {
	151	default:
	152	return -ENOTTY;
	153
	154	case WDIOC_GETSUPPORT:
	155	if (copy_to_user((struct watchdog_info *)arg,
	156	&ident, sizeof(ident)))
	157	return -EFAULT;
	158	return 0;
	159
	160	case WDIOC_GETSTATUS:
	161	case WDIOC_GETBOOTSTATUS:
	162	return put_user(0, (int *)arg);
	163
	164	case WDIOC_SETOPTIONS:
	165	if (get_user(options, (int *)arg))
	166	return -EFAULT;
	167
	168	if (options & WDIOS_DISABLECARD)
	169	pnx833x_wdt_stop();
	170
	171	if (options & WDIOS_ENABLECARD)
	172	pnx833x_wdt_start();
	173
	174	return 0;
	175
	176	case WDIOC_KEEPALIVE:
	177	pnx833x_wdt_ping();
	178	return 0;
	179
	180	case WDIOC_SETTIMEOUT:
	181	{
	182	if (get_user(new_timeout, (int *)arg))
	183	return -EFAULT;
	184
	185	pnx833x_wdt_timeout = new_timeout;
	186	PNX833X_REG(PNX833X_CONFIG +
	187	PNX833X_CONFIG_CPU_WATCHDOG_COMPARE) = new_timeout;
	188	return put_user(new_timeout, (int *)arg);
	189	}
	190
	191	case WDIOC_GETTIMEOUT:
	192	timeout = PNX833X_REG(PNX833X_CONFIG +
	193	PNX833X_CONFIG_CPU_WATCHDOG_COMPARE);
	194	return put_user(timeout, (int *)arg);
	195
	196	case WDIOC_GETTIMELEFT:
	197	timeout_left = PNX833X_REG(PNX833X_CONFIG +
	198	PNX833X_CONFIG_CPU_WATCHDOG);
	199	return put_user(timeout_left, (int *)arg);
	200
	201	}
	202	}
	203
	204	static int pnx833x_wdt_notify_sys(struct notifier_block *this,
	205	unsigned long code, void *unused)
	206	{
	207	if (code == SYS_DOWN \|\| code == SYS_HALT)
	208	pnx833x_wdt_stop(); /* Turn the WDT off */
209
210	return NOTIFY_DONE;
211	}
212
213	static const struct file_operations pnx833x_wdt_fops = {
214	.owner = THIS_MODULE,
215	.llseek = no_llseek,
216	.write = pnx833x_wdt_write,
217	.unlocked_ioctl = pnx833x_wdt_ioctl,
b6dfb247	218	.compat_ioctl = compat_ptr_ioctl,
33c050c5 DL	219	.open = pnx833x_wdt_open,
	220	.release = pnx833x_wdt_release,
	221	};
	222
	223	static struct miscdevice pnx833x_wdt_miscdev = {
	224	.minor = WATCHDOG_MINOR,
	225	.name = "watchdog",
	226	.fops = &pnx833x_wdt_fops,
	227	};
	228
	229	static struct notifier_block pnx833x_wdt_notifier = {
	230	.notifier_call = pnx833x_wdt_notify_sys,
	231	};
	232
33c050c5 DL	233	static int __init watchdog_init(void)
	234	{
	235	int ret, cause;
	236
	237	/* Lets check the reason for the reset.*/
	238	cause = PNX833X_REG(PNX833X_RESET);
	239	/If bit 31 is set then watchdog was cause of reset./
	240	if (cause & 0x80000000) {
27c766aa	241	pr_info("The system was previously reset due to the watchdog firing - please investigate...\n");
33c050c5 DL	242	}
	243
	244	ret = register_reboot_notifier(&pnx833x_wdt_notifier);
	245	if (ret) {
27c766aa	246	pr_err("cannot register reboot notifier (err=%d)\n", ret);
33c050c5 DL	247	return ret;
	248	}
	249
	250	ret = misc_register(&pnx833x_wdt_miscdev);
	251	if (ret) {
27c766aa JP	252	pr_err("cannot register miscdev on minor=%d (err=%d)\n",
27c766aa JP	253	WATCHDOG_MINOR, ret);
33c050c5 DL	254	unregister_reboot_notifier(&pnx833x_wdt_notifier);
	255	return ret;
	256	}
	257
27c766aa JP	258	pr_info("Hardware Watchdog Timer for PNX833x: Version 0.1\n");
27c766aa JP	259
33c050c5 DL	260	if (start_enabled)
	261	pnx833x_wdt_start();
	262
	263	return 0;
	264	}
	265
	266	static void __exit watchdog_exit(void)
	267	{
	268	misc_deregister(&pnx833x_wdt_miscdev);
	269	unregister_reboot_notifier(&pnx833x_wdt_notifier);
	270	}
	271
	272	module_init(watchdog_init);
	273	module_exit(watchdog_exit);
	274
	275	MODULE_AUTHOR("Daniel Laird/Andre McCurdy");
	276	MODULE_DESCRIPTION("Hardware Watchdog Device for PNX833x");
	277	MODULE_LICENSE("GPL");