Commit | Line | Data |
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d0173278 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
1da177e4 LT |
2 | /* |
3 | * Berkshire PCI-PC Watchdog Card Driver | |
4 | * | |
39e3a055 | 5 | * (c) Copyright 2003-2007 Wim Van Sebroeck <wim@iguana.be>. |
1da177e4 LT |
6 | * |
7 | * Based on source code of the following authors: | |
8 | * Ken Hollis <kenji@bitgate.com>, | |
9 | * Lindsay Harris <lindsay@bluegum.com>, | |
29fa0586 | 10 | * Alan Cox <alan@lxorguk.ukuu.org.uk>, |
1da177e4 LT |
11 | * Matt Domsch <Matt_Domsch@dell.com>, |
12 | * Rob Radez <rob@osinvestor.com> | |
13 | * | |
1da177e4 LT |
14 | * Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor |
15 | * provide warranty for any of this software. This material is | |
16 | * provided "AS-IS" and at no charge. | |
17 | */ | |
18 | ||
19 | /* | |
58b519f3 | 20 | * A bells and whistles driver is available from: |
b3faed63 WVS |
21 | * http://www.kernel.org/pub/linux/kernel/people/wim/pcwd/pcwd_pci/ |
22 | * | |
143a2e54 WVS |
23 | * More info available at |
24 | * http://www.berkprod.com/ or http://www.pcwatchdog.com/ | |
1da177e4 LT |
25 | */ |
26 | ||
27 | /* | |
28 | * Includes, defines, variables, module parameters, ... | |
29 | */ | |
30 | ||
27c766aa JP |
31 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
32 | ||
c315b7e8 WVS |
33 | #include <linux/module.h> /* For module specific items */ |
34 | #include <linux/moduleparam.h> /* For new moduleparam's */ | |
35 | #include <linux/types.h> /* For standard types (like size_t) */ | |
36 | #include <linux/errno.h> /* For the -ENODEV/... values */ | |
37 | #include <linux/kernel.h> /* For printk/panic/... */ | |
38 | #include <linux/delay.h> /* For mdelay function */ | |
487722cf | 39 | #include <linux/miscdevice.h> /* For struct miscdevice */ |
c315b7e8 WVS |
40 | #include <linux/watchdog.h> /* For the watchdog specific items */ |
41 | #include <linux/notifier.h> /* For notifier support */ | |
42 | #include <linux/reboot.h> /* For reboot_notifier stuff */ | |
43 | #include <linux/init.h> /* For __init/__exit/... */ | |
44 | #include <linux/fs.h> /* For file operations */ | |
45 | #include <linux/pci.h> /* For pci functions */ | |
46 | #include <linux/ioport.h> /* For io-port access */ | |
47 | #include <linux/spinlock.h> /* For spin_lock/spin_unlock/... */ | |
089ab079 WVS |
48 | #include <linux/uaccess.h> /* For copy_to_user/put_user/... */ |
49 | #include <linux/io.h> /* For inb/outb/... */ | |
1da177e4 LT |
50 | |
51 | /* Module and version information */ | |
39e3a055 | 52 | #define WATCHDOG_VERSION "1.03" |
1da177e4 LT |
53 | #define WATCHDOG_DRIVER_NAME "PCI-PC Watchdog" |
54 | #define WATCHDOG_NAME "pcwd_pci" | |
27c766aa | 55 | #define DRIVER_VERSION WATCHDOG_DRIVER_NAME " driver, v" WATCHDOG_VERSION |
1da177e4 LT |
56 | |
57 | /* Stuff for the PCI ID's */ | |
58 | #ifndef PCI_VENDOR_ID_QUICKLOGIC | |
59 | #define PCI_VENDOR_ID_QUICKLOGIC 0x11e3 | |
60 | #endif | |
61 | ||
62 | #ifndef PCI_DEVICE_ID_WATCHDOG_PCIPCWD | |
63 | #define PCI_DEVICE_ID_WATCHDOG_PCIPCWD 0x5030 | |
64 | #endif | |
65 | ||
66 | /* | |
67 | * These are the defines that describe the control status bits for the | |
68 | * PCI-PC Watchdog card. | |
69 | */ | |
a0800f6d WVS |
70 | /* Port 1 : Control Status #1 */ |
71 | #define WD_PCI_WTRP 0x01 /* Watchdog Trip status */ | |
72 | #define WD_PCI_HRBT 0x02 /* Watchdog Heartbeat */ | |
73 | #define WD_PCI_TTRP 0x04 /* Temperature Trip status */ | |
74 | #define WD_PCI_RL2A 0x08 /* Relay 2 Active */ | |
75 | #define WD_PCI_RL1A 0x10 /* Relay 1 Active */ | |
143a2e54 WVS |
76 | #define WD_PCI_R2DS 0x40 /* Relay 2 Disable Temperature-trip / |
77 | reset */ | |
a0800f6d WVS |
78 | #define WD_PCI_RLY2 0x80 /* Activate Relay 2 on the board */ |
79 | /* Port 2 : Control Status #2 */ | |
80 | #define WD_PCI_WDIS 0x10 /* Watchdog Disable */ | |
81 | #define WD_PCI_ENTP 0x20 /* Enable Temperature Trip Reset */ | |
82 | #define WD_PCI_WRSP 0x40 /* Watchdog wrote response */ | |
83 | #define WD_PCI_PCMD 0x80 /* PC has sent command */ | |
1da177e4 LT |
84 | |
85 | /* according to documentation max. time to process a command for the pci | |
86 | * watchdog card is 100 ms, so we give it 150 ms to do it's job */ | |
87 | #define PCI_COMMAND_TIMEOUT 150 | |
88 | ||
89 | /* Watchdog's internal commands */ | |
a0800f6d WVS |
90 | #define CMD_GET_STATUS 0x04 |
91 | #define CMD_GET_FIRMWARE_VERSION 0x08 | |
92 | #define CMD_READ_WATCHDOG_TIMEOUT 0x18 | |
93 | #define CMD_WRITE_WATCHDOG_TIMEOUT 0x19 | |
94 | #define CMD_GET_CLEAR_RESET_COUNT 0x84 | |
1da177e4 | 95 | |
39e3a055 | 96 | /* Watchdog's Dip Switch heartbeat values */ |
7944d3a5 | 97 | static const int heartbeat_tbl[] = { |
39e3a055 WVS |
98 | 5, /* OFF-OFF-OFF = 5 Sec */ |
99 | 10, /* OFF-OFF-ON = 10 Sec */ | |
100 | 30, /* OFF-ON-OFF = 30 Sec */ | |
101 | 60, /* OFF-ON-ON = 1 Min */ | |
102 | 300, /* ON-OFF-OFF = 5 Min */ | |
103 | 600, /* ON-OFF-ON = 10 Min */ | |
104 | 1800, /* ON-ON-OFF = 30 Min */ | |
105 | 3600, /* ON-ON-ON = 1 hour */ | |
106 | }; | |
107 | ||
1da177e4 LT |
108 | /* We can only use 1 card due to the /dev/watchdog restriction */ |
109 | static int cards_found; | |
110 | ||
111 | /* internal variables */ | |
112 | static int temp_panic; | |
113 | static unsigned long is_active; | |
114 | static char expect_release; | |
143a2e54 WVS |
115 | /* this is private data for each PCI-PC watchdog card */ |
116 | static struct { | |
117 | /* Wether or not the card has a temperature device */ | |
118 | int supports_temp; | |
119 | /* The card's boot status */ | |
120 | int boot_status; | |
121 | /* The cards I/O address */ | |
122 | unsigned long io_addr; | |
123 | /* the lock for io operations */ | |
124 | spinlock_t io_lock; | |
125 | /* the PCI-device */ | |
126 | struct pci_dev *pdev; | |
1da177e4 LT |
127 | } pcipcwd_private; |
128 | ||
129 | /* module parameters */ | |
195331d7 WVS |
130 | #define QUIET 0 /* Default */ |
131 | #define VERBOSE 1 /* Verbose */ | |
132 | #define DEBUG 2 /* print fancy stuff too */ | |
133 | static int debug = QUIET; | |
134 | module_param(debug, int, 0); | |
135 | MODULE_PARM_DESC(debug, "Debug level: 0=Quiet, 1=Verbose, 2=Debug (default=0)"); | |
136 | ||
143a2e54 WVS |
137 | #define WATCHDOG_HEARTBEAT 0 /* default heartbeat = |
138 | delay-time from dip-switches */ | |
1da177e4 LT |
139 | static int heartbeat = WATCHDOG_HEARTBEAT; |
140 | module_param(heartbeat, int, 0); | |
143a2e54 WVS |
141 | MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. " |
142 | "(0<heartbeat<65536 or 0=delay-time from dip-switches, default=" | |
143 | __MODULE_STRING(WATCHDOG_HEARTBEAT) ")"); | |
1da177e4 | 144 | |
86a1e189 WVS |
145 | static bool nowayout = WATCHDOG_NOWAYOUT; |
146 | module_param(nowayout, bool, 0); | |
143a2e54 WVS |
147 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" |
148 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
1da177e4 LT |
149 | |
150 | /* | |
151 | * Internal functions | |
152 | */ | |
153 | ||
154 | static int send_command(int cmd, int *msb, int *lsb) | |
155 | { | |
156 | int got_response, count; | |
157 | ||
195331d7 | 158 | if (debug >= DEBUG) |
27c766aa JP |
159 | pr_debug("sending following data cmd=0x%02x msb=0x%02x lsb=0x%02x\n", |
160 | cmd, *msb, *lsb); | |
195331d7 | 161 | |
1da177e4 LT |
162 | spin_lock(&pcipcwd_private.io_lock); |
163 | /* If a command requires data it should be written first. | |
164 | * Data for commands with 8 bits of data should be written to port 4. | |
165 | * Commands with 16 bits of data, should be written as LSB to port 4 | |
166 | * and MSB to port 5. | |
167 | * After the required data has been written then write the command to | |
168 | * port 6. */ | |
169 | outb_p(*lsb, pcipcwd_private.io_addr + 4); | |
170 | outb_p(*msb, pcipcwd_private.io_addr + 5); | |
171 | outb_p(cmd, pcipcwd_private.io_addr + 6); | |
172 | ||
173 | /* wait till the pci card processed the command, signaled by | |
174 | * the WRSP bit in port 2 and give it a max. timeout of | |
175 | * PCI_COMMAND_TIMEOUT to process */ | |
a0800f6d | 176 | got_response = inb_p(pcipcwd_private.io_addr + 2) & WD_PCI_WRSP; |
143a2e54 WVS |
177 | for (count = 0; (count < PCI_COMMAND_TIMEOUT) && (!got_response); |
178 | count++) { | |
1da177e4 | 179 | mdelay(1); |
a0800f6d | 180 | got_response = inb_p(pcipcwd_private.io_addr + 2) & WD_PCI_WRSP; |
1da177e4 LT |
181 | } |
182 | ||
195331d7 WVS |
183 | if (debug >= DEBUG) { |
184 | if (got_response) { | |
27c766aa JP |
185 | pr_debug("time to process command was: %d ms\n", |
186 | count); | |
195331d7 | 187 | } else { |
27c766aa | 188 | pr_debug("card did not respond on command!\n"); |
195331d7 WVS |
189 | } |
190 | } | |
191 | ||
1da177e4 LT |
192 | if (got_response) { |
193 | /* read back response */ | |
194 | *lsb = inb_p(pcipcwd_private.io_addr + 4); | |
195 | *msb = inb_p(pcipcwd_private.io_addr + 5); | |
196 | ||
197 | /* clear WRSP bit */ | |
198 | inb_p(pcipcwd_private.io_addr + 6); | |
195331d7 WVS |
199 | |
200 | if (debug >= DEBUG) | |
27c766aa JP |
201 | pr_debug("received following data for cmd=0x%02x: msb=0x%02x lsb=0x%02x\n", |
202 | cmd, *msb, *lsb); | |
1da177e4 | 203 | } |
195331d7 | 204 | |
1da177e4 LT |
205 | spin_unlock(&pcipcwd_private.io_lock); |
206 | ||
207 | return got_response; | |
208 | } | |
209 | ||
a0800f6d WVS |
210 | static inline void pcipcwd_check_temperature_support(void) |
211 | { | |
212 | if (inb_p(pcipcwd_private.io_addr) != 0xF0) | |
213 | pcipcwd_private.supports_temp = 1; | |
214 | } | |
215 | ||
216 | static int pcipcwd_get_option_switches(void) | |
217 | { | |
218 | int option_switches; | |
219 | ||
220 | option_switches = inb_p(pcipcwd_private.io_addr + 3); | |
221 | return option_switches; | |
222 | } | |
223 | ||
224 | static void pcipcwd_show_card_info(void) | |
225 | { | |
226 | int got_fw_rev, fw_rev_major, fw_rev_minor; | |
227 | char fw_ver_str[20]; /* The cards firmware version */ | |
228 | int option_switches; | |
229 | ||
143a2e54 WVS |
230 | got_fw_rev = send_command(CMD_GET_FIRMWARE_VERSION, &fw_rev_major, |
231 | &fw_rev_minor); | |
7944d3a5 | 232 | if (got_fw_rev) |
a0800f6d | 233 | sprintf(fw_ver_str, "%u.%02u", fw_rev_major, fw_rev_minor); |
7944d3a5 | 234 | else |
a0800f6d | 235 | sprintf(fw_ver_str, "<card no answer>"); |
a0800f6d WVS |
236 | |
237 | /* Get switch settings */ | |
238 | option_switches = pcipcwd_get_option_switches(); | |
239 | ||
27c766aa | 240 | pr_info("Found card at port 0x%04x (Firmware: %s) %s temp option\n", |
a0800f6d WVS |
241 | (int) pcipcwd_private.io_addr, fw_ver_str, |
242 | (pcipcwd_private.supports_temp ? "with" : "without")); | |
243 | ||
27c766aa | 244 | pr_info("Option switches (0x%02x): Temperature Reset Enable=%s, Power On Delay=%s\n", |
a0800f6d WVS |
245 | option_switches, |
246 | ((option_switches & 0x10) ? "ON" : "OFF"), | |
247 | ((option_switches & 0x08) ? "ON" : "OFF")); | |
248 | ||
249 | if (pcipcwd_private.boot_status & WDIOF_CARDRESET) | |
27c766aa | 250 | pr_info("Previous reset was caused by the Watchdog card\n"); |
a0800f6d WVS |
251 | |
252 | if (pcipcwd_private.boot_status & WDIOF_OVERHEAT) | |
27c766aa | 253 | pr_info("Card sensed a CPU Overheat\n"); |
a0800f6d WVS |
254 | |
255 | if (pcipcwd_private.boot_status == 0) | |
27c766aa | 256 | pr_info("No previous trip detected - Cold boot or reset\n"); |
a0800f6d WVS |
257 | } |
258 | ||
1da177e4 LT |
259 | static int pcipcwd_start(void) |
260 | { | |
261 | int stat_reg; | |
262 | ||
263 | spin_lock(&pcipcwd_private.io_lock); | |
264 | outb_p(0x00, pcipcwd_private.io_addr + 3); | |
265 | udelay(1000); | |
266 | ||
267 | stat_reg = inb_p(pcipcwd_private.io_addr + 2); | |
268 | spin_unlock(&pcipcwd_private.io_lock); | |
269 | ||
a0800f6d | 270 | if (stat_reg & WD_PCI_WDIS) { |
27c766aa | 271 | pr_err("Card timer not enabled\n"); |
1da177e4 LT |
272 | return -1; |
273 | } | |
274 | ||
195331d7 | 275 | if (debug >= VERBOSE) |
27c766aa | 276 | pr_debug("Watchdog started\n"); |
195331d7 | 277 | |
1da177e4 LT |
278 | return 0; |
279 | } | |
280 | ||
281 | static int pcipcwd_stop(void) | |
282 | { | |
283 | int stat_reg; | |
284 | ||
285 | spin_lock(&pcipcwd_private.io_lock); | |
286 | outb_p(0xA5, pcipcwd_private.io_addr + 3); | |
287 | udelay(1000); | |
288 | ||
289 | outb_p(0xA5, pcipcwd_private.io_addr + 3); | |
290 | udelay(1000); | |
291 | ||
292 | stat_reg = inb_p(pcipcwd_private.io_addr + 2); | |
293 | spin_unlock(&pcipcwd_private.io_lock); | |
294 | ||
a0800f6d | 295 | if (!(stat_reg & WD_PCI_WDIS)) { |
27c766aa | 296 | pr_err("Card did not acknowledge disable attempt\n"); |
1da177e4 LT |
297 | return -1; |
298 | } | |
299 | ||
195331d7 | 300 | if (debug >= VERBOSE) |
27c766aa | 301 | pr_debug("Watchdog stopped\n"); |
195331d7 | 302 | |
1da177e4 LT |
303 | return 0; |
304 | } | |
305 | ||
306 | static int pcipcwd_keepalive(void) | |
307 | { | |
308 | /* Re-trigger watchdog by writing to port 0 */ | |
045798b5 | 309 | spin_lock(&pcipcwd_private.io_lock); |
a0800f6d | 310 | outb_p(0x42, pcipcwd_private.io_addr); /* send out any data */ |
045798b5 | 311 | spin_unlock(&pcipcwd_private.io_lock); |
195331d7 WVS |
312 | |
313 | if (debug >= DEBUG) | |
27c766aa | 314 | pr_debug("Watchdog keepalive signal send\n"); |
195331d7 | 315 | |
1da177e4 LT |
316 | return 0; |
317 | } | |
318 | ||
319 | static int pcipcwd_set_heartbeat(int t) | |
320 | { | |
321 | int t_msb = t / 256; | |
322 | int t_lsb = t % 256; | |
323 | ||
324 | if ((t < 0x0001) || (t > 0xFFFF)) | |
325 | return -EINVAL; | |
326 | ||
327 | /* Write new heartbeat to watchdog */ | |
328 | send_command(CMD_WRITE_WATCHDOG_TIMEOUT, &t_msb, &t_lsb); | |
329 | ||
330 | heartbeat = t; | |
195331d7 | 331 | if (debug >= VERBOSE) |
27c766aa | 332 | pr_debug("New heartbeat: %d\n", heartbeat); |
195331d7 | 333 | |
1da177e4 LT |
334 | return 0; |
335 | } | |
336 | ||
337 | static int pcipcwd_get_status(int *status) | |
338 | { | |
a0800f6d | 339 | int control_status; |
1da177e4 | 340 | |
7944d3a5 | 341 | *status = 0; |
a0800f6d WVS |
342 | control_status = inb_p(pcipcwd_private.io_addr + 1); |
343 | if (control_status & WD_PCI_WTRP) | |
1da177e4 | 344 | *status |= WDIOF_CARDRESET; |
a0800f6d | 345 | if (control_status & WD_PCI_TTRP) { |
1da177e4 LT |
346 | *status |= WDIOF_OVERHEAT; |
347 | if (temp_panic) | |
27c766aa | 348 | panic(KBUILD_MODNAME ": Temperature overheat trip!\n"); |
1da177e4 LT |
349 | } |
350 | ||
195331d7 | 351 | if (debug >= DEBUG) |
27c766aa | 352 | pr_debug("Control Status #1: 0x%02x\n", control_status); |
195331d7 | 353 | |
1da177e4 LT |
354 | return 0; |
355 | } | |
356 | ||
357 | static int pcipcwd_clear_status(void) | |
358 | { | |
a0800f6d WVS |
359 | int control_status; |
360 | int msb; | |
361 | int reset_counter; | |
362 | ||
195331d7 | 363 | if (debug >= VERBOSE) |
27c766aa | 364 | pr_info("clearing watchdog trip status & LED\n"); |
195331d7 | 365 | |
a0800f6d WVS |
366 | control_status = inb_p(pcipcwd_private.io_addr + 1); |
367 | ||
195331d7 | 368 | if (debug >= DEBUG) { |
27c766aa JP |
369 | pr_debug("status was: 0x%02x\n", control_status); |
370 | pr_debug("sending: 0x%02x\n", | |
371 | (control_status & WD_PCI_R2DS) | WD_PCI_WTRP); | |
195331d7 WVS |
372 | } |
373 | ||
a0800f6d | 374 | /* clear trip status & LED and keep mode of relay 2 */ |
143a2e54 WVS |
375 | outb_p((control_status & WD_PCI_R2DS) | WD_PCI_WTRP, |
376 | pcipcwd_private.io_addr + 1); | |
a0800f6d WVS |
377 | |
378 | /* clear reset counter */ | |
7944d3a5 WVS |
379 | msb = 0; |
380 | reset_counter = 0xff; | |
a0800f6d WVS |
381 | send_command(CMD_GET_CLEAR_RESET_COUNT, &msb, &reset_counter); |
382 | ||
195331d7 | 383 | if (debug >= DEBUG) { |
27c766aa | 384 | pr_debug("reset count was: 0x%02x\n", reset_counter); |
195331d7 WVS |
385 | } |
386 | ||
1da177e4 LT |
387 | return 0; |
388 | } | |
389 | ||
390 | static int pcipcwd_get_temperature(int *temperature) | |
391 | { | |
392 | *temperature = 0; | |
393 | if (!pcipcwd_private.supports_temp) | |
394 | return -ENODEV; | |
395 | ||
045798b5 | 396 | spin_lock(&pcipcwd_private.io_lock); |
a0800f6d | 397 | *temperature = inb_p(pcipcwd_private.io_addr); |
045798b5 | 398 | spin_unlock(&pcipcwd_private.io_lock); |
a0800f6d | 399 | |
1da177e4 LT |
400 | /* |
401 | * Convert celsius to fahrenheit, since this was | |
402 | * the decided 'standard' for this return value. | |
403 | */ | |
a0800f6d | 404 | *temperature = (*temperature * 9 / 5) + 32; |
1da177e4 | 405 | |
195331d7 | 406 | if (debug >= DEBUG) { |
27c766aa | 407 | pr_debug("temperature is: %d F\n", *temperature); |
195331d7 WVS |
408 | } |
409 | ||
1da177e4 LT |
410 | return 0; |
411 | } | |
412 | ||
58b519f3 WVS |
413 | static int pcipcwd_get_timeleft(int *time_left) |
414 | { | |
415 | int msb; | |
416 | int lsb; | |
417 | ||
418 | /* Read the time that's left before rebooting */ | |
419 | /* Note: if the board is not yet armed then we will read 0xFFFF */ | |
420 | send_command(CMD_READ_WATCHDOG_TIMEOUT, &msb, &lsb); | |
421 | ||
422 | *time_left = (msb << 8) + lsb; | |
423 | ||
424 | if (debug >= VERBOSE) | |
27c766aa | 425 | pr_debug("Time left before next reboot: %d\n", *time_left); |
58b519f3 WVS |
426 | |
427 | return 0; | |
428 | } | |
429 | ||
1da177e4 LT |
430 | /* |
431 | * /dev/watchdog handling | |
432 | */ | |
433 | ||
434 | static ssize_t pcipcwd_write(struct file *file, const char __user *data, | |
a0800f6d | 435 | size_t len, loff_t *ppos) |
1da177e4 LT |
436 | { |
437 | /* See if we got the magic character 'V' and reload the timer */ | |
438 | if (len) { | |
439 | if (!nowayout) { | |
440 | size_t i; | |
441 | ||
442 | /* note: just in case someone wrote the magic character | |
443 | * five months ago... */ | |
444 | expect_release = 0; | |
445 | ||
143a2e54 WVS |
446 | /* scan to see whether or not we got the |
447 | * magic character */ | |
1da177e4 LT |
448 | for (i = 0; i != len; i++) { |
449 | char c; | |
7944d3a5 | 450 | if (get_user(c, data + i)) |
1da177e4 LT |
451 | return -EFAULT; |
452 | if (c == 'V') | |
453 | expect_release = 42; | |
454 | } | |
455 | } | |
456 | ||
457 | /* someone wrote to us, we should reload the timer */ | |
458 | pcipcwd_keepalive(); | |
459 | } | |
460 | return len; | |
461 | } | |
462 | ||
c9488520 AC |
463 | static long pcipcwd_ioctl(struct file *file, unsigned int cmd, |
464 | unsigned long arg) | |
1da177e4 LT |
465 | { |
466 | void __user *argp = (void __user *)arg; | |
467 | int __user *p = argp; | |
42747d71 | 468 | static const struct watchdog_info ident = { |
1da177e4 LT |
469 | .options = WDIOF_OVERHEAT | |
470 | WDIOF_CARDRESET | | |
471 | WDIOF_KEEPALIVEPING | | |
472 | WDIOF_SETTIMEOUT | | |
473 | WDIOF_MAGICCLOSE, | |
474 | .firmware_version = 1, | |
475 | .identity = WATCHDOG_DRIVER_NAME, | |
476 | }; | |
477 | ||
478 | switch (cmd) { | |
5eb82498 | 479 | case WDIOC_GETSUPPORT: |
7944d3a5 | 480 | return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0; |
5eb82498 WVS |
481 | |
482 | case WDIOC_GETSTATUS: | |
483 | { | |
484 | int status; | |
485 | pcipcwd_get_status(&status); | |
486 | return put_user(status, p); | |
487 | } | |
1da177e4 | 488 | |
5eb82498 WVS |
489 | case WDIOC_GETBOOTSTATUS: |
490 | return put_user(pcipcwd_private.boot_status, p); | |
1da177e4 | 491 | |
5eb82498 WVS |
492 | case WDIOC_GETTEMP: |
493 | { | |
494 | int temperature; | |
1da177e4 | 495 | |
5eb82498 WVS |
496 | if (pcipcwd_get_temperature(&temperature)) |
497 | return -EFAULT; | |
1da177e4 | 498 | |
5eb82498 WVS |
499 | return put_user(temperature, p); |
500 | } | |
1da177e4 | 501 | |
5eb82498 WVS |
502 | case WDIOC_SETOPTIONS: |
503 | { | |
504 | int new_options, retval = -EINVAL; | |
1da177e4 | 505 | |
7944d3a5 | 506 | if (get_user(new_options, p)) |
5eb82498 | 507 | return -EFAULT; |
1da177e4 | 508 | |
5eb82498 WVS |
509 | if (new_options & WDIOS_DISABLECARD) { |
510 | if (pcipcwd_stop()) | |
511 | return -EIO; | |
512 | retval = 0; | |
513 | } | |
1da177e4 | 514 | |
5eb82498 WVS |
515 | if (new_options & WDIOS_ENABLECARD) { |
516 | if (pcipcwd_start()) | |
517 | return -EIO; | |
518 | retval = 0; | |
519 | } | |
1da177e4 | 520 | |
5eb82498 WVS |
521 | if (new_options & WDIOS_TEMPPANIC) { |
522 | temp_panic = 1; | |
523 | retval = 0; | |
1da177e4 LT |
524 | } |
525 | ||
5eb82498 WVS |
526 | return retval; |
527 | } | |
1da177e4 | 528 | |
0c06090c WVS |
529 | case WDIOC_KEEPALIVE: |
530 | pcipcwd_keepalive(); | |
531 | return 0; | |
532 | ||
5eb82498 WVS |
533 | case WDIOC_SETTIMEOUT: |
534 | { | |
535 | int new_heartbeat; | |
1da177e4 | 536 | |
5eb82498 WVS |
537 | if (get_user(new_heartbeat, p)) |
538 | return -EFAULT; | |
1da177e4 | 539 | |
5eb82498 | 540 | if (pcipcwd_set_heartbeat(new_heartbeat)) |
143a2e54 | 541 | return -EINVAL; |
1da177e4 | 542 | |
5eb82498 | 543 | pcipcwd_keepalive(); |
5eb82498 | 544 | } |
bd490f82 | 545 | fallthrough; |
1da177e4 | 546 | |
5eb82498 WVS |
547 | case WDIOC_GETTIMEOUT: |
548 | return put_user(heartbeat, p); | |
58b519f3 | 549 | |
5eb82498 WVS |
550 | case WDIOC_GETTIMELEFT: |
551 | { | |
552 | int time_left; | |
58b519f3 | 553 | |
5eb82498 WVS |
554 | if (pcipcwd_get_timeleft(&time_left)) |
555 | return -EFAULT; | |
556 | ||
557 | return put_user(time_left, p); | |
558 | } | |
58b519f3 | 559 | |
5eb82498 WVS |
560 | default: |
561 | return -ENOTTY; | |
1da177e4 LT |
562 | } |
563 | } | |
564 | ||
565 | static int pcipcwd_open(struct inode *inode, struct file *file) | |
566 | { | |
567 | /* /dev/watchdog can only be opened once */ | |
a0800f6d | 568 | if (test_and_set_bit(0, &is_active)) { |
195331d7 | 569 | if (debug >= VERBOSE) |
27c766aa | 570 | pr_err("Attempt to open already opened device\n"); |
1da177e4 | 571 | return -EBUSY; |
a0800f6d | 572 | } |
1da177e4 LT |
573 | |
574 | /* Activate */ | |
575 | pcipcwd_start(); | |
576 | pcipcwd_keepalive(); | |
c5bf68fe | 577 | return stream_open(inode, file); |
1da177e4 LT |
578 | } |
579 | ||
580 | static int pcipcwd_release(struct inode *inode, struct file *file) | |
581 | { | |
582 | /* | |
583 | * Shut off the timer. | |
584 | */ | |
585 | if (expect_release == 42) { | |
586 | pcipcwd_stop(); | |
587 | } else { | |
27c766aa | 588 | pr_crit("Unexpected close, not stopping watchdog!\n"); |
1da177e4 LT |
589 | pcipcwd_keepalive(); |
590 | } | |
591 | expect_release = 0; | |
592 | clear_bit(0, &is_active); | |
593 | return 0; | |
594 | } | |
595 | ||
596 | /* | |
597 | * /dev/temperature handling | |
598 | */ | |
599 | ||
600 | static ssize_t pcipcwd_temp_read(struct file *file, char __user *data, | |
601 | size_t len, loff_t *ppos) | |
602 | { | |
603 | int temperature; | |
604 | ||
605 | if (pcipcwd_get_temperature(&temperature)) | |
606 | return -EFAULT; | |
607 | ||
7944d3a5 | 608 | if (copy_to_user(data, &temperature, 1)) |
1da177e4 LT |
609 | return -EFAULT; |
610 | ||
611 | return 1; | |
612 | } | |
613 | ||
614 | static int pcipcwd_temp_open(struct inode *inode, struct file *file) | |
615 | { | |
616 | if (!pcipcwd_private.supports_temp) | |
617 | return -ENODEV; | |
618 | ||
c5bf68fe | 619 | return stream_open(inode, file); |
1da177e4 LT |
620 | } |
621 | ||
622 | static int pcipcwd_temp_release(struct inode *inode, struct file *file) | |
623 | { | |
624 | return 0; | |
625 | } | |
626 | ||
627 | /* | |
628 | * Notify system | |
629 | */ | |
630 | ||
143a2e54 WVS |
631 | static int pcipcwd_notify_sys(struct notifier_block *this, unsigned long code, |
632 | void *unused) | |
1da177e4 | 633 | { |
7944d3a5 WVS |
634 | if (code == SYS_DOWN || code == SYS_HALT) |
635 | pcipcwd_stop(); /* Turn the WDT off */ | |
1da177e4 LT |
636 | |
637 | return NOTIFY_DONE; | |
638 | } | |
639 | ||
640 | /* | |
641 | * Kernel Interfaces | |
642 | */ | |
643 | ||
62322d25 | 644 | static const struct file_operations pcipcwd_fops = { |
1da177e4 LT |
645 | .owner = THIS_MODULE, |
646 | .llseek = no_llseek, | |
647 | .write = pcipcwd_write, | |
c9488520 | 648 | .unlocked_ioctl = pcipcwd_ioctl, |
b6dfb247 | 649 | .compat_ioctl = compat_ptr_ioctl, |
1da177e4 LT |
650 | .open = pcipcwd_open, |
651 | .release = pcipcwd_release, | |
652 | }; | |
653 | ||
654 | static struct miscdevice pcipcwd_miscdev = { | |
655 | .minor = WATCHDOG_MINOR, | |
656 | .name = "watchdog", | |
657 | .fops = &pcipcwd_fops, | |
658 | }; | |
659 | ||
62322d25 | 660 | static const struct file_operations pcipcwd_temp_fops = { |
1da177e4 LT |
661 | .owner = THIS_MODULE, |
662 | .llseek = no_llseek, | |
663 | .read = pcipcwd_temp_read, | |
664 | .open = pcipcwd_temp_open, | |
665 | .release = pcipcwd_temp_release, | |
666 | }; | |
667 | ||
668 | static struct miscdevice pcipcwd_temp_miscdev = { | |
669 | .minor = TEMP_MINOR, | |
670 | .name = "temperature", | |
671 | .fops = &pcipcwd_temp_fops, | |
672 | }; | |
673 | ||
674 | static struct notifier_block pcipcwd_notifier = { | |
675 | .notifier_call = pcipcwd_notify_sys, | |
676 | }; | |
677 | ||
678 | /* | |
679 | * Init & exit routines | |
680 | */ | |
681 | ||
2d991a16 | 682 | static int pcipcwd_card_init(struct pci_dev *pdev, |
1da177e4 LT |
683 | const struct pci_device_id *ent) |
684 | { | |
685 | int ret = -EIO; | |
1da177e4 LT |
686 | |
687 | cards_found++; | |
688 | if (cards_found == 1) | |
27c766aa | 689 | pr_info("%s\n", DRIVER_VERSION); |
1da177e4 LT |
690 | |
691 | if (cards_found > 1) { | |
27c766aa | 692 | pr_err("This driver only supports 1 device\n"); |
1da177e4 LT |
693 | return -ENODEV; |
694 | } | |
695 | ||
696 | if (pci_enable_device(pdev)) { | |
27c766aa | 697 | pr_err("Not possible to enable PCI Device\n"); |
1da177e4 LT |
698 | return -ENODEV; |
699 | } | |
700 | ||
701 | if (pci_resource_start(pdev, 0) == 0x0000) { | |
27c766aa | 702 | pr_err("No I/O-Address for card detected\n"); |
1da177e4 LT |
703 | ret = -ENODEV; |
704 | goto err_out_disable_device; | |
705 | } | |
706 | ||
5ce9c371 | 707 | spin_lock_init(&pcipcwd_private.io_lock); |
1da177e4 LT |
708 | pcipcwd_private.pdev = pdev; |
709 | pcipcwd_private.io_addr = pci_resource_start(pdev, 0); | |
710 | ||
711 | if (pci_request_regions(pdev, WATCHDOG_NAME)) { | |
27c766aa JP |
712 | pr_err("I/O address 0x%04x already in use\n", |
713 | (int) pcipcwd_private.io_addr); | |
1da177e4 LT |
714 | ret = -EIO; |
715 | goto err_out_disable_device; | |
716 | } | |
717 | ||
718 | /* get the boot_status */ | |
719 | pcipcwd_get_status(&pcipcwd_private.boot_status); | |
720 | ||
721 | /* clear the "card caused reboot" flag */ | |
722 | pcipcwd_clear_status(); | |
723 | ||
724 | /* disable card */ | |
725 | pcipcwd_stop(); | |
726 | ||
727 | /* Check whether or not the card supports the temperature device */ | |
a0800f6d | 728 | pcipcwd_check_temperature_support(); |
1da177e4 | 729 | |
a0800f6d WVS |
730 | /* Show info about the card itself */ |
731 | pcipcwd_show_card_info(); | |
1da177e4 | 732 | |
39e3a055 WVS |
733 | /* If heartbeat = 0 then we use the heartbeat from the dip-switches */ |
734 | if (heartbeat == 0) | |
143a2e54 WVS |
735 | heartbeat = |
736 | heartbeat_tbl[(pcipcwd_get_option_switches() & 0x07)]; | |
39e3a055 | 737 | |
143a2e54 WVS |
738 | /* Check that the heartbeat value is within it's range ; |
739 | * if not reset to the default */ | |
1da177e4 LT |
740 | if (pcipcwd_set_heartbeat(heartbeat)) { |
741 | pcipcwd_set_heartbeat(WATCHDOG_HEARTBEAT); | |
27c766aa | 742 | pr_info("heartbeat value must be 0<heartbeat<65536, using %d\n", |
1da177e4 LT |
743 | WATCHDOG_HEARTBEAT); |
744 | } | |
745 | ||
746 | ret = register_reboot_notifier(&pcipcwd_notifier); | |
747 | if (ret != 0) { | |
27c766aa | 748 | pr_err("cannot register reboot notifier (err=%d)\n", ret); |
1da177e4 LT |
749 | goto err_out_release_region; |
750 | } | |
751 | ||
752 | if (pcipcwd_private.supports_temp) { | |
753 | ret = misc_register(&pcipcwd_temp_miscdev); | |
754 | if (ret != 0) { | |
27c766aa JP |
755 | pr_err("cannot register miscdev on minor=%d (err=%d)\n", |
756 | TEMP_MINOR, ret); | |
1da177e4 LT |
757 | goto err_out_unregister_reboot; |
758 | } | |
759 | } | |
760 | ||
761 | ret = misc_register(&pcipcwd_miscdev); | |
762 | if (ret != 0) { | |
27c766aa JP |
763 | pr_err("cannot register miscdev on minor=%d (err=%d)\n", |
764 | WATCHDOG_MINOR, ret); | |
1da177e4 LT |
765 | goto err_out_misc_deregister; |
766 | } | |
767 | ||
27c766aa | 768 | pr_info("initialized. heartbeat=%d sec (nowayout=%d)\n", |
1da177e4 LT |
769 | heartbeat, nowayout); |
770 | ||
771 | return 0; | |
772 | ||
773 | err_out_misc_deregister: | |
774 | if (pcipcwd_private.supports_temp) | |
775 | misc_deregister(&pcipcwd_temp_miscdev); | |
776 | err_out_unregister_reboot: | |
777 | unregister_reboot_notifier(&pcipcwd_notifier); | |
778 | err_out_release_region: | |
779 | pci_release_regions(pdev); | |
780 | err_out_disable_device: | |
781 | pci_disable_device(pdev); | |
782 | return ret; | |
783 | } | |
784 | ||
4b12b896 | 785 | static void pcipcwd_card_exit(struct pci_dev *pdev) |
1da177e4 LT |
786 | { |
787 | /* Stop the timer before we leave */ | |
788 | if (!nowayout) | |
789 | pcipcwd_stop(); | |
790 | ||
791 | /* Deregister */ | |
792 | misc_deregister(&pcipcwd_miscdev); | |
793 | if (pcipcwd_private.supports_temp) | |
794 | misc_deregister(&pcipcwd_temp_miscdev); | |
795 | unregister_reboot_notifier(&pcipcwd_notifier); | |
796 | pci_release_regions(pdev); | |
797 | pci_disable_device(pdev); | |
798 | cards_found--; | |
799 | } | |
800 | ||
bc17f9dc | 801 | static const struct pci_device_id pcipcwd_pci_tbl[] = { |
1da177e4 LT |
802 | { PCI_VENDOR_ID_QUICKLOGIC, PCI_DEVICE_ID_WATCHDOG_PCIPCWD, |
803 | PCI_ANY_ID, PCI_ANY_ID, }, | |
804 | { 0 }, /* End of list */ | |
805 | }; | |
806 | MODULE_DEVICE_TABLE(pci, pcipcwd_pci_tbl); | |
807 | ||
808 | static struct pci_driver pcipcwd_driver = { | |
809 | .name = WATCHDOG_NAME, | |
810 | .id_table = pcipcwd_pci_tbl, | |
811 | .probe = pcipcwd_card_init, | |
82268714 | 812 | .remove = pcipcwd_card_exit, |
1da177e4 LT |
813 | }; |
814 | ||
5ce9c371 | 815 | module_pci_driver(pcipcwd_driver); |
1da177e4 LT |
816 | |
817 | MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>"); | |
818 | MODULE_DESCRIPTION("Berkshire PCI-PC Watchdog driver"); | |
819 | MODULE_LICENSE("GPL"); |