[linux-2.6-block.git] / drivers / watchdog / nuc900_wdt.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2009 Nuvoton technology corporation.
 *
 * Wan ZongShun <mcuos.com@gmail.com>
 */

#include <linux/bitops.h>
#include <linux/errno.h>
#include <linux/fs.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/kernel.h>
#include <linux/miscdevice.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/types.h>
#include <linux/watchdog.h>
#include <linux/uaccess.h>

#define REG_WTCR		0x1c
#define WTCLK			(0x01 << 10)
#define WTE			(0x01 << 7)	/*wdt enable*/
#define WTIS			(0x03 << 4)
#define WTIF			(0x01 << 3)
#define WTRF			(0x01 << 2)
#define WTRE			(0x01 << 1)
#define WTR			(0x01 << 0)
/*
 * The watchdog time interval can be calculated via following formula:
 * WTIS		real time interval (formula)
 * 0x00		((2^ 14 ) * ((external crystal freq) / 256))seconds
 * 0x01		((2^ 16 ) * ((external crystal freq) / 256))seconds
 * 0x02		((2^ 18 ) * ((external crystal freq) / 256))seconds
 * 0x03		((2^ 20 ) * ((external crystal freq) / 256))seconds
 *
 * The external crystal freq is 15Mhz in the nuc900 evaluation board.
 * So 0x00 = +-0.28 seconds, 0x01 = +-1.12 seconds, 0x02 = +-4.48 seconds,
 * 0x03 = +- 16.92 seconds..
 */
#define WDT_HW_TIMEOUT		0x02
#define WDT_TIMEOUT		(HZ/2)
#define WDT_HEARTBEAT		15

static int heartbeat = WDT_HEARTBEAT;
module_param(heartbeat, int, 0);
MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
	"(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");

static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

struct nuc900_wdt {
	struct clk	 *wdt_clock;
	struct platform_device *pdev;
	void __iomem	 *wdt_base;
	char		 expect_close;
	struct timer_list timer;
	spinlock_t       wdt_lock;
	unsigned long next_heartbeat;
};

static unsigned long nuc900wdt_busy;
static struct nuc900_wdt *nuc900_wdt;

static inline void nuc900_wdt_keepalive(void)
{
	unsigned int val;

	spin_lock(&nuc900_wdt->wdt_lock);

	val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
	val |= (WTR | WTIF);
	__raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);

	spin_unlock(&nuc900_wdt->wdt_lock);
}

static inline void nuc900_wdt_start(void)
{
	unsigned int val;

	spin_lock(&nuc900_wdt->wdt_lock);

	val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
	val |= (WTRE | WTE | WTR | WTCLK | WTIF);
	val &= ~WTIS;
	val |= (WDT_HW_TIMEOUT << 0x04);
	__raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);

	spin_unlock(&nuc900_wdt->wdt_lock);

	nuc900_wdt->next_heartbeat = jiffies + heartbeat * HZ;
	mod_timer(&nuc900_wdt->timer, jiffies + WDT_TIMEOUT);
}

static inline void nuc900_wdt_stop(void)
{
	unsigned int val;

	del_timer(&nuc900_wdt->timer);

	spin_lock(&nuc900_wdt->wdt_lock);

	val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
	val &= ~WTE;
	__raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);

	spin_unlock(&nuc900_wdt->wdt_lock);
}

static inline void nuc900_wdt_ping(void)
{
	nuc900_wdt->next_heartbeat = jiffies + heartbeat * HZ;
}

static int nuc900_wdt_open(struct inode *inode, struct file *file)
{

	if (test_and_set_bit(0, &nuc900wdt_busy))
		return -EBUSY;

	nuc900_wdt_start();

	return stream_open(inode, file);
}

static int nuc900_wdt_close(struct inode *inode, struct file *file)
{
	if (nuc900_wdt->expect_close == 42)
		nuc900_wdt_stop();
	else {
		dev_crit(&nuc900_wdt->pdev->dev,
			"Unexpected close, not stopping watchdog!\n");
		nuc900_wdt_ping();
	}

	nuc900_wdt->expect_close = 0;
	clear_bit(0, &nuc900wdt_busy);
	return 0;
}

static const struct watchdog_info nuc900_wdt_info = {
	.identity	= "nuc900 watchdog",
	.options	= WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
						WDIOF_MAGICCLOSE,
};

static long nuc900_wdt_ioctl(struct file *file,
					unsigned int cmd, unsigned long arg)
{
	void __user *argp = (void __user *)arg;
	int __user *p = argp;
	int new_value;

	switch (cmd) {
	case WDIOC_GETSUPPORT:
		return copy_to_user(argp, &nuc900_wdt_info,
				sizeof(nuc900_wdt_info)) ? -EFAULT : 0;
	case WDIOC_GETSTATUS:
	case WDIOC_GETBOOTSTATUS:
		return put_user(0, p);

	case WDIOC_KEEPALIVE:
		nuc900_wdt_ping();
		return 0;

	case WDIOC_SETTIMEOUT:
		if (get_user(new_value, p))
			return -EFAULT;

		heartbeat = new_value;
		nuc900_wdt_ping();

		return put_user(new_value, p);
	case WDIOC_GETTIMEOUT:
		return put_user(heartbeat, p);
	default:
		return -ENOTTY;
	}
}

static ssize_t nuc900_wdt_write(struct file *file, const char __user *data,
						size_t len, loff_t *ppos)
{
	if (!len)
		return 0;

	/* Scan for magic character */
	if (!nowayout) {
		size_t i;

		nuc900_wdt->expect_close = 0;

		for (i = 0; i < len; i++) {
			char c;
			if (get_user(c, data + i))
				return -EFAULT;
			if (c == 'V') {
				nuc900_wdt->expect_close = 42;
				break;
			}
		}
	}

	nuc900_wdt_ping();
	return len;
}

static void nuc900_wdt_timer_ping(struct timer_list *unused)
{
	if (time_before(jiffies, nuc900_wdt->next_heartbeat)) {
		nuc900_wdt_keepalive();
		mod_timer(&nuc900_wdt->timer, jiffies + WDT_TIMEOUT);
	} else
		dev_warn(&nuc900_wdt->pdev->dev, "Will reset the machine !\n");
}

static const struct file_operations nuc900wdt_fops = {
	.owner		= THIS_MODULE,
	.llseek		= no_llseek,
	.unlocked_ioctl	= nuc900_wdt_ioctl,
	.open		= nuc900_wdt_open,
	.release	= nuc900_wdt_close,
	.write		= nuc900_wdt_write,
};

static struct miscdevice nuc900wdt_miscdev = {
	.minor		= WATCHDOG_MINOR,
	.name		= "watchdog",
	.fops		= &nuc900wdt_fops,
};

static int nuc900wdt_probe(struct platform_device *pdev)
{
	int ret = 0;

	nuc900_wdt = devm_kzalloc(&pdev->dev, sizeof(*nuc900_wdt),
				GFP_KERNEL);
	if (!nuc900_wdt)
		return -ENOMEM;

	nuc900_wdt->pdev = pdev;

	spin_lock_init(&nuc900_wdt->wdt_lock);

	nuc900_wdt->wdt_base = devm_platform_ioremap_resource(pdev, 0);
	if (IS_ERR(nuc900_wdt->wdt_base))
		return PTR_ERR(nuc900_wdt->wdt_base);

	nuc900_wdt->wdt_clock = devm_clk_get(&pdev->dev, NULL);
	if (IS_ERR(nuc900_wdt->wdt_clock)) {
		dev_err(&pdev->dev, "failed to find watchdog clock source\n");
		return PTR_ERR(nuc900_wdt->wdt_clock);
	}

	clk_enable(nuc900_wdt->wdt_clock);

	timer_setup(&nuc900_wdt->timer, nuc900_wdt_timer_ping, 0);

	ret = misc_register(&nuc900wdt_miscdev);
	if (ret) {
		dev_err(&pdev->dev, "err register miscdev on minor=%d (%d)\n",
			WATCHDOG_MINOR, ret);
		goto err_clk;
	}

	return 0;

err_clk:
	clk_disable(nuc900_wdt->wdt_clock);
	return ret;
}

static int nuc900wdt_remove(struct platform_device *pdev)
{
	misc_deregister(&nuc900wdt_miscdev);

	clk_disable(nuc900_wdt->wdt_clock);

	return 0;
}

static struct platform_driver nuc900wdt_driver = {
	.probe		= nuc900wdt_probe,
	.remove		= nuc900wdt_remove,
	.driver		= {
		.name	= "nuc900-wdt",
	},
};

module_platform_driver(nuc900wdt_driver);

MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
MODULE_DESCRIPTION("Watchdog driver for NUC900");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:nuc900-wdt");
Commit	Line	Data
b886d83c	1	// SPDX-License-Identifier: GPL-2.0-only
0400e313 WZ	2	/*
	3	* Copyright (c) 2009 Nuvoton technology corporation.
	4	*
	5	* Wan ZongShun <mcuos.com@gmail.com>
0400e313 WZ	6	*/
	7
	8	#include <linux/bitops.h>
	9	#include <linux/errno.h>
	10	#include <linux/fs.h>
0400e313 WZ	11	#include <linux/io.h>
	12	#include <linux/clk.h>
	13	#include <linux/kernel.h>
	14	#include <linux/miscdevice.h>
	15	#include <linux/module.h>
	16	#include <linux/moduleparam.h>
	17	#include <linux/platform_device.h>
5a0e3ad6	18	#include <linux/slab.h>
0400e313 WZ	19	#include <linux/interrupt.h>
	20	#include <linux/types.h>
	21	#include <linux/watchdog.h>
	22	#include <linux/uaccess.h>
	23
	24	#define REG_WTCR 0x1c
	25	#define WTCLK (0x01 << 10)
	26	#define WTE (0x01 << 7) /wdt enable/
	27	#define WTIS (0x03 << 4)
	28	#define WTIF (0x01 << 3)
	29	#define WTRF (0x01 << 2)
	30	#define WTRE (0x01 << 1)
	31	#define WTR (0x01 << 0)
	32	/*
	33	* The watchdog time interval can be calculated via following formula:
	34	* WTIS real time interval (formula)
	35	* 0x00 ((2^ 14 ) * ((external crystal freq) / 256))seconds
	36	* 0x01 ((2^ 16 ) * ((external crystal freq) / 256))seconds
	37	* 0x02 ((2^ 18 ) * ((external crystal freq) / 256))seconds
	38	* 0x03 ((2^ 20 ) * ((external crystal freq) / 256))seconds
	39	*
	40	* The external crystal freq is 15Mhz in the nuc900 evaluation board.
	41	* So 0x00 = +-0.28 seconds, 0x01 = +-1.12 seconds, 0x02 = +-4.48 seconds,
	42	* 0x03 = +- 16.92 seconds..
	43	*/
	44	#define WDT_HW_TIMEOUT 0x02
	45	#define WDT_TIMEOUT (HZ/2)
	46	#define WDT_HEARTBEAT 15
	47
	48	static int heartbeat = WDT_HEARTBEAT;
	49	module_param(heartbeat, int, 0);
	50	MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
	51	"(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
	52
86a1e189 WVS	53	static bool nowayout = WATCHDOG_NOWAYOUT;
86a1e189 WVS	54	module_param(nowayout, bool, 0);
0400e313 WZ	55	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
	56	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	57
	58	struct nuc900_wdt {
0400e313 WZ	59	struct clk *wdt_clock;
	60	struct platform_device *pdev;
	61	void __iomem *wdt_base;
	62	char expect_close;
	63	struct timer_list timer;
	64	spinlock_t wdt_lock;
	65	unsigned long next_heartbeat;
	66	};
	67
	68	static unsigned long nuc900wdt_busy;
e352829a	69	static struct nuc900_wdt *nuc900_wdt;
0400e313 WZ	70
	71	static inline void nuc900_wdt_keepalive(void)
	72	{
	73	unsigned int val;
	74
	75	spin_lock(&nuc900_wdt->wdt_lock);
	76
	77	val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
	78	val \|= (WTR \| WTIF);
	79	__raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);
	80
	81	spin_unlock(&nuc900_wdt->wdt_lock);
	82	}
	83
	84	static inline void nuc900_wdt_start(void)
	85	{
	86	unsigned int val;
	87
	88	spin_lock(&nuc900_wdt->wdt_lock);
	89
	90	val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
	91	val \|= (WTRE \| WTE \| WTR \| WTCLK \| WTIF);
	92	val &= ~WTIS;
	93	val \|= (WDT_HW_TIMEOUT << 0x04);
	94	__raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);
	95
	96	spin_unlock(&nuc900_wdt->wdt_lock);
	97
	98	nuc900_wdt->next_heartbeat = jiffies + heartbeat * HZ;
	99	mod_timer(&nuc900_wdt->timer, jiffies + WDT_TIMEOUT);
	100	}
	101
	102	static inline void nuc900_wdt_stop(void)
	103	{
	104	unsigned int val;
	105
	106	del_timer(&nuc900_wdt->timer);
	107
	108	spin_lock(&nuc900_wdt->wdt_lock);
	109
	110	val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
	111	val &= ~WTE;
	112	__raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);
	113
	114	spin_unlock(&nuc900_wdt->wdt_lock);
	115	}
	116
	117	static inline void nuc900_wdt_ping(void)
	118	{
	119	nuc900_wdt->next_heartbeat = jiffies + heartbeat * HZ;
	120	}
	121
	122	static int nuc900_wdt_open(struct inode inode, struct file file)
	123	{
	124
	125	if (test_and_set_bit(0, &nuc900wdt_busy))
	126	return -EBUSY;
	127
	128	nuc900_wdt_start();
	129
c5bf68fe	130	return stream_open(inode, file);
0400e313 WZ	131	}
	132
	133	static int nuc900_wdt_close(struct inode inode, struct file file)
	134	{
	135	if (nuc900_wdt->expect_close == 42)
	136	nuc900_wdt_stop();
	137	else {
	138	dev_crit(&nuc900_wdt->pdev->dev,
	139	"Unexpected close, not stopping watchdog!\n");
	140	nuc900_wdt_ping();
	141	}
	142
	143	nuc900_wdt->expect_close = 0;
	144	clear_bit(0, &nuc900wdt_busy);
	145	return 0;
	146	}
	147
	148	static const struct watchdog_info nuc900_wdt_info = {
	149	.identity = "nuc900 watchdog",
	150	.options = WDIOF_SETTIMEOUT \| WDIOF_KEEPALIVEPING \|
	151	WDIOF_MAGICCLOSE,
	152	};
	153
	154	static long nuc900_wdt_ioctl(struct file *file,
	155	unsigned int cmd, unsigned long arg)
	156	{
	157	void __user argp = (void __user )arg;
	158	int __user *p = argp;
	159	int new_value;
	160
	161	switch (cmd) {
	162	case WDIOC_GETSUPPORT:
	163	return copy_to_user(argp, &nuc900_wdt_info,
	164	sizeof(nuc900_wdt_info)) ? -EFAULT : 0;
	165	case WDIOC_GETSTATUS:
	166	case WDIOC_GETBOOTSTATUS:
	167	return put_user(0, p);
	168
	169	case WDIOC_KEEPALIVE:
	170	nuc900_wdt_ping();
	171	return 0;
	172
	173	case WDIOC_SETTIMEOUT:
	174	if (get_user(new_value, p))
	175	return -EFAULT;
	176
	177	heartbeat = new_value;
	178	nuc900_wdt_ping();
	179
	180	return put_user(new_value, p);
	181	case WDIOC_GETTIMEOUT:
	182	return put_user(heartbeat, p);
	183	default:
	184	return -ENOTTY;
	185	}
	186	}
	187
	188	static ssize_t nuc900_wdt_write(struct file file, const char __user data,
	189	size_t len, loff_t *ppos)
	190	{
	191	if (!len)
	192	return 0;
	193
	194	/* Scan for magic character */
195	if (!nowayout) {
196	size_t i;
197
198	nuc900_wdt->expect_close = 0;
199
200	for (i = 0; i < len; i++) {
201	char c;
202	if (get_user(c, data + i))
203	return -EFAULT;
204	if (c == 'V') {
205	nuc900_wdt->expect_close = 42;
206	break;
207	}
208	}
209	}
210
211	nuc900_wdt_ping();
212	return len;
213	}
214
e99e88a9	215	static void nuc900_wdt_timer_ping(struct timer_list *unused)
0400e313 WZ	216	{
	217	if (time_before(jiffies, nuc900_wdt->next_heartbeat)) {
	218	nuc900_wdt_keepalive();
	219	mod_timer(&nuc900_wdt->timer, jiffies + WDT_TIMEOUT);
	220	} else
	221	dev_warn(&nuc900_wdt->pdev->dev, "Will reset the machine !\n");
	222	}
	223
	224	static const struct file_operations nuc900wdt_fops = {
	225	.owner = THIS_MODULE,
	226	.llseek = no_llseek,
	227	.unlocked_ioctl = nuc900_wdt_ioctl,
	228	.open = nuc900_wdt_open,
	229	.release = nuc900_wdt_close,
	230	.write = nuc900_wdt_write,
	231	};
	232
	233	static struct miscdevice nuc900wdt_miscdev = {
	234	.minor = WATCHDOG_MINOR,
	235	.name = "watchdog",
	236	.fops = &nuc900wdt_fops,
	237	};
	238
2d991a16	239	static int nuc900wdt_probe(struct platform_device *pdev)
0400e313 WZ	240	{
	241	int ret = 0;
	242
3666eb02 JH	243	nuc900_wdt = devm_kzalloc(&pdev->dev, sizeof(*nuc900_wdt),
3666eb02 JH	244	GFP_KERNEL);
0400e313 WZ	245	if (!nuc900_wdt)
	246	return -ENOMEM;
	247
	248	nuc900_wdt->pdev = pdev;
	249
	250	spin_lock_init(&nuc900_wdt->wdt_lock);
	251
0f0a6a28	252	nuc900_wdt->wdt_base = devm_platform_ioremap_resource(pdev, 0);
3666eb02 JH	253	if (IS_ERR(nuc900_wdt->wdt_base))
3666eb02 JH	254	return PTR_ERR(nuc900_wdt->wdt_base);
0400e313	255
3666eb02	256	nuc900_wdt->wdt_clock = devm_clk_get(&pdev->dev, NULL);
0400e313 WZ	257	if (IS_ERR(nuc900_wdt->wdt_clock)) {
0400e313 WZ	258	dev_err(&pdev->dev, "failed to find watchdog clock source\n");
3666eb02	259	return PTR_ERR(nuc900_wdt->wdt_clock);
0400e313 WZ	260	}
	261
	262	clk_enable(nuc900_wdt->wdt_clock);
	263
e99e88a9	264	timer_setup(&nuc900_wdt->timer, nuc900_wdt_timer_ping, 0);
0400e313	265
2865e770 AL	266	ret = misc_register(&nuc900wdt_miscdev);
2865e770 AL	267	if (ret) {
0400e313 WZ	268	dev_err(&pdev->dev, "err register miscdev on minor=%d (%d)\n",
	269	WATCHDOG_MINOR, ret);
	270	goto err_clk;
	271	}
	272
	273	return 0;
	274
	275	err_clk:
	276	clk_disable(nuc900_wdt->wdt_clock);
0400e313 WZ	277	return ret;
	278	}
	279
4b12b896	280	static int nuc900wdt_remove(struct platform_device *pdev)
0400e313 WZ	281	{
	282	misc_deregister(&nuc900wdt_miscdev);
	283
	284	clk_disable(nuc900_wdt->wdt_clock);
0400e313 WZ	285
	286	return 0;
	287	}
	288
	289	static struct platform_driver nuc900wdt_driver = {
	290	.probe = nuc900wdt_probe,
82268714	291	.remove = nuc900wdt_remove,
0400e313 WZ	292	.driver = {
0400e313 WZ	293	.name = "nuc900-wdt",
0400e313 WZ	294	},
	295	};
	296
b8ec6118	297	module_platform_driver(nuc900wdt_driver);
0400e313 WZ	298
	299	MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
	300	MODULE_DESCRIPTION("Watchdog driver for NUC900");
	301	MODULE_LICENSE("GPL");
0400e313	302	MODULE_ALIAS("platform:nuc900-wdt");