Commit | Line | Data |
---|---|---|
b9d36b85 RK |
1 | /* |
2 | * Watchdog driver for the mpcore watchdog timer | |
3 | * | |
4 | * (c) Copyright 2004 ARM Limited | |
5 | * | |
6 | * Based on the SoftDog driver: | |
29fa0586 | 7 | * (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>, |
143a2e54 | 8 | * All Rights Reserved. |
b9d36b85 RK |
9 | * |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License | |
12 | * as published by the Free Software Foundation; either version | |
13 | * 2 of the License, or (at your option) any later version. | |
14 | * | |
15 | * Neither Alan Cox nor CymruNet Ltd. admit liability nor provide | |
16 | * warranty for any of this software. This material is provided | |
17 | * "AS-IS" and at no charge. | |
18 | * | |
19 | * (c) Copyright 1995 Alan Cox <alan@lxorguk.ukuu.org.uk> | |
20 | * | |
21 | */ | |
22 | #include <linux/module.h> | |
23 | #include <linux/moduleparam.h> | |
b9d36b85 RK |
24 | #include <linux/types.h> |
25 | #include <linux/miscdevice.h> | |
26 | #include <linux/watchdog.h> | |
27 | #include <linux/fs.h> | |
28 | #include <linux/reboot.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/interrupt.h> | |
d052d1be | 31 | #include <linux/platform_device.h> |
83ab1a53 | 32 | #include <linux/uaccess.h> |
5a0e3ad6 | 33 | #include <linux/slab.h> |
ad4162f3 RK |
34 | |
35 | #include <asm/hardware/arm_twd.h> | |
b9d36b85 RK |
36 | |
37 | struct mpcore_wdt { | |
38 | unsigned long timer_alive; | |
39 | struct device *dev; | |
40 | void __iomem *base; | |
41 | int irq; | |
42 | unsigned int perturb; | |
43 | char expect_close; | |
44 | }; | |
45 | ||
46 | static struct platform_device *mpcore_wdt_dev; | |
b9d36b85 RK |
47 | extern unsigned int mpcore_timer_rate; |
48 | ||
49 | #define TIMER_MARGIN 60 | |
50 | static int mpcore_margin = TIMER_MARGIN; | |
51 | module_param(mpcore_margin, int, 0); | |
83ab1a53 AC |
52 | MODULE_PARM_DESC(mpcore_margin, |
53 | "MPcore timer margin in seconds. (0 < mpcore_margin < 65536, default=" | |
54 | __MODULE_STRING(TIMER_MARGIN) ")"); | |
b9d36b85 RK |
55 | |
56 | static int nowayout = WATCHDOG_NOWAYOUT; | |
57 | module_param(nowayout, int, 0); | |
83ab1a53 AC |
58 | MODULE_PARM_DESC(nowayout, |
59 | "Watchdog cannot be stopped once started (default=" | |
60 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
b9d36b85 RK |
61 | |
62 | #define ONLY_TESTING 0 | |
63 | static int mpcore_noboot = ONLY_TESTING; | |
64 | module_param(mpcore_noboot, int, 0); | |
a77dba7e WVS |
65 | MODULE_PARM_DESC(mpcore_noboot, "MPcore watchdog action, " |
66 | "set to 1 to ignore reboots, 0 to reboot (default=" | |
67 | __MODULE_STRING(ONLY_TESTING) ")"); | |
b9d36b85 RK |
68 | |
69 | /* | |
70 | * This is the interrupt handler. Note that we only use this | |
71 | * in testing mode, so don't actually do a reboot here. | |
72 | */ | |
7d12e780 | 73 | static irqreturn_t mpcore_wdt_fire(int irq, void *arg) |
b9d36b85 RK |
74 | { |
75 | struct mpcore_wdt *wdt = arg; | |
76 | ||
77 | /* Check it really was our interrupt */ | |
78 | if (readl(wdt->base + TWD_WDOG_INTSTAT)) { | |
83ab1a53 AC |
79 | dev_printk(KERN_CRIT, wdt->dev, |
80 | "Triggered - Reboot ignored.\n"); | |
b9d36b85 RK |
81 | /* Clear the interrupt on the watchdog */ |
82 | writel(1, wdt->base + TWD_WDOG_INTSTAT); | |
b9d36b85 RK |
83 | return IRQ_HANDLED; |
84 | } | |
b9d36b85 RK |
85 | return IRQ_NONE; |
86 | } | |
87 | ||
88 | /* | |
89 | * mpcore_wdt_keepalive - reload the timer | |
90 | * | |
91 | * Note that the spec says a DIFFERENT value must be written to the reload | |
92 | * register each time. The "perturb" variable deals with this by adding 1 | |
93 | * to the count every other time the function is called. | |
94 | */ | |
95 | static void mpcore_wdt_keepalive(struct mpcore_wdt *wdt) | |
96 | { | |
97 | unsigned int count; | |
98 | ||
99 | /* Assume prescale is set to 256 */ | |
100 | count = (mpcore_timer_rate / 256) * mpcore_margin; | |
101 | ||
102 | /* Reload the counter */ | |
83ab1a53 | 103 | spin_lock(&wdt_lock); |
b9d36b85 | 104 | writel(count + wdt->perturb, wdt->base + TWD_WDOG_LOAD); |
b9d36b85 | 105 | wdt->perturb = wdt->perturb ? 0 : 1; |
83ab1a53 | 106 | spin_unlock(&wdt_lock); |
b9d36b85 RK |
107 | } |
108 | ||
109 | static void mpcore_wdt_stop(struct mpcore_wdt *wdt) | |
110 | { | |
83ab1a53 | 111 | spin_lock(&wdt_lock); |
b9d36b85 RK |
112 | writel(0x12345678, wdt->base + TWD_WDOG_DISABLE); |
113 | writel(0x87654321, wdt->base + TWD_WDOG_DISABLE); | |
114 | writel(0x0, wdt->base + TWD_WDOG_CONTROL); | |
83ab1a53 | 115 | spin_unlock(&wdt_lock); |
b9d36b85 RK |
116 | } |
117 | ||
118 | static void mpcore_wdt_start(struct mpcore_wdt *wdt) | |
119 | { | |
120 | dev_printk(KERN_INFO, wdt->dev, "enabling watchdog.\n"); | |
121 | ||
83ab1a53 | 122 | spin_lock(&wdt_lock); |
b9d36b85 RK |
123 | /* This loads the count register but does NOT start the count yet */ |
124 | mpcore_wdt_keepalive(wdt); | |
125 | ||
126 | if (mpcore_noboot) { | |
127 | /* Enable watchdog - prescale=256, watchdog mode=0, enable=1 */ | |
128 | writel(0x0000FF01, wdt->base + TWD_WDOG_CONTROL); | |
129 | } else { | |
130 | /* Enable watchdog - prescale=256, watchdog mode=1, enable=1 */ | |
131 | writel(0x0000FF09, wdt->base + TWD_WDOG_CONTROL); | |
132 | } | |
83ab1a53 | 133 | spin_unlock(&wdt_lock); |
b9d36b85 RK |
134 | } |
135 | ||
136 | static int mpcore_wdt_set_heartbeat(int t) | |
137 | { | |
138 | if (t < 0x0001 || t > 0xFFFF) | |
139 | return -EINVAL; | |
140 | ||
141 | mpcore_margin = t; | |
142 | return 0; | |
143 | } | |
144 | ||
145 | /* | |
146 | * /dev/watchdog handling | |
147 | */ | |
148 | static int mpcore_wdt_open(struct inode *inode, struct file *file) | |
149 | { | |
3ae5eaec | 150 | struct mpcore_wdt *wdt = platform_get_drvdata(mpcore_wdt_dev); |
b9d36b85 RK |
151 | |
152 | if (test_and_set_bit(0, &wdt->timer_alive)) | |
153 | return -EBUSY; | |
154 | ||
155 | if (nowayout) | |
156 | __module_get(THIS_MODULE); | |
157 | ||
158 | file->private_data = wdt; | |
159 | ||
160 | /* | |
161 | * Activate timer | |
162 | */ | |
163 | mpcore_wdt_start(wdt); | |
164 | ||
165 | return nonseekable_open(inode, file); | |
166 | } | |
167 | ||
168 | static int mpcore_wdt_release(struct inode *inode, struct file *file) | |
169 | { | |
170 | struct mpcore_wdt *wdt = file->private_data; | |
171 | ||
172 | /* | |
173 | * Shut off the timer. | |
174 | * Lock it in if it's a module and we set nowayout | |
175 | */ | |
83ab1a53 | 176 | if (wdt->expect_close == 42) |
b9d36b85 | 177 | mpcore_wdt_stop(wdt); |
83ab1a53 AC |
178 | else { |
179 | dev_printk(KERN_CRIT, wdt->dev, | |
180 | "unexpected close, not stopping watchdog!\n"); | |
b9d36b85 RK |
181 | mpcore_wdt_keepalive(wdt); |
182 | } | |
183 | clear_bit(0, &wdt->timer_alive); | |
184 | wdt->expect_close = 0; | |
185 | return 0; | |
186 | } | |
187 | ||
83ab1a53 AC |
188 | static ssize_t mpcore_wdt_write(struct file *file, const char *data, |
189 | size_t len, loff_t *ppos) | |
b9d36b85 RK |
190 | { |
191 | struct mpcore_wdt *wdt = file->private_data; | |
192 | ||
b9d36b85 RK |
193 | /* |
194 | * Refresh the timer. | |
195 | */ | |
196 | if (len) { | |
197 | if (!nowayout) { | |
198 | size_t i; | |
199 | ||
200 | /* In case it was set long ago */ | |
201 | wdt->expect_close = 0; | |
202 | ||
203 | for (i = 0; i != len; i++) { | |
204 | char c; | |
205 | ||
206 | if (get_user(c, data + i)) | |
207 | return -EFAULT; | |
208 | if (c == 'V') | |
209 | wdt->expect_close = 42; | |
210 | } | |
211 | } | |
212 | mpcore_wdt_keepalive(wdt); | |
213 | } | |
214 | return len; | |
215 | } | |
216 | ||
42747d71 | 217 | static const struct watchdog_info ident = { |
b9d36b85 RK |
218 | .options = WDIOF_SETTIMEOUT | |
219 | WDIOF_KEEPALIVEPING | | |
220 | WDIOF_MAGICCLOSE, | |
221 | .identity = "MPcore Watchdog", | |
222 | }; | |
223 | ||
83ab1a53 AC |
224 | static long mpcore_wdt_ioctl(struct file *file, unsigned int cmd, |
225 | unsigned long arg) | |
b9d36b85 RK |
226 | { |
227 | struct mpcore_wdt *wdt = file->private_data; | |
228 | int ret; | |
229 | union { | |
230 | struct watchdog_info ident; | |
231 | int i; | |
232 | } uarg; | |
233 | ||
234 | if (_IOC_DIR(cmd) && _IOC_SIZE(cmd) > sizeof(uarg)) | |
795b89d2 | 235 | return -ENOTTY; |
b9d36b85 RK |
236 | |
237 | if (_IOC_DIR(cmd) & _IOC_WRITE) { | |
238 | ret = copy_from_user(&uarg, (void __user *)arg, _IOC_SIZE(cmd)); | |
239 | if (ret) | |
240 | return -EFAULT; | |
241 | } | |
242 | ||
243 | switch (cmd) { | |
244 | case WDIOC_GETSUPPORT: | |
245 | uarg.ident = ident; | |
246 | ret = 0; | |
247 | break; | |
248 | ||
0c06090c WVS |
249 | case WDIOC_GETSTATUS: |
250 | case WDIOC_GETBOOTSTATUS: | |
251 | uarg.i = 0; | |
252 | ret = 0; | |
253 | break; | |
254 | ||
b9d36b85 RK |
255 | case WDIOC_SETOPTIONS: |
256 | ret = -EINVAL; | |
257 | if (uarg.i & WDIOS_DISABLECARD) { | |
258 | mpcore_wdt_stop(wdt); | |
259 | ret = 0; | |
260 | } | |
261 | if (uarg.i & WDIOS_ENABLECARD) { | |
262 | mpcore_wdt_start(wdt); | |
263 | ret = 0; | |
264 | } | |
265 | break; | |
266 | ||
b9d36b85 RK |
267 | case WDIOC_KEEPALIVE: |
268 | mpcore_wdt_keepalive(wdt); | |
269 | ret = 0; | |
270 | break; | |
271 | ||
272 | case WDIOC_SETTIMEOUT: | |
273 | ret = mpcore_wdt_set_heartbeat(uarg.i); | |
274 | if (ret) | |
275 | break; | |
276 | ||
277 | mpcore_wdt_keepalive(wdt); | |
278 | /* Fall */ | |
279 | case WDIOC_GETTIMEOUT: | |
280 | uarg.i = mpcore_margin; | |
281 | ret = 0; | |
282 | break; | |
283 | ||
284 | default: | |
795b89d2 | 285 | return -ENOTTY; |
b9d36b85 RK |
286 | } |
287 | ||
288 | if (ret == 0 && _IOC_DIR(cmd) & _IOC_READ) { | |
289 | ret = copy_to_user((void __user *)arg, &uarg, _IOC_SIZE(cmd)); | |
290 | if (ret) | |
291 | ret = -EFAULT; | |
292 | } | |
293 | return ret; | |
294 | } | |
295 | ||
296 | /* | |
297 | * System shutdown handler. Turn off the watchdog if we're | |
298 | * restarting or halting the system. | |
299 | */ | |
3ae5eaec | 300 | static void mpcore_wdt_shutdown(struct platform_device *dev) |
b9d36b85 | 301 | { |
3ae5eaec | 302 | struct mpcore_wdt *wdt = platform_get_drvdata(dev); |
b9d36b85 RK |
303 | |
304 | if (system_state == SYSTEM_RESTART || system_state == SYSTEM_HALT) | |
305 | mpcore_wdt_stop(wdt); | |
306 | } | |
307 | ||
308 | /* | |
309 | * Kernel Interfaces | |
310 | */ | |
62322d25 | 311 | static const struct file_operations mpcore_wdt_fops = { |
b9d36b85 RK |
312 | .owner = THIS_MODULE, |
313 | .llseek = no_llseek, | |
314 | .write = mpcore_wdt_write, | |
83ab1a53 | 315 | .unlocked_ioctl = mpcore_wdt_ioctl, |
b9d36b85 RK |
316 | .open = mpcore_wdt_open, |
317 | .release = mpcore_wdt_release, | |
318 | }; | |
319 | ||
320 | static struct miscdevice mpcore_wdt_miscdev = { | |
321 | .minor = WATCHDOG_MINOR, | |
322 | .name = "watchdog", | |
323 | .fops = &mpcore_wdt_fops, | |
324 | }; | |
325 | ||
3ae5eaec | 326 | static int __devinit mpcore_wdt_probe(struct platform_device *dev) |
b9d36b85 | 327 | { |
b9d36b85 RK |
328 | struct mpcore_wdt *wdt; |
329 | struct resource *res; | |
330 | int ret; | |
331 | ||
332 | /* We only accept one device, and it must have an id of -1 */ | |
333 | if (dev->id != -1) | |
334 | return -ENODEV; | |
335 | ||
336 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); | |
337 | if (!res) { | |
338 | ret = -ENODEV; | |
339 | goto err_out; | |
340 | } | |
341 | ||
dd00cc48 | 342 | wdt = kzalloc(sizeof(struct mpcore_wdt), GFP_KERNEL); |
b9d36b85 RK |
343 | if (!wdt) { |
344 | ret = -ENOMEM; | |
345 | goto err_out; | |
346 | } | |
b9d36b85 RK |
347 | |
348 | wdt->dev = &dev->dev; | |
349 | wdt->irq = platform_get_irq(dev, 0); | |
48944738 DV |
350 | if (wdt->irq < 0) { |
351 | ret = -ENXIO; | |
352 | goto err_free; | |
353 | } | |
b782a563 | 354 | wdt->base = ioremap(res->start, resource_size(res)); |
b9d36b85 RK |
355 | if (!wdt->base) { |
356 | ret = -ENOMEM; | |
357 | goto err_free; | |
358 | } | |
359 | ||
e0b79e0b | 360 | mpcore_wdt_miscdev.parent = &dev->dev; |
b9d36b85 RK |
361 | ret = misc_register(&mpcore_wdt_miscdev); |
362 | if (ret) { | |
83ab1a53 AC |
363 | dev_printk(KERN_ERR, _dev, |
364 | "cannot register miscdev on minor=%d (err=%d)\n", | |
365 | WATCHDOG_MINOR, ret); | |
b9d36b85 RK |
366 | goto err_misc; |
367 | } | |
368 | ||
83ab1a53 AC |
369 | ret = request_irq(wdt->irq, mpcore_wdt_fire, IRQF_DISABLED, |
370 | "mpcore_wdt", wdt); | |
b9d36b85 | 371 | if (ret) { |
83ab1a53 AC |
372 | dev_printk(KERN_ERR, _dev, |
373 | "cannot register IRQ%d for watchdog\n", wdt->irq); | |
b9d36b85 RK |
374 | goto err_irq; |
375 | } | |
376 | ||
377 | mpcore_wdt_stop(wdt); | |
3ae5eaec | 378 | platform_set_drvdata(&dev->dev, wdt); |
b9d36b85 RK |
379 | mpcore_wdt_dev = dev; |
380 | ||
381 | return 0; | |
382 | ||
7944d3a5 | 383 | err_irq: |
b9d36b85 | 384 | misc_deregister(&mpcore_wdt_miscdev); |
7944d3a5 | 385 | err_misc: |
b9d36b85 | 386 | iounmap(wdt->base); |
7944d3a5 | 387 | err_free: |
b9d36b85 | 388 | kfree(wdt); |
7944d3a5 | 389 | err_out: |
b9d36b85 RK |
390 | return ret; |
391 | } | |
392 | ||
3ae5eaec | 393 | static int __devexit mpcore_wdt_remove(struct platform_device *dev) |
b9d36b85 | 394 | { |
3ae5eaec | 395 | struct mpcore_wdt *wdt = platform_get_drvdata(dev); |
b9d36b85 | 396 | |
3ae5eaec | 397 | platform_set_drvdata(dev, NULL); |
b9d36b85 RK |
398 | |
399 | misc_deregister(&mpcore_wdt_miscdev); | |
400 | ||
401 | mpcore_wdt_dev = NULL; | |
402 | ||
403 | free_irq(wdt->irq, wdt); | |
404 | iounmap(wdt->base); | |
405 | kfree(wdt); | |
406 | return 0; | |
407 | } | |
408 | ||
f37d193c KS |
409 | /* work with hotplug and coldplug */ |
410 | MODULE_ALIAS("platform:mpcore_wdt"); | |
411 | ||
3ae5eaec | 412 | static struct platform_driver mpcore_wdt_driver = { |
b9d36b85 RK |
413 | .probe = mpcore_wdt_probe, |
414 | .remove = __devexit_p(mpcore_wdt_remove), | |
415 | .shutdown = mpcore_wdt_shutdown, | |
3ae5eaec RK |
416 | .driver = { |
417 | .owner = THIS_MODULE, | |
418 | .name = "mpcore_wdt", | |
419 | }, | |
b9d36b85 RK |
420 | }; |
421 | ||
a77dba7e WVS |
422 | static char banner[] __initdata = KERN_INFO "MPcore Watchdog Timer: 0.1. " |
423 | "mpcore_noboot=%d mpcore_margin=%d sec (nowayout= %d)\n"; | |
b9d36b85 RK |
424 | |
425 | static int __init mpcore_wdt_init(void) | |
426 | { | |
427 | /* | |
428 | * Check that the margin value is within it's range; | |
429 | * if not reset to the default | |
430 | */ | |
431 | if (mpcore_wdt_set_heartbeat(mpcore_margin)) { | |
432 | mpcore_wdt_set_heartbeat(TIMER_MARGIN); | |
83ab1a53 | 433 | printk(KERN_INFO "mpcore_margin value must be 0 < mpcore_margin < 65536, using %d\n", |
b9d36b85 RK |
434 | TIMER_MARGIN); |
435 | } | |
436 | ||
437 | printk(banner, mpcore_noboot, mpcore_margin, nowayout); | |
438 | ||
3ae5eaec | 439 | return platform_driver_register(&mpcore_wdt_driver); |
b9d36b85 RK |
440 | } |
441 | ||
442 | static void __exit mpcore_wdt_exit(void) | |
443 | { | |
3ae5eaec | 444 | platform_driver_unregister(&mpcore_wdt_driver); |
b9d36b85 RK |
445 | } |
446 | ||
447 | module_init(mpcore_wdt_init); | |
448 | module_exit(mpcore_wdt_exit); | |
449 | ||
450 | MODULE_AUTHOR("ARM Limited"); | |
451 | MODULE_DESCRIPTION("MPcore Watchdog Device Driver"); | |
452 | MODULE_LICENSE("GPL"); | |
453 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); |