[linux-2.6-block.git] / drivers / watchdog / mpc8xxx_wdt.c

/*
 * mpc8xxx_wdt.c - MPC8xx/MPC83xx/MPC86xx watchdog userspace interface
 *
 * Authors: Dave Updegraff <dave@cray.org>
 *	    Kumar Gala <galak@kernel.crashing.org>
 *		Attribution: from 83xx_wst: Florian Schirmer <jolt@tuxbox.org>
 *				..and from sc520_wdt
 * Copyright (c) 2008  MontaVista Software, Inc.
 *                     Anton Vorontsov <avorontsov@ru.mvista.com>
 *
 * Note: it appears that you can only actually ENABLE or DISABLE the thing
 * once after POR. Once enabled, you cannot disable, and vice versa.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/fs.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/timer.h>
#include <linux/miscdevice.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/module.h>
#include <linux/watchdog.h>
#include <linux/io.h>
#include <linux/uaccess.h>
#include <sysdev/fsl_soc.h>

struct mpc8xxx_wdt {
	__be32 res0;
	__be32 swcrr; /* System watchdog control register */
#define SWCRR_SWTC 0xFFFF0000 /* Software Watchdog Time Count. */
#define SWCRR_SWEN 0x00000004 /* Watchdog Enable bit. */
#define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit.*/
#define SWCRR_SWPR 0x00000001 /* Software Watchdog Counter Prescale bit. */
	__be32 swcnr; /* System watchdog count register */
	u8 res1[2];
	__be16 swsrr; /* System watchdog service register */
	u8 res2[0xF0];
};

struct mpc8xxx_wdt_type {
	int prescaler;
	bool hw_enabled;
};

static struct mpc8xxx_wdt __iomem *wd_base;
static int mpc8xxx_wdt_init_late(void);

static u16 timeout = 0xffff;
module_param(timeout, ushort, 0);
MODULE_PARM_DESC(timeout,
	"Watchdog timeout in ticks. (0<timeout<65536, default=65535)");

static bool reset = 1;
module_param(reset, bool, 0);
MODULE_PARM_DESC(reset,
	"Watchdog Interrupt/Reset Mode. 0 = interrupt, 1 = reset");

static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
		 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

/*
 * We always prescale, but if someone really doesn't want to they can set this
 * to 0
 */
static int prescale = 1;
static unsigned int timeout_sec;

static unsigned long wdt_is_open;
static DEFINE_SPINLOCK(wdt_spinlock);

static void mpc8xxx_wdt_keepalive(void)
{
	/* Ping the WDT */
	spin_lock(&wdt_spinlock);
	out_be16(&wd_base->swsrr, 0x556c);
	out_be16(&wd_base->swsrr, 0xaa39);
	spin_unlock(&wdt_spinlock);
}

static void mpc8xxx_wdt_timer_ping(unsigned long arg);
static DEFINE_TIMER(wdt_timer, mpc8xxx_wdt_timer_ping, 0, 0);

static void mpc8xxx_wdt_timer_ping(unsigned long arg)
{
	mpc8xxx_wdt_keepalive();
	/* We're pinging it twice faster than needed, just to be sure. */
	mod_timer(&wdt_timer, jiffies + HZ * timeout_sec / 2);
}

static void mpc8xxx_wdt_pr_warn(const char *msg)
{
	pr_crit("%s, expect the %s soon!\n", msg,
		reset ? "reset" : "machine check exception");
}

static ssize_t mpc8xxx_wdt_write(struct file *file, const char __user *buf,
				 size_t count, loff_t *ppos)
{
	if (count)
		mpc8xxx_wdt_keepalive();
	return count;
}

static int mpc8xxx_wdt_open(struct inode *inode, struct file *file)
{
	u32 tmp = SWCRR_SWEN;
	if (test_and_set_bit(0, &wdt_is_open))
		return -EBUSY;

	/* Once we start the watchdog we can't stop it */
	if (nowayout)
		__module_get(THIS_MODULE);

	/* Good, fire up the show */
	if (prescale)
		tmp |= SWCRR_SWPR;
	if (reset)
		tmp |= SWCRR_SWRI;

	tmp |= timeout << 16;

	out_be32(&wd_base->swcrr, tmp);

	del_timer_sync(&wdt_timer);

	return nonseekable_open(inode, file);
}

static int mpc8xxx_wdt_release(struct inode *inode, struct file *file)
{
	if (!nowayout)
		mpc8xxx_wdt_timer_ping(0);
	else
		mpc8xxx_wdt_pr_warn("watchdog closed");
	clear_bit(0, &wdt_is_open);
	return 0;
}

static long mpc8xxx_wdt_ioctl(struct file *file, unsigned int cmd,
							unsigned long arg)
{
	void __user *argp = (void __user *)arg;
	int __user *p = argp;
	static const struct watchdog_info ident = {
		.options = WDIOF_KEEPALIVEPING,
		.firmware_version = 1,
		.identity = "MPC8xxx",
	};

	switch (cmd) {
	case WDIOC_GETSUPPORT:
		return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
	case WDIOC_GETSTATUS:
	case WDIOC_GETBOOTSTATUS:
		return put_user(0, p);
	case WDIOC_KEEPALIVE:
		mpc8xxx_wdt_keepalive();
		return 0;
	case WDIOC_GETTIMEOUT:
		return put_user(timeout_sec, p);
	default:
		return -ENOTTY;
	}
}

static const struct file_operations mpc8xxx_wdt_fops = {
	.owner		= THIS_MODULE,
	.llseek		= no_llseek,
	.write		= mpc8xxx_wdt_write,
	.unlocked_ioctl	= mpc8xxx_wdt_ioctl,
	.open		= mpc8xxx_wdt_open,
	.release	= mpc8xxx_wdt_release,
};

static struct miscdevice mpc8xxx_wdt_miscdev = {
	.minor	= WATCHDOG_MINOR,
	.name	= "watchdog",
	.fops	= &mpc8xxx_wdt_fops,
};

static const struct of_device_id mpc8xxx_wdt_match[];
static int mpc8xxx_wdt_probe(struct platform_device *ofdev)
{
	int ret;
	const struct of_device_id *match;
	struct device_node *np = ofdev->dev.of_node;
	const struct mpc8xxx_wdt_type *wdt_type;
	u32 freq = fsl_get_sys_freq();
	bool enabled;

	match = of_match_device(mpc8xxx_wdt_match, &ofdev->dev);
	if (!match)
		return -EINVAL;
	wdt_type = match->data;

	if (!freq || freq == -1)
		return -EINVAL;

	wd_base = of_iomap(np, 0);
	if (!wd_base)
		return -ENOMEM;

	enabled = in_be32(&wd_base->swcrr) & SWCRR_SWEN;
	if (!enabled && wdt_type->hw_enabled) {
		pr_info("could not be enabled in software\n");
		ret = -ENOSYS;
		goto err_unmap;
	}

	/* Calculate the timeout in seconds */
	if (prescale)
		timeout_sec = (timeout * wdt_type->prescaler) / freq;
	else
		timeout_sec = timeout / freq;

#ifdef MODULE
	ret = mpc8xxx_wdt_init_late();
	if (ret)
		goto err_unmap;
#endif

	pr_info("WDT driver for MPC8xxx initialized. mode:%s timeout=%d (%d seconds)\n",
		reset ? "reset" : "interrupt", timeout, timeout_sec);

	/*
	 * If the watchdog was previously enabled or we're running on
	 * MPC8xxx, we should ping the wdt from the kernel until the
	 * userspace handles it.
	 */
	if (enabled)
		mpc8xxx_wdt_timer_ping(0);
	return 0;
err_unmap:
	iounmap(wd_base);
	wd_base = NULL;
	return ret;
}

static int mpc8xxx_wdt_remove(struct platform_device *ofdev)
{
	mpc8xxx_wdt_pr_warn("watchdog removed");
	del_timer_sync(&wdt_timer);
	misc_deregister(&mpc8xxx_wdt_miscdev);
	iounmap(wd_base);

	return 0;
}

static const struct of_device_id mpc8xxx_wdt_match[] = {
	{
		.compatible = "mpc83xx_wdt",
		.data = &(struct mpc8xxx_wdt_type) {
			.prescaler = 0x10000,
		},
	},
	{
		.compatible = "fsl,mpc8610-wdt",
		.data = &(struct mpc8xxx_wdt_type) {
			.prescaler = 0x10000,
			.hw_enabled = true,
		},
	},
	{
		.compatible = "fsl,mpc823-wdt",
		.data = &(struct mpc8xxx_wdt_type) {
			.prescaler = 0x800,
		},
	},
	{},
};
MODULE_DEVICE_TABLE(of, mpc8xxx_wdt_match);

static struct platform_driver mpc8xxx_wdt_driver = {
	.probe		= mpc8xxx_wdt_probe,
	.remove		= mpc8xxx_wdt_remove,
	.driver = {
		.name = "mpc8xxx_wdt",
		.owner = THIS_MODULE,
		.of_match_table = mpc8xxx_wdt_match,
	},
};

/*
 * We do wdt initialization in two steps: arch_initcall probes the wdt
 * very early to start pinging the watchdog (misc devices are not yet
 * available), and later module_init() just registers the misc device.
 */
static int mpc8xxx_wdt_init_late(void)
{
	int ret;

	if (!wd_base)
		return -ENODEV;

	ret = misc_register(&mpc8xxx_wdt_miscdev);
	if (ret) {
		pr_err("cannot register miscdev on minor=%d (err=%d)\n",
		       WATCHDOG_MINOR, ret);
		return ret;
	}
	return 0;
}
#ifndef MODULE
module_init(mpc8xxx_wdt_init_late);
#endif

static int __init mpc8xxx_wdt_init(void)
{
	return platform_driver_register(&mpc8xxx_wdt_driver);
}
arch_initcall(mpc8xxx_wdt_init);

static void __exit mpc8xxx_wdt_exit(void)
{
	platform_driver_unregister(&mpc8xxx_wdt_driver);
}
module_exit(mpc8xxx_wdt_exit);

MODULE_AUTHOR("Dave Updegraff, Kumar Gala");
MODULE_DESCRIPTION("Driver for watchdog timer in MPC8xx/MPC83xx/MPC86xx "
		   "uProcessors");
MODULE_LICENSE("GPL");
Commit	Line	Data
fabbfb9e	1	/*
0d7b1014	2	* mpc8xxx_wdt.c - MPC8xx/MPC83xx/MPC86xx watchdog userspace interface
fabbfb9e KG	3	*
fabbfb9e KG	4	* Authors: Dave Updegraff <dave@cray.org>
5f3b2756 WVS	5	* Kumar Gala <galak@kernel.crashing.org>
	6	* Attribution: from 83xx_wst: Florian Schirmer <jolt@tuxbox.org>
	7	* ..and from sc520_wdt
500c919e AV	8	* Copyright (c) 2008 MontaVista Software, Inc.
500c919e AV	9	* Anton Vorontsov <avorontsov@ru.mvista.com>
fabbfb9e KG	10	*
	11	* Note: it appears that you can only actually ENABLE or DISABLE the thing
	12	* once after POR. Once enabled, you cannot disable, and vice versa.
	13	*
	14	* This program is free software; you can redistribute it and/or modify it
	15	* under the terms of the GNU General Public License as published by the
	16	* Free Software Foundation; either version 2 of the License, or (at your
	17	* option) any later version.
	18	*/
	19
27c766aa JP	20	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27c766aa JP	21
fabbfb9e KG	22	#include <linux/fs.h>
	23	#include <linux/init.h>
	24	#include <linux/kernel.h>
500c919e	25	#include <linux/timer.h>
fabbfb9e	26	#include <linux/miscdevice.h>
5af50730	27	#include <linux/of_address.h>
ef8ab12e	28	#include <linux/of_platform.h>
fabbfb9e KG	29	#include <linux/module.h>
fabbfb9e KG	30	#include <linux/watchdog.h>
f26ef3dc AC	31	#include <linux/io.h>
f26ef3dc AC	32	#include <linux/uaccess.h>
ef8ab12e	33	#include <sysdev/fsl_soc.h>
fabbfb9e	34
59ca1b0d	35	struct mpc8xxx_wdt {
fabbfb9e KG	36	__be32 res0;
	37	__be32 swcrr; /* System watchdog control register */
	38	#define SWCRR_SWTC 0xFFFF0000 /* Software Watchdog Time Count. */
	39	#define SWCRR_SWEN 0x00000004 /* Watchdog Enable bit. */
	40	#define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit.*/
	41	#define SWCRR_SWPR 0x00000001 /* Software Watchdog Counter Prescale bit. */
	42	__be32 swcnr; /* System watchdog count register */
	43	u8 res1[2];
	44	__be16 swsrr; /* System watchdog service register */
	45	u8 res2[0xF0];
	46	};
	47
59ca1b0d	48	struct mpc8xxx_wdt_type {
500c919e AV	49	int prescaler;
	50	bool hw_enabled;
	51	};
	52
59ca1b0d	53	static struct mpc8xxx_wdt __iomem *wd_base;
593fc178	54	static int mpc8xxx_wdt_init_late(void);
fabbfb9e KG	55
	56	static u16 timeout = 0xffff;
	57	module_param(timeout, ushort, 0);
f26ef3dc	58	MODULE_PARM_DESC(timeout,
76550d32	59	"Watchdog timeout in ticks. (0<timeout<65536, default=65535)");
fabbfb9e	60
90ab5ee9	61	static bool reset = 1;
fabbfb9e	62	module_param(reset, bool, 0);
f26ef3dc AC	63	MODULE_PARM_DESC(reset,
f26ef3dc AC	64	"Watchdog Interrupt/Reset Mode. 0 = interrupt, 1 = reset");
fabbfb9e	65
86a1e189 WVS	66	static bool nowayout = WATCHDOG_NOWAYOUT;
86a1e189 WVS	67	module_param(nowayout, bool, 0);
500c919e AV	68	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
	69	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	70
fabbfb9e KG	71	/*
	72	* We always prescale, but if someone really doesn't want to they can set this
	73	* to 0
	74	*/
	75	static int prescale = 1;
	76	static unsigned int timeout_sec;
	77
	78	static unsigned long wdt_is_open;
c7dfd0cc	79	static DEFINE_SPINLOCK(wdt_spinlock);
fabbfb9e	80
59ca1b0d	81	static void mpc8xxx_wdt_keepalive(void)
fabbfb9e KG	82	{
	83	/* Ping the WDT */
	84	spin_lock(&wdt_spinlock);
	85	out_be16(&wd_base->swsrr, 0x556c);
	86	out_be16(&wd_base->swsrr, 0xaa39);
	87	spin_unlock(&wdt_spinlock);
	88	}
	89
59ca1b0d AV	90	static void mpc8xxx_wdt_timer_ping(unsigned long arg);
59ca1b0d AV	91	static DEFINE_TIMER(wdt_timer, mpc8xxx_wdt_timer_ping, 0, 0);
500c919e	92
59ca1b0d	93	static void mpc8xxx_wdt_timer_ping(unsigned long arg)
500c919e	94	{
59ca1b0d	95	mpc8xxx_wdt_keepalive();
500c919e AV	96	/* We're pinging it twice faster than needed, just to be sure. */
	97	mod_timer(&wdt_timer, jiffies + HZ * timeout_sec / 2);
	98	}
	99
59ca1b0d	100	static void mpc8xxx_wdt_pr_warn(const char *msg)
500c919e	101	{
27c766aa	102	pr_crit("%s, expect the %s soon!\n", msg,
500c919e AV	103	reset ? "reset" : "machine check exception");
	104	}
	105
59ca1b0d	106	static ssize_t mpc8xxx_wdt_write(struct file file, const char __user buf,
fabbfb9e KG	107	size_t count, loff_t *ppos)
	108	{
	109	if (count)
59ca1b0d	110	mpc8xxx_wdt_keepalive();
fabbfb9e KG	111	return count;
	112	}
	113
59ca1b0d	114	static int mpc8xxx_wdt_open(struct inode inode, struct file file)
fabbfb9e KG	115	{
	116	u32 tmp = SWCRR_SWEN;
	117	if (test_and_set_bit(0, &wdt_is_open))
	118	return -EBUSY;
	119
	120	/* Once we start the watchdog we can't stop it */
500c919e AV	121	if (nowayout)
500c919e AV	122	__module_get(THIS_MODULE);
fabbfb9e KG	123
	124	/* Good, fire up the show */
	125	if (prescale)
	126	tmp \|= SWCRR_SWPR;
	127	if (reset)
	128	tmp \|= SWCRR_SWRI;
	129
	130	tmp \|= timeout << 16;
	131
	132	out_be32(&wd_base->swcrr, tmp);
	133
500c919e AV	134	del_timer_sync(&wdt_timer);
500c919e AV	135
fabbfb9e KG	136	return nonseekable_open(inode, file);
	137	}
	138
59ca1b0d	139	static int mpc8xxx_wdt_release(struct inode inode, struct file file)
fabbfb9e	140	{
500c919e	141	if (!nowayout)
59ca1b0d	142	mpc8xxx_wdt_timer_ping(0);
500c919e	143	else
59ca1b0d	144	mpc8xxx_wdt_pr_warn("watchdog closed");
fabbfb9e KG	145	clear_bit(0, &wdt_is_open);
	146	return 0;
	147	}
	148
cb55d282	149	static long mpc8xxx_wdt_ioctl(struct file *file, unsigned int cmd,
f26ef3dc	150	unsigned long arg)
fabbfb9e KG	151	{
	152	void __user argp = (void __user )arg;
	153	int __user *p = argp;
42747d71	154	static const struct watchdog_info ident = {
fabbfb9e KG	155	.options = WDIOF_KEEPALIVEPING,
fabbfb9e KG	156	.firmware_version = 1,
59ca1b0d	157	.identity = "MPC8xxx",
fabbfb9e KG	158	};
	159
	160	switch (cmd) {
	161	case WDIOC_GETSUPPORT:
	162	return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
5c4eb61b WVS	163	case WDIOC_GETSTATUS:
	164	case WDIOC_GETBOOTSTATUS:
	165	return put_user(0, p);
fabbfb9e	166	case WDIOC_KEEPALIVE:
59ca1b0d	167	mpc8xxx_wdt_keepalive();
fabbfb9e KG	168	return 0;
	169	case WDIOC_GETTIMEOUT:
	170	return put_user(timeout_sec, p);
	171	default:
795b89d2	172	return -ENOTTY;
fabbfb9e KG	173	}
	174	}
	175
59ca1b0d	176	static const struct file_operations mpc8xxx_wdt_fops = {
fabbfb9e KG	177	.owner = THIS_MODULE,
fabbfb9e KG	178	.llseek = no_llseek,
59ca1b0d AV	179	.write = mpc8xxx_wdt_write,
	180	.unlocked_ioctl = mpc8xxx_wdt_ioctl,
	181	.open = mpc8xxx_wdt_open,
	182	.release = mpc8xxx_wdt_release,
fabbfb9e KG	183	};
fabbfb9e KG	184
59ca1b0d	185	static struct miscdevice mpc8xxx_wdt_miscdev = {
fabbfb9e KG	186	.minor = WATCHDOG_MINOR,
fabbfb9e KG	187	.name = "watchdog",
59ca1b0d	188	.fops = &mpc8xxx_wdt_fops,
fabbfb9e KG	189	};
fabbfb9e KG	190
b1608d69	191	static const struct of_device_id mpc8xxx_wdt_match[];
2d991a16	192	static int mpc8xxx_wdt_probe(struct platform_device *ofdev)
fabbfb9e	193	{
fabbfb9e	194	int ret;
b1608d69	195	const struct of_device_id *match;
de2b606c	196	struct device_node *np = ofdev->dev.of_node;
639397e4	197	const struct mpc8xxx_wdt_type *wdt_type;
ef8ab12e	198	u32 freq = fsl_get_sys_freq();
500c919e	199	bool enabled;
fabbfb9e	200
b1608d69 GL	201	match = of_match_device(mpc8xxx_wdt_match, &ofdev->dev);
b1608d69 GL	202	if (!match)
1c48a5c9	203	return -EINVAL;
b1608d69	204	wdt_type = match->data;
1c48a5c9	205
ef8ab12e AV	206	if (!freq \|\| freq == -1)
ef8ab12e AV	207	return -EINVAL;
fabbfb9e	208
500c919e	209	wd_base = of_iomap(np, 0);
ef8ab12e AV	210	if (!wd_base)
ef8ab12e AV	211	return -ENOMEM;
fabbfb9e	212
500c919e AV	213	enabled = in_be32(&wd_base->swcrr) & SWCRR_SWEN;
500c919e AV	214	if (!enabled && wdt_type->hw_enabled) {
27c766aa	215	pr_info("could not be enabled in software\n");
500c919e AV	216	ret = -ENOSYS;
	217	goto err_unmap;
	218	}
	219
fabbfb9e KG	220	/* Calculate the timeout in seconds */
fabbfb9e KG	221	if (prescale)
500c919e	222	timeout_sec = (timeout * wdt_type->prescaler) / freq;
fabbfb9e	223	else
ef8ab12e	224	timeout_sec = timeout / freq;
fabbfb9e	225
593fc178 AV	226	#ifdef MODULE
	227	ret = mpc8xxx_wdt_init_late();
	228	if (ret)
	229	goto err_unmap;
	230	#endif
	231
27c766aa JP	232	pr_info("WDT driver for MPC8xxx initialized. mode:%s timeout=%d (%d seconds)\n",
27c766aa JP	233	reset ? "reset" : "interrupt", timeout, timeout_sec);
500c919e AV	234
	235	/*
	236	* If the watchdog was previously enabled or we're running on
59ca1b0d	237	* MPC8xxx, we should ping the wdt from the kernel until the
500c919e AV	238	* userspace handles it.
	239	*/
	240	if (enabled)
59ca1b0d	241	mpc8xxx_wdt_timer_ping(0);
fabbfb9e	242	return 0;
fabbfb9e KG	243	err_unmap:
fabbfb9e KG	244	iounmap(wd_base);
0d7b1014	245	wd_base = NULL;
fabbfb9e KG	246	return ret;
	247	}
	248
4b12b896	249	static int mpc8xxx_wdt_remove(struct platform_device *ofdev)
fabbfb9e	250	{
59ca1b0d	251	mpc8xxx_wdt_pr_warn("watchdog removed");
500c919e	252	del_timer_sync(&wdt_timer);
59ca1b0d	253	misc_deregister(&mpc8xxx_wdt_miscdev);
fabbfb9e KG	254	iounmap(wd_base);
	255
	256	return 0;
	257	}
	258
59ca1b0d	259	static const struct of_device_id mpc8xxx_wdt_match[] = {
ef8ab12e AV	260	{
ef8ab12e AV	261	.compatible = "mpc83xx_wdt",
59ca1b0d	262	.data = &(struct mpc8xxx_wdt_type) {
500c919e AV	263	.prescaler = 0x10000,
	264	},
	265	},
	266	{
	267	.compatible = "fsl,mpc8610-wdt",
59ca1b0d	268	.data = &(struct mpc8xxx_wdt_type) {
500c919e AV	269	.prescaler = 0x10000,
	270	.hw_enabled = true,
	271	},
ef8ab12e	272	},
0d7b1014 AV	273	{
	274	.compatible = "fsl,mpc823-wdt",
	275	.data = &(struct mpc8xxx_wdt_type) {
	276	.prescaler = 0x800,
	277	},
	278	},
ef8ab12e AV	279	{},
ef8ab12e AV	280	};
59ca1b0d	281	MODULE_DEVICE_TABLE(of, mpc8xxx_wdt_match);
ef8ab12e	282
1c48a5c9	283	static struct platform_driver mpc8xxx_wdt_driver = {
59ca1b0d	284	.probe = mpc8xxx_wdt_probe,
82268714	285	.remove = mpc8xxx_wdt_remove,
4018294b GL	286	.driver = {
	287	.name = "mpc8xxx_wdt",
	288	.owner = THIS_MODULE,
	289	.of_match_table = mpc8xxx_wdt_match,
fabbfb9e KG	290	},
	291	};
	292
0d7b1014 AV	293	/*
	294	* We do wdt initialization in two steps: arch_initcall probes the wdt
	295	* very early to start pinging the watchdog (misc devices are not yet
	296	* available), and later module_init() just registers the misc device.
	297	*/
593fc178	298	static int mpc8xxx_wdt_init_late(void)
0d7b1014 AV	299	{
	300	int ret;
	301
	302	if (!wd_base)
	303	return -ENODEV;
	304
	305	ret = misc_register(&mpc8xxx_wdt_miscdev);
	306	if (ret) {
	307	pr_err("cannot register miscdev on minor=%d (err=%d)\n",
27c766aa	308	WATCHDOG_MINOR, ret);
0d7b1014 AV	309	return ret;
	310	}
	311	return 0;
	312	}
593fc178	313	#ifndef MODULE
0d7b1014	314	module_init(mpc8xxx_wdt_init_late);
593fc178	315	#endif
0d7b1014	316
59ca1b0d	317	static int __init mpc8xxx_wdt_init(void)
fabbfb9e	318	{
1c48a5c9	319	return platform_driver_register(&mpc8xxx_wdt_driver);
fabbfb9e	320	}
0d7b1014	321	arch_initcall(mpc8xxx_wdt_init);
fabbfb9e	322
59ca1b0d	323	static void __exit mpc8xxx_wdt_exit(void)
fabbfb9e	324	{
1c48a5c9	325	platform_driver_unregister(&mpc8xxx_wdt_driver);
fabbfb9e	326	}
59ca1b0d	327	module_exit(mpc8xxx_wdt_exit);
fabbfb9e KG	328
fabbfb9e KG	329	MODULE_AUTHOR("Dave Updegraff, Kumar Gala");
0d7b1014 AV	330	MODULE_DESCRIPTION("Driver for watchdog timer in MPC8xx/MPC83xx/MPC86xx "
0d7b1014 AV	331	"uProcessors");
fabbfb9e	332	MODULE_LICENSE("GPL");