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66aaa7a5 MZ |
1 | /* |
2 | * drivers/char/watchdog/max63xx_wdt.c | |
3 | * | |
4 | * Driver for max63{69,70,71,72,73,74} watchdog timers | |
5 | * | |
6 | * Copyright (C) 2009 Marc Zyngier <maz@misterjones.org> | |
7 | * | |
8 | * This file is licensed under the terms of the GNU General Public | |
9 | * License version 2. This program is licensed "as is" without any | |
10 | * warranty of any kind, whether express or implied. | |
11 | * | |
12 | * This driver assumes the watchdog pins are memory mapped (as it is | |
13 | * the case for the Arcom Zeus). Should it be connected over GPIOs or | |
14 | * another interface, some abstraction will have to be introduced. | |
15 | */ | |
16 | ||
4c271bb6 | 17 | #include <linux/err.h> |
66aaa7a5 MZ |
18 | #include <linux/module.h> |
19 | #include <linux/moduleparam.h> | |
20 | #include <linux/types.h> | |
21 | #include <linux/kernel.h> | |
66aaa7a5 MZ |
22 | #include <linux/miscdevice.h> |
23 | #include <linux/watchdog.h> | |
24 | #include <linux/init.h> | |
25 | #include <linux/bitops.h> | |
26 | #include <linux/platform_device.h> | |
27 | #include <linux/spinlock.h> | |
66aaa7a5 | 28 | #include <linux/io.h> |
5a0e3ad6 | 29 | #include <linux/slab.h> |
66aaa7a5 MZ |
30 | |
31 | #define DEFAULT_HEARTBEAT 60 | |
32 | #define MAX_HEARTBEAT 60 | |
33 | ||
a0f36833 | 34 | static unsigned int heartbeat = DEFAULT_HEARTBEAT; |
86a1e189 | 35 | static bool nowayout = WATCHDOG_NOWAYOUT; |
66aaa7a5 MZ |
36 | |
37 | /* | |
38 | * Memory mapping: a single byte, 3 first lower bits to select bit 3 | |
39 | * to ping the watchdog. | |
40 | */ | |
41 | #define MAX6369_WDSET (7 << 0) | |
5f3b2756 | 42 | #define MAX6369_WDI (1 << 3) |
66aaa7a5 MZ |
43 | |
44 | static DEFINE_SPINLOCK(io_lock); | |
45 | ||
66aaa7a5 | 46 | static int nodelay; |
66aaa7a5 | 47 | static void __iomem *wdt_base; |
66aaa7a5 MZ |
48 | |
49 | /* | |
50 | * The timeout values used are actually the absolute minimum the chip | |
51 | * offers. Typical values on my board are slightly over twice as long | |
52 | * (10s setting ends up with a 25s timeout), and can be up to 3 times | |
53 | * the nominal setting (according to the datasheet). So please take | |
54 | * these values with a grain of salt. Same goes for the initial delay | |
55 | * "feature". Only max6373/74 have a few settings without this initial | |
56 | * delay (selected with the "nodelay" parameter). | |
57 | * | |
58 | * I also decided to remove from the tables any timeout smaller than a | |
59 | * second, as it looked completly overkill... | |
60 | */ | |
61 | ||
62 | /* Timeouts in second */ | |
63 | struct max63xx_timeout { | |
64 | u8 wdset; | |
65 | u8 tdelay; | |
66 | u8 twd; | |
67 | }; | |
68 | ||
69 | static struct max63xx_timeout max6369_table[] = { | |
70 | { 5, 1, 1 }, | |
71 | { 6, 10, 10 }, | |
72 | { 7, 60, 60 }, | |
73 | { }, | |
74 | }; | |
75 | ||
76 | static struct max63xx_timeout max6371_table[] = { | |
77 | { 6, 60, 3 }, | |
78 | { 7, 60, 60 }, | |
79 | { }, | |
80 | }; | |
81 | ||
82 | static struct max63xx_timeout max6373_table[] = { | |
83 | { 2, 60, 1 }, | |
84 | { 5, 0, 1 }, | |
85 | { 1, 3, 3 }, | |
86 | { 7, 60, 10 }, | |
87 | { 6, 0, 10 }, | |
88 | { }, | |
89 | }; | |
90 | ||
91 | static struct max63xx_timeout *current_timeout; | |
92 | ||
93 | static struct max63xx_timeout * | |
94 | max63xx_select_timeout(struct max63xx_timeout *table, int value) | |
95 | { | |
96 | while (table->twd) { | |
97 | if (value <= table->twd) { | |
98 | if (nodelay && table->tdelay == 0) | |
99 | return table; | |
100 | ||
101 | if (!nodelay) | |
102 | return table; | |
103 | } | |
104 | ||
105 | table++; | |
106 | } | |
107 | ||
108 | return NULL; | |
109 | } | |
110 | ||
a0f36833 | 111 | static int max63xx_wdt_ping(struct watchdog_device *wdd) |
66aaa7a5 MZ |
112 | { |
113 | u8 val; | |
114 | ||
115 | spin_lock(&io_lock); | |
116 | ||
117 | val = __raw_readb(wdt_base); | |
118 | ||
119 | __raw_writeb(val | MAX6369_WDI, wdt_base); | |
120 | __raw_writeb(val & ~MAX6369_WDI, wdt_base); | |
121 | ||
122 | spin_unlock(&io_lock); | |
a0f36833 | 123 | return 0; |
66aaa7a5 MZ |
124 | } |
125 | ||
a0f36833 | 126 | static int max63xx_wdt_start(struct watchdog_device *wdd) |
66aaa7a5 | 127 | { |
a0f36833 | 128 | struct max63xx_timeout *entry = watchdog_get_drvdata(wdd); |
66aaa7a5 MZ |
129 | u8 val; |
130 | ||
66aaa7a5 MZ |
131 | spin_lock(&io_lock); |
132 | ||
133 | val = __raw_readb(wdt_base); | |
134 | val &= ~MAX6369_WDSET; | |
135 | val |= entry->wdset; | |
136 | __raw_writeb(val, wdt_base); | |
137 | ||
138 | spin_unlock(&io_lock); | |
139 | ||
140 | /* check for a edge triggered startup */ | |
141 | if (entry->tdelay == 0) | |
a0f36833 AL |
142 | max63xx_wdt_ping(wdd); |
143 | return 0; | |
66aaa7a5 MZ |
144 | } |
145 | ||
a0f36833 | 146 | static int max63xx_wdt_stop(struct watchdog_device *wdd) |
66aaa7a5 | 147 | { |
b1183e06 MZ |
148 | u8 val; |
149 | ||
66aaa7a5 MZ |
150 | spin_lock(&io_lock); |
151 | ||
b1183e06 MZ |
152 | val = __raw_readb(wdt_base); |
153 | val &= ~MAX6369_WDSET; | |
154 | val |= 3; | |
155 | __raw_writeb(val, wdt_base); | |
66aaa7a5 MZ |
156 | |
157 | spin_unlock(&io_lock); | |
a0f36833 | 158 | return 0; |
66aaa7a5 MZ |
159 | } |
160 | ||
a0f36833 AL |
161 | static const struct watchdog_info max63xx_wdt_info = { |
162 | .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, | |
66aaa7a5 MZ |
163 | .identity = "max63xx Watchdog", |
164 | }; | |
165 | ||
a0f36833 AL |
166 | static const struct watchdog_ops max63xx_wdt_ops = { |
167 | .owner = THIS_MODULE, | |
168 | .start = max63xx_wdt_start, | |
169 | .stop = max63xx_wdt_stop, | |
170 | .ping = max63xx_wdt_ping, | |
66aaa7a5 MZ |
171 | }; |
172 | ||
a0f36833 AL |
173 | static struct watchdog_device max63xx_wdt_dev = { |
174 | .info = &max63xx_wdt_info, | |
175 | .ops = &max63xx_wdt_ops, | |
66aaa7a5 MZ |
176 | }; |
177 | ||
2d991a16 | 178 | static int max63xx_wdt_probe(struct platform_device *pdev) |
66aaa7a5 | 179 | { |
a0f36833 | 180 | struct resource *wdt_mem; |
66aaa7a5 MZ |
181 | struct max63xx_timeout *table; |
182 | ||
183 | table = (struct max63xx_timeout *)pdev->id_entry->driver_data; | |
184 | ||
185 | if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT) | |
186 | heartbeat = DEFAULT_HEARTBEAT; | |
187 | ||
a0f36833 | 188 | dev_info(&pdev->dev, "requesting %ds heartbeat\n", heartbeat); |
66aaa7a5 MZ |
189 | current_timeout = max63xx_select_timeout(table, heartbeat); |
190 | ||
191 | if (!current_timeout) { | |
a0f36833 | 192 | dev_err(&pdev->dev, "unable to satisfy heartbeat request\n"); |
66aaa7a5 MZ |
193 | return -EINVAL; |
194 | } | |
195 | ||
a0f36833 | 196 | dev_info(&pdev->dev, "using %ds heartbeat with %ds initial delay\n", |
66aaa7a5 MZ |
197 | current_timeout->twd, current_timeout->tdelay); |
198 | ||
199 | heartbeat = current_timeout->twd; | |
200 | ||
f712eacf | 201 | wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
4c271bb6 TR |
202 | wdt_base = devm_ioremap_resource(&pdev->dev, wdt_mem); |
203 | if (IS_ERR(wdt_base)) | |
204 | return PTR_ERR(wdt_base); | |
66aaa7a5 | 205 | |
a0f36833 AL |
206 | max63xx_wdt_dev.timeout = heartbeat; |
207 | watchdog_set_nowayout(&max63xx_wdt_dev, nowayout); | |
208 | watchdog_set_drvdata(&max63xx_wdt_dev, current_timeout); | |
66aaa7a5 | 209 | |
a0f36833 | 210 | return watchdog_register_device(&max63xx_wdt_dev); |
66aaa7a5 MZ |
211 | } |
212 | ||
4b12b896 | 213 | static int max63xx_wdt_remove(struct platform_device *pdev) |
66aaa7a5 | 214 | { |
a0f36833 | 215 | watchdog_unregister_device(&max63xx_wdt_dev); |
66aaa7a5 MZ |
216 | return 0; |
217 | } | |
218 | ||
219 | static struct platform_device_id max63xx_id_table[] = { | |
220 | { "max6369_wdt", (kernel_ulong_t)max6369_table, }, | |
221 | { "max6370_wdt", (kernel_ulong_t)max6369_table, }, | |
222 | { "max6371_wdt", (kernel_ulong_t)max6371_table, }, | |
223 | { "max6372_wdt", (kernel_ulong_t)max6371_table, }, | |
224 | { "max6373_wdt", (kernel_ulong_t)max6373_table, }, | |
225 | { "max6374_wdt", (kernel_ulong_t)max6373_table, }, | |
226 | { }, | |
227 | }; | |
228 | MODULE_DEVICE_TABLE(platform, max63xx_id_table); | |
229 | ||
230 | static struct platform_driver max63xx_wdt_driver = { | |
231 | .probe = max63xx_wdt_probe, | |
82268714 | 232 | .remove = max63xx_wdt_remove, |
66aaa7a5 MZ |
233 | .id_table = max63xx_id_table, |
234 | .driver = { | |
235 | .name = "max63xx_wdt", | |
236 | .owner = THIS_MODULE, | |
237 | }, | |
238 | }; | |
239 | ||
b8ec6118 | 240 | module_platform_driver(max63xx_wdt_driver); |
66aaa7a5 MZ |
241 | |
242 | MODULE_AUTHOR("Marc Zyngier <maz@misterjones.org>"); | |
243 | MODULE_DESCRIPTION("max63xx Watchdog Driver"); | |
244 | ||
245 | module_param(heartbeat, int, 0); | |
246 | MODULE_PARM_DESC(heartbeat, | |
247 | "Watchdog heartbeat period in seconds from 1 to " | |
248 | __MODULE_STRING(MAX_HEARTBEAT) ", default " | |
249 | __MODULE_STRING(DEFAULT_HEARTBEAT)); | |
250 | ||
86a1e189 | 251 | module_param(nowayout, bool, 0); |
66aaa7a5 MZ |
252 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" |
253 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
254 | ||
255 | module_param(nodelay, int, 0); | |
256 | MODULE_PARM_DESC(nodelay, | |
257 | "Force selection of a timeout setting without initial delay " | |
258 | "(max6373/74 only, default=0)"); | |
259 | ||
260 | MODULE_LICENSE("GPL"); | |
261 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); |