Commit | Line | Data |
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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
7f4da474 | 2 | /* |
ca22e79f | 3 | * HPE WatchDog Driver |
7f4da474 TM |
4 | * based on |
5 | * | |
6 | * SoftDog 0.05: A Software Watchdog Device | |
7 | * | |
9a46fc4e | 8 | * (c) Copyright 2018 Hewlett Packard Enterprise Development LP |
ca22e79f | 9 | * Thomas Mingarelli <thomas.mingarelli@hpe.com> |
7f4da474 TM |
10 | */ |
11 | ||
27c766aa JP |
12 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
13 | ||
7f4da474 | 14 | #include <linux/device.h> |
7f4da474 | 15 | #include <linux/io.h> |
7f4da474 | 16 | #include <linux/kernel.h> |
7f4da474 | 17 | #include <linux/module.h> |
7f4da474 | 18 | #include <linux/moduleparam.h> |
7f4da474 TM |
19 | #include <linux/pci.h> |
20 | #include <linux/pci_ids.h> | |
7f4da474 | 21 | #include <linux/types.h> |
7f4da474 | 22 | #include <linux/watchdog.h> |
ed835d81 | 23 | #ifdef CONFIG_HPWDT_NMI_DECODING |
d48b0e17 | 24 | #include <asm/nmi.h> |
ed835d81 | 25 | #endif |
acc195bd | 26 | #include <linux/crash_dump.h> |
7f4da474 | 27 | |
5674b74e | 28 | #define HPWDT_VERSION "2.0.4" |
e802e32d | 29 | #define SECS_TO_TICKS(secs) ((secs) * 1000 / 128) |
6f681c2e | 30 | #define TICKS_TO_SECS(ticks) ((ticks) * 128 / 1000) |
be3d7f7c JH |
31 | #define HPWDT_MAX_TICKS 65535 |
32 | #define HPWDT_MAX_TIMER TICKS_TO_SECS(HPWDT_MAX_TICKS) | |
923410d0 | 33 | #define DEFAULT_MARGIN 30 |
0458f403 | 34 | #define PRETIMEOUT_SEC 9 |
923410d0 | 35 | |
a6c24733 | 36 | static bool ilo5; |
923410d0 | 37 | static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */ |
86a1e189 | 38 | static bool nowayout = WATCHDOG_NOWAYOUT; |
0458f403 | 39 | static bool pretimeout = IS_ENABLED(CONFIG_HPWDT_NMI_DECODING); |
be3d7f7c | 40 | static int kdumptimeout = -1; |
923410d0 | 41 | |
42 | static void __iomem *pci_mem_addr; /* the PCI-memory address */ | |
838534e5 | 43 | static unsigned long __iomem *hpwdt_nmistat; |
923410d0 | 44 | static unsigned long __iomem *hpwdt_timer_reg; |
45 | static unsigned long __iomem *hpwdt_timer_con; | |
46 | ||
bc17f9dc | 47 | static const struct pci_device_id hpwdt_devices[] = { |
36e3ff44 | 48 | { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) }, /* iLO2 */ |
49 | { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) }, /* iLO3 */ | |
742b80c5 | 50 | { PCI_DEVICE(PCI_VENDOR_ID_HP_3PAR, 0x0389) }, /* PCtrl */ |
923410d0 | 51 | {0}, /* terminate list */ |
52 | }; | |
53 | MODULE_DEVICE_TABLE(pci, hpwdt_devices); | |
54 | ||
94d6b80c JH |
55 | static const struct pci_device_id hpwdt_blacklist[] = { |
56 | { PCI_DEVICE_SUB(PCI_VENDOR_ID_HP, 0x3306, PCI_VENDOR_ID_HP, 0x1979) }, /* auxilary iLO */ | |
de2cb0cc | 57 | { PCI_DEVICE_SUB(PCI_VENDOR_ID_HP, 0x3306, PCI_VENDOR_ID_HP_3PAR, 0x0289) }, /* CL */ |
94d6b80c JH |
58 | {0}, /* terminate list */ |
59 | }; | |
7f4da474 | 60 | |
be3d7f7c | 61 | static struct watchdog_device hpwdt_dev; |
7f4da474 TM |
62 | /* |
63 | * Watchdog operations | |
64 | */ | |
bb721d6b JH |
65 | static int hpwdt_hw_is_running(void) |
66 | { | |
67 | return ioread8(hpwdt_timer_con) & 0x01; | |
68 | } | |
69 | ||
d0a4027f | 70 | static int hpwdt_start(struct watchdog_device *wdd) |
7f4da474 | 71 | { |
0458f403 | 72 | int control = 0x81 | (pretimeout ? 0x4 : 0); |
c22d8e38 | 73 | int reload = SECS_TO_TICKS(min(wdd->timeout, wdd->max_hw_heartbeat_ms/1000)); |
d0a4027f | 74 | |
c22d8e38 | 75 | dev_dbg(wdd->parent, "start watchdog 0x%08x:0x%08x:0x%02x\n", wdd->timeout, reload, control); |
7f4da474 | 76 | iowrite16(reload, hpwdt_timer_reg); |
0458f403 | 77 | iowrite8(control, hpwdt_timer_con); |
d0a4027f JH |
78 | |
79 | return 0; | |
7f4da474 TM |
80 | } |
81 | ||
82 | static void hpwdt_stop(void) | |
83 | { | |
84 | unsigned long data; | |
85 | ||
ccfd6921 JH |
86 | pr_debug("stop watchdog\n"); |
87 | ||
d08c9a33 | 88 | data = ioread8(hpwdt_timer_con); |
7f4da474 | 89 | data &= 0xFE; |
d08c9a33 | 90 | iowrite8(data, hpwdt_timer_con); |
7f4da474 TM |
91 | } |
92 | ||
d0a4027f | 93 | static int hpwdt_stop_core(struct watchdog_device *wdd) |
7f4da474 | 94 | { |
d0a4027f JH |
95 | hpwdt_stop(); |
96 | ||
97 | return 0; | |
7f4da474 TM |
98 | } |
99 | ||
be3d7f7c JH |
100 | static void hpwdt_ping_ticks(int val) |
101 | { | |
102 | val = min(val, HPWDT_MAX_TICKS); | |
103 | iowrite16(val, hpwdt_timer_reg); | |
104 | } | |
105 | ||
d0a4027f | 106 | static int hpwdt_ping(struct watchdog_device *wdd) |
7f4da474 | 107 | { |
c22d8e38 | 108 | int reload = SECS_TO_TICKS(min(wdd->timeout, wdd->max_hw_heartbeat_ms/1000)); |
0458f403 | 109 | |
c22d8e38 | 110 | dev_dbg(wdd->parent, "ping watchdog 0x%08x:0x%08x\n", wdd->timeout, reload); |
be3d7f7c | 111 | hpwdt_ping_ticks(reload); |
0458f403 | 112 | |
7f4da474 TM |
113 | return 0; |
114 | } | |
115 | ||
d0a4027f | 116 | static unsigned int hpwdt_gettimeleft(struct watchdog_device *wdd) |
aae67f36 | 117 | { |
118 | return TICKS_TO_SECS(ioread16(hpwdt_timer_reg)); | |
119 | } | |
120 | ||
d0a4027f JH |
121 | static int hpwdt_settimeout(struct watchdog_device *wdd, unsigned int val) |
122 | { | |
ccfd6921 JH |
123 | dev_dbg(wdd->parent, "set_timeout = %d\n", val); |
124 | ||
d0a4027f | 125 | wdd->timeout = val; |
0458f403 | 126 | if (val <= wdd->pretimeout) { |
ccfd6921 | 127 | dev_dbg(wdd->parent, "pretimeout < timeout. Setting to zero\n"); |
0458f403 | 128 | wdd->pretimeout = 0; |
17f0d1b9 | 129 | pretimeout = false; |
0458f403 JH |
130 | if (watchdog_active(wdd)) |
131 | hpwdt_start(wdd); | |
132 | } | |
d0a4027f JH |
133 | hpwdt_ping(wdd); |
134 | ||
135 | return 0; | |
136 | } | |
137 | ||
aeebc6ba | 138 | #ifdef CONFIG_HPWDT_NMI_DECODING |
0458f403 JH |
139 | static int hpwdt_set_pretimeout(struct watchdog_device *wdd, unsigned int req) |
140 | { | |
141 | unsigned int val = 0; | |
142 | ||
ccfd6921 | 143 | dev_dbg(wdd->parent, "set_pretimeout = %d\n", req); |
0458f403 JH |
144 | if (req) { |
145 | val = PRETIMEOUT_SEC; | |
146 | if (val >= wdd->timeout) | |
147 | return -EINVAL; | |
148 | } | |
149 | ||
ccfd6921 JH |
150 | if (val != req) |
151 | dev_dbg(wdd->parent, "Rounding pretimeout to: %d\n", val); | |
152 | ||
0458f403 JH |
153 | wdd->pretimeout = val; |
154 | pretimeout = !!val; | |
155 | ||
156 | if (watchdog_active(wdd)) | |
157 | hpwdt_start(wdd); | |
158 | ||
159 | return 0; | |
160 | } | |
161 | ||
838534e5 JH |
162 | static int hpwdt_my_nmi(void) |
163 | { | |
164 | return ioread8(hpwdt_nmistat) & 0x6; | |
165 | } | |
166 | ||
ab4ba3cd TM |
167 | /* |
168 | * NMI Handler | |
169 | */ | |
9c48f1c6 | 170 | static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs) |
ab4ba3cd | 171 | { |
a042229a JH |
172 | unsigned int mynmi = hpwdt_my_nmi(); |
173 | static char panic_msg[] = | |
174 | "00: An NMI occurred. Depending on your system the reason " | |
175 | "for the NMI is logged in any one of the following resources:\n" | |
176 | "1. Integrated Management Log (IML)\n" | |
177 | "2. OA Syslog\n" | |
178 | "3. OA Forward Progress Log\n" | |
179 | "4. iLO Event Log"; | |
180 | ||
62290a5c | 181 | if (ilo5 && ulReason == NMI_UNKNOWN && !mynmi) |
838534e5 JH |
182 | return NMI_DONE; |
183 | ||
093d4385 | 184 | if (ilo5 && !pretimeout && !mynmi) |
0458f403 JH |
185 | return NMI_DONE; |
186 | ||
be3d7f7c JH |
187 | if (kdumptimeout < 0) |
188 | hpwdt_stop(); | |
189 | else if (kdumptimeout == 0) | |
190 | ; | |
191 | else { | |
192 | unsigned int val = max((unsigned int)kdumptimeout, hpwdt_dev.timeout); | |
193 | hpwdt_ping_ticks(SECS_TO_TICKS(val)); | |
194 | } | |
dbc018ec | 195 | |
a042229a JH |
196 | hex_byte_pack(panic_msg, mynmi); |
197 | nmi_panic(regs, panic_msg); | |
5efc7a62 | 198 | |
abc514c5 | 199 | return NMI_HANDLED; |
ab4ba3cd | 200 | } |
86ded1f3 | 201 | #endif /* CONFIG_HPWDT_NMI_DECODING */ |
ab4ba3cd | 202 | |
7f4da474 | 203 | |
42747d71 | 204 | static const struct watchdog_info ident = { |
0458f403 JH |
205 | .options = WDIOF_PRETIMEOUT | |
206 | WDIOF_SETTIMEOUT | | |
7f4da474 TM |
207 | WDIOF_KEEPALIVEPING | |
208 | WDIOF_MAGICCLOSE, | |
ca22e79f | 209 | .identity = "HPE iLO2+ HW Watchdog Timer", |
7f4da474 TM |
210 | }; |
211 | ||
7f4da474 TM |
212 | /* |
213 | * Kernel interfaces | |
214 | */ | |
d0a4027f JH |
215 | |
216 | static const struct watchdog_ops hpwdt_ops = { | |
217 | .owner = THIS_MODULE, | |
218 | .start = hpwdt_start, | |
219 | .stop = hpwdt_stop_core, | |
220 | .ping = hpwdt_ping, | |
221 | .set_timeout = hpwdt_settimeout, | |
222 | .get_timeleft = hpwdt_gettimeleft, | |
0458f403 JH |
223 | #ifdef CONFIG_HPWDT_NMI_DECODING |
224 | .set_pretimeout = hpwdt_set_pretimeout, | |
225 | #endif | |
7f4da474 TM |
226 | }; |
227 | ||
d0a4027f JH |
228 | static struct watchdog_device hpwdt_dev = { |
229 | .info = &ident, | |
230 | .ops = &hpwdt_ops, | |
231 | .min_timeout = 1, | |
d0a4027f | 232 | .timeout = DEFAULT_MARGIN, |
0458f403 | 233 | .pretimeout = PRETIMEOUT_SEC, |
c22d8e38 | 234 | .max_hw_heartbeat_ms = HPWDT_MAX_TIMER * 1000, |
7f4da474 TM |
235 | }; |
236 | ||
d0a4027f | 237 | |
7f4da474 TM |
238 | /* |
239 | * Init & Exit | |
240 | */ | |
241 | ||
2d991a16 | 242 | static int hpwdt_init_nmi_decoding(struct pci_dev *dev) |
2ec7ed67 | 243 | { |
2b3d89b4 | 244 | #ifdef CONFIG_HPWDT_NMI_DECODING |
2ec7ed67 | 245 | int retval; |
2ec7ed67 | 246 | /* |
09ee1014 | 247 | * Only one function can register for NMI_UNKNOWN |
2ec7ed67 | 248 | */ |
09ee1014 | 249 | retval = register_nmi_handler(NMI_UNKNOWN, hpwdt_pretimeout, 0, "hpwdt"); |
553222f3 DZ |
250 | if (retval) |
251 | goto error; | |
252 | retval = register_nmi_handler(NMI_SERR, hpwdt_pretimeout, 0, "hpwdt"); | |
253 | if (retval) | |
254 | goto error1; | |
255 | retval = register_nmi_handler(NMI_IO_CHECK, hpwdt_pretimeout, 0, "hpwdt"); | |
256 | if (retval) | |
257 | goto error2; | |
2ec7ed67 | 258 | |
259 | dev_info(&dev->dev, | |
703fc3df JH |
260 | "HPE Watchdog Timer Driver: NMI decoding initialized\n"); |
261 | ||
2ec7ed67 | 262 | return 0; |
553222f3 DZ |
263 | |
264 | error2: | |
265 | unregister_nmi_handler(NMI_SERR, "hpwdt"); | |
266 | error1: | |
267 | unregister_nmi_handler(NMI_UNKNOWN, "hpwdt"); | |
268 | error: | |
269 | dev_warn(&dev->dev, | |
270 | "Unable to register a die notifier (err=%d).\n", | |
271 | retval); | |
553222f3 | 272 | return retval; |
2b3d89b4 JH |
273 | #endif /* CONFIG_HPWDT_NMI_DECODING */ |
274 | return 0; | |
2ec7ed67 | 275 | } |
276 | ||
b77b7088 | 277 | static void hpwdt_exit_nmi_decoding(void) |
2ec7ed67 | 278 | { |
2b3d89b4 | 279 | #ifdef CONFIG_HPWDT_NMI_DECODING |
9c48f1c6 | 280 | unregister_nmi_handler(NMI_UNKNOWN, "hpwdt"); |
a089361c MT |
281 | unregister_nmi_handler(NMI_SERR, "hpwdt"); |
282 | unregister_nmi_handler(NMI_IO_CHECK, "hpwdt"); | |
2b3d89b4 | 283 | #endif |
86ded1f3 | 284 | } |
285 | ||
2d991a16 | 286 | static int hpwdt_init_one(struct pci_dev *dev, |
ab4ba3cd | 287 | const struct pci_device_id *ent) |
7f4da474 TM |
288 | { |
289 | int retval; | |
290 | ||
291 | /* | |
36e3ff44 | 292 | * First let's find out if we are on an iLO2+ server. We will |
7f4da474 | 293 | * not run on a legacy ASM box. |
ab4ba3cd | 294 | * So we only support the G5 ProLiant servers and higher. |
7f4da474 | 295 | */ |
fc113d54 BB |
296 | if (dev->subsystem_vendor != PCI_VENDOR_ID_HP && |
297 | dev->subsystem_vendor != PCI_VENDOR_ID_HP_3PAR) { | |
7f4da474 | 298 | dev_warn(&dev->dev, |
36e3ff44 | 299 | "This server does not have an iLO2+ ASIC.\n"); |
7f4da474 TM |
300 | return -ENODEV; |
301 | } | |
302 | ||
94d6b80c JH |
303 | if (pci_match_id(hpwdt_blacklist, dev)) { |
304 | dev_dbg(&dev->dev, "Not supported on this device\n"); | |
0821f20d | 305 | return -ENODEV; |
94d6b80c | 306 | } |
0821f20d | 307 | |
7f4da474 TM |
308 | if (pci_enable_device(dev)) { |
309 | dev_warn(&dev->dev, | |
310 | "Not possible to enable PCI Device: 0x%x:0x%x.\n", | |
311 | ent->vendor, ent->device); | |
312 | return -ENODEV; | |
313 | } | |
314 | ||
315 | pci_mem_addr = pci_iomap(dev, 1, 0x80); | |
316 | if (!pci_mem_addr) { | |
317 | dev_warn(&dev->dev, | |
36e3ff44 | 318 | "Unable to detect the iLO2+ server memory.\n"); |
7f4da474 TM |
319 | retval = -ENOMEM; |
320 | goto error_pci_iomap; | |
321 | } | |
838534e5 | 322 | hpwdt_nmistat = pci_mem_addr + 0x6e; |
7f4da474 TM |
323 | hpwdt_timer_reg = pci_mem_addr + 0x70; |
324 | hpwdt_timer_con = pci_mem_addr + 0x72; | |
325 | ||
bb721d6b JH |
326 | /* Have the core update running timer until user space is ready */ |
327 | if (hpwdt_hw_is_running()) { | |
328 | dev_info(&dev->dev, "timer is running\n"); | |
329 | set_bit(WDOG_HW_RUNNING, &hpwdt_dev.status); | |
330 | } | |
308b135e | 331 | |
2ec7ed67 | 332 | /* Initialize NMI Decoding functionality */ |
333 | retval = hpwdt_init_nmi_decoding(dev); | |
334 | if (retval != 0) | |
335 | goto error_init_nmi_decoding; | |
7f4da474 | 336 | |
48b32199 | 337 | watchdog_stop_on_unregister(&hpwdt_dev); |
d0a4027f | 338 | watchdog_set_nowayout(&hpwdt_dev, nowayout); |
87dfe210 | 339 | watchdog_init_timeout(&hpwdt_dev, soft_margin, NULL); |
d0a4027f | 340 | |
acc195bd | 341 | if (is_kdump_kernel()) { |
17f0d1b9 | 342 | pretimeout = false; |
acc195bd JH |
343 | kdumptimeout = 0; |
344 | } | |
345 | ||
10d790d1 JH |
346 | if (pretimeout && hpwdt_dev.timeout <= PRETIMEOUT_SEC) { |
347 | dev_warn(&dev->dev, "timeout <= pretimeout. Setting pretimeout to zero\n"); | |
17f0d1b9 | 348 | pretimeout = false; |
10d790d1 | 349 | } |
4d9186d0 | 350 | hpwdt_dev.pretimeout = pretimeout ? PRETIMEOUT_SEC : 0; |
be3d7f7c | 351 | kdumptimeout = min(kdumptimeout, HPWDT_MAX_TIMER); |
4d9186d0 | 352 | |
d0a4027f JH |
353 | hpwdt_dev.parent = &dev->dev; |
354 | retval = watchdog_register_device(&hpwdt_dev); | |
f51540b8 | 355 | if (retval < 0) |
d0a4027f | 356 | goto error_wd_register; |
7f4da474 | 357 | |
92301461 JH |
358 | dev_info(&dev->dev, "HPE Watchdog Timer Driver: Version: %s\n", |
359 | HPWDT_VERSION); | |
360 | dev_info(&dev->dev, "timeout: %d seconds (nowayout=%d)\n", | |
361 | hpwdt_dev.timeout, nowayout); | |
362 | dev_info(&dev->dev, "pretimeout: %s.\n", | |
363 | pretimeout ? "on" : "off"); | |
be3d7f7c | 364 | dev_info(&dev->dev, "kdumptimeout: %d.\n", kdumptimeout); |
d0a4027f | 365 | |
a6c24733 JH |
366 | if (dev->subsystem_vendor == PCI_VENDOR_ID_HP_3PAR) |
367 | ilo5 = true; | |
368 | ||
7f4da474 TM |
369 | return 0; |
370 | ||
d0a4027f | 371 | error_wd_register: |
2ec7ed67 | 372 | hpwdt_exit_nmi_decoding(); |
373 | error_init_nmi_decoding: | |
7f4da474 TM |
374 | pci_iounmap(dev, pci_mem_addr); |
375 | error_pci_iomap: | |
376 | pci_disable_device(dev); | |
377 | return retval; | |
378 | } | |
379 | ||
4b12b896 | 380 | static void hpwdt_exit(struct pci_dev *dev) |
7f4da474 | 381 | { |
d0a4027f | 382 | watchdog_unregister_device(&hpwdt_dev); |
2ec7ed67 | 383 | hpwdt_exit_nmi_decoding(); |
7f4da474 TM |
384 | pci_iounmap(dev, pci_mem_addr); |
385 | pci_disable_device(dev); | |
386 | } | |
387 | ||
388 | static struct pci_driver hpwdt_driver = { | |
389 | .name = "hpwdt", | |
390 | .id_table = hpwdt_devices, | |
391 | .probe = hpwdt_init_one, | |
82268714 | 392 | .remove = hpwdt_exit, |
7f4da474 TM |
393 | }; |
394 | ||
7f4da474 | 395 | MODULE_AUTHOR("Tom Mingarelli"); |
9a46fc4e | 396 | MODULE_DESCRIPTION("hpe watchdog driver"); |
7f4da474 | 397 | MODULE_LICENSE("GPL"); |
d8100c3a | 398 | MODULE_VERSION(HPWDT_VERSION); |
7f4da474 TM |
399 | |
400 | module_param(soft_margin, int, 0); | |
401 | MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds"); | |
402 | ||
397a35d4 JH |
403 | module_param_named(timeout, soft_margin, int, 0); |
404 | MODULE_PARM_DESC(timeout, "Alias of soft_margin"); | |
405 | ||
86a1e189 | 406 | module_param(nowayout, bool, 0); |
7f4da474 TM |
407 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" |
408 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
409 | ||
be3d7f7c JH |
410 | module_param(kdumptimeout, int, 0444); |
411 | MODULE_PARM_DESC(kdumptimeout, "Timeout applied for crash kernel transition in seconds"); | |
412 | ||
0458f403 JH |
413 | #ifdef CONFIG_HPWDT_NMI_DECODING |
414 | module_param(pretimeout, bool, 0); | |
415 | MODULE_PARM_DESC(pretimeout, "Watchdog pretimeout enabled"); | |
416 | #endif | |
417 | ||
5ce9c371 | 418 | module_pci_driver(hpwdt_driver); |