[linux-2.6-block.git] / drivers / watchdog / hpwdt.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 *	HPE WatchDog Driver
 *	based on
 *
 *	SoftDog	0.05:	A Software Watchdog Device
 *
 *	(c) Copyright 2018 Hewlett Packard Enterprise Development LP
 *	Thomas Mingarelli <thomas.mingarelli@hpe.com>
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/device.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
#include <linux/types.h>
#include <linux/watchdog.h>
#include <asm/nmi.h>
#include <linux/crash_dump.h>

#define HPWDT_VERSION			"2.0.4"
#define SECS_TO_TICKS(secs)		((secs) * 1000 / 128)
#define TICKS_TO_SECS(ticks)		((ticks) * 128 / 1000)
#define HPWDT_MAX_TICKS			65535
#define HPWDT_MAX_TIMER			TICKS_TO_SECS(HPWDT_MAX_TICKS)
#define DEFAULT_MARGIN			30
#define PRETIMEOUT_SEC			9

static bool ilo5;
static unsigned int soft_margin = DEFAULT_MARGIN;	/* in seconds */
static bool nowayout = WATCHDOG_NOWAYOUT;
static bool pretimeout = IS_ENABLED(CONFIG_HPWDT_NMI_DECODING);
static int kdumptimeout = -1;

static void __iomem *pci_mem_addr;		/* the PCI-memory address */
static unsigned long __iomem *hpwdt_nmistat;
static unsigned long __iomem *hpwdt_timer_reg;
static unsigned long __iomem *hpwdt_timer_con;

static const struct pci_device_id hpwdt_devices[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) },	/* iLO2 */
	{ PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) },	/* iLO3 */
	{ PCI_DEVICE(PCI_VENDOR_ID_HP_3PAR, 0x0389) },	/* PCtrl */
	{0},			/* terminate list */
};
MODULE_DEVICE_TABLE(pci, hpwdt_devices);

static const struct pci_device_id hpwdt_blacklist[] = {
	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_HP, 0x3306, PCI_VENDOR_ID_HP, 0x1979) }, /* auxilary iLO */
	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_HP, 0x3306, PCI_VENDOR_ID_HP_3PAR, 0x0289) },  /* CL */
	{0},			/* terminate list */
};

static struct watchdog_device hpwdt_dev;
/*
 *	Watchdog operations
 */
static int hpwdt_hw_is_running(void)
{
	return ioread8(hpwdt_timer_con) & 0x01;
}

static int hpwdt_start(struct watchdog_device *wdd)
{
	int control = 0x81 | (pretimeout ? 0x4 : 0);
	int reload = SECS_TO_TICKS(min(wdd->timeout, wdd->max_hw_heartbeat_ms/1000));

	dev_dbg(wdd->parent, "start watchdog 0x%08x:0x%08x:0x%02x\n", wdd->timeout, reload, control);
	iowrite16(reload, hpwdt_timer_reg);
	iowrite8(control, hpwdt_timer_con);

	return 0;
}

static void hpwdt_stop(void)
{
	unsigned long data;

	pr_debug("stop  watchdog\n");

	data = ioread8(hpwdt_timer_con);
	data &= 0xFE;
	iowrite8(data, hpwdt_timer_con);
}

static int hpwdt_stop_core(struct watchdog_device *wdd)
{
	hpwdt_stop();

	return 0;
}

static void hpwdt_ping_ticks(int val)
{
	val = min(val, HPWDT_MAX_TICKS);
	iowrite16(val, hpwdt_timer_reg);
}

static int hpwdt_ping(struct watchdog_device *wdd)
{
	int reload = SECS_TO_TICKS(min(wdd->timeout, wdd->max_hw_heartbeat_ms/1000));

	dev_dbg(wdd->parent, "ping  watchdog 0x%08x:0x%08x\n", wdd->timeout, reload);
	hpwdt_ping_ticks(reload);

	return 0;
}

static unsigned int hpwdt_gettimeleft(struct watchdog_device *wdd)
{
	return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
}

static int hpwdt_settimeout(struct watchdog_device *wdd, unsigned int val)
{
	dev_dbg(wdd->parent, "set_timeout = %d\n", val);

	wdd->timeout = val;
	if (val <= wdd->pretimeout) {
		dev_dbg(wdd->parent, "pretimeout < timeout. Setting to zero\n");
		wdd->pretimeout = 0;
		pretimeout = false;
		if (watchdog_active(wdd))
			hpwdt_start(wdd);
	}
	hpwdt_ping(wdd);

	return 0;
}

#ifdef CONFIG_HPWDT_NMI_DECODING
static int hpwdt_set_pretimeout(struct watchdog_device *wdd, unsigned int req)
{
	unsigned int val = 0;

	dev_dbg(wdd->parent, "set_pretimeout = %d\n", req);
	if (req) {
		val = PRETIMEOUT_SEC;
		if (val >= wdd->timeout)
			return -EINVAL;
	}

	if (val != req)
		dev_dbg(wdd->parent, "Rounding pretimeout to: %d\n", val);

	wdd->pretimeout = val;
	pretimeout = !!val;

	if (watchdog_active(wdd))
		hpwdt_start(wdd);

	return 0;
}

static int hpwdt_my_nmi(void)
{
	return ioread8(hpwdt_nmistat) & 0x6;
}

/*
 *	NMI Handler
 */
static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs)
{
	unsigned int mynmi = hpwdt_my_nmi();
	static char panic_msg[] =
		"00: An NMI occurred. Depending on your system the reason "
		"for the NMI is logged in any one of the following resources:\n"
		"1. Integrated Management Log (IML)\n"
		"2. OA Syslog\n"
		"3. OA Forward Progress Log\n"
		"4. iLO Event Log";

	if (ilo5 && ulReason == NMI_UNKNOWN && !mynmi)
		return NMI_DONE;

	if (ilo5 && !pretimeout && !mynmi)
		return NMI_DONE;

	if (kdumptimeout < 0)
		hpwdt_stop();
	else if (kdumptimeout == 0)
		;
	else {
		unsigned int val = max((unsigned int)kdumptimeout, hpwdt_dev.timeout);
		hpwdt_ping_ticks(SECS_TO_TICKS(val));
	}

	hex_byte_pack(panic_msg, mynmi);
	nmi_panic(regs, panic_msg);

	return NMI_HANDLED;
}
#endif /* CONFIG_HPWDT_NMI_DECODING */


static const struct watchdog_info ident = {
	.options = WDIOF_PRETIMEOUT    |
		   WDIOF_SETTIMEOUT    |
		   WDIOF_KEEPALIVEPING |
		   WDIOF_MAGICCLOSE,
	.identity = "HPE iLO2+ HW Watchdog Timer",
};

/*
 *	Kernel interfaces
 */

static const struct watchdog_ops hpwdt_ops = {
	.owner		= THIS_MODULE,
	.start		= hpwdt_start,
	.stop		= hpwdt_stop_core,
	.ping		= hpwdt_ping,
	.set_timeout	= hpwdt_settimeout,
	.get_timeleft	= hpwdt_gettimeleft,
#ifdef CONFIG_HPWDT_NMI_DECODING
	.set_pretimeout	= hpwdt_set_pretimeout,
#endif
};

static struct watchdog_device hpwdt_dev = {
	.info		= &ident,
	.ops		= &hpwdt_ops,
	.min_timeout	= 1,
	.timeout	= DEFAULT_MARGIN,
	.pretimeout	= PRETIMEOUT_SEC,
	.max_hw_heartbeat_ms	= HPWDT_MAX_TIMER * 1000,
};


/*
 *	Init & Exit
 */

static int hpwdt_init_nmi_decoding(struct pci_dev *dev)
{
#ifdef CONFIG_HPWDT_NMI_DECODING
	int retval;
	/*
	 * Only one function can register for NMI_UNKNOWN
	 */
	retval = register_nmi_handler(NMI_UNKNOWN, hpwdt_pretimeout, 0, "hpwdt");
	if (retval)
		goto error;
	retval = register_nmi_handler(NMI_SERR, hpwdt_pretimeout, 0, "hpwdt");
	if (retval)
		goto error1;
	retval = register_nmi_handler(NMI_IO_CHECK, hpwdt_pretimeout, 0, "hpwdt");
	if (retval)
		goto error2;

	dev_info(&dev->dev,
		"HPE Watchdog Timer Driver: NMI decoding initialized\n");

	return 0;

error2:
	unregister_nmi_handler(NMI_SERR, "hpwdt");
error1:
	unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
error:
	dev_warn(&dev->dev,
		"Unable to register a die notifier (err=%d).\n",
		retval);
	return retval;
#endif	/* CONFIG_HPWDT_NMI_DECODING */
	return 0;
}

static void hpwdt_exit_nmi_decoding(void)
{
#ifdef CONFIG_HPWDT_NMI_DECODING
	unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
	unregister_nmi_handler(NMI_SERR, "hpwdt");
	unregister_nmi_handler(NMI_IO_CHECK, "hpwdt");
#endif
}

static int hpwdt_init_one(struct pci_dev *dev,
					const struct pci_device_id *ent)
{
	int retval;

	/*
	 * First let's find out if we are on an iLO2+ server. We will
	 * not run on a legacy ASM box.
	 * So we only support the G5 ProLiant servers and higher.
	 */
	if (dev->subsystem_vendor != PCI_VENDOR_ID_HP &&
	    dev->subsystem_vendor != PCI_VENDOR_ID_HP_3PAR) {
		dev_warn(&dev->dev,
			"This server does not have an iLO2+ ASIC.\n");
		return -ENODEV;
	}

	if (pci_match_id(hpwdt_blacklist, dev)) {
		dev_dbg(&dev->dev, "Not supported on this device\n");
		return -ENODEV;
	}

	if (pci_enable_device(dev)) {
		dev_warn(&dev->dev,
			"Not possible to enable PCI Device: 0x%x:0x%x.\n",
			ent->vendor, ent->device);
		return -ENODEV;
	}

	pci_mem_addr = pci_iomap(dev, 1, 0x80);
	if (!pci_mem_addr) {
		dev_warn(&dev->dev,
			"Unable to detect the iLO2+ server memory.\n");
		retval = -ENOMEM;
		goto error_pci_iomap;
	}
	hpwdt_nmistat	= pci_mem_addr + 0x6e;
	hpwdt_timer_reg = pci_mem_addr + 0x70;
	hpwdt_timer_con = pci_mem_addr + 0x72;

	/* Have the core update running timer until user space is ready */
	if (hpwdt_hw_is_running()) {
		dev_info(&dev->dev, "timer is running\n");
		set_bit(WDOG_HW_RUNNING, &hpwdt_dev.status);
	}

	/* Initialize NMI Decoding functionality */
	retval = hpwdt_init_nmi_decoding(dev);
	if (retval != 0)
		goto error_init_nmi_decoding;

	watchdog_stop_on_unregister(&hpwdt_dev);
	watchdog_set_nowayout(&hpwdt_dev, nowayout);
	watchdog_init_timeout(&hpwdt_dev, soft_margin, NULL);

	if (is_kdump_kernel()) {
		pretimeout = false;
		kdumptimeout = 0;
	}

	if (pretimeout && hpwdt_dev.timeout <= PRETIMEOUT_SEC) {
		dev_warn(&dev->dev, "timeout <= pretimeout. Setting pretimeout to zero\n");
		pretimeout = false;
	}
	hpwdt_dev.pretimeout = pretimeout ? PRETIMEOUT_SEC : 0;
	kdumptimeout = min(kdumptimeout, HPWDT_MAX_TIMER);

	hpwdt_dev.parent = &dev->dev;
	retval = watchdog_register_device(&hpwdt_dev);
	if (retval < 0)
		goto error_wd_register;

	dev_info(&dev->dev, "HPE Watchdog Timer Driver: Version: %s\n",
				HPWDT_VERSION);
	dev_info(&dev->dev, "timeout: %d seconds (nowayout=%d)\n",
				hpwdt_dev.timeout, nowayout);
	dev_info(&dev->dev, "pretimeout: %s.\n",
				pretimeout ? "on" : "off");
	dev_info(&dev->dev, "kdumptimeout: %d.\n", kdumptimeout);

	if (dev->subsystem_vendor == PCI_VENDOR_ID_HP_3PAR)
		ilo5 = true;

	return 0;

error_wd_register:
	hpwdt_exit_nmi_decoding();
error_init_nmi_decoding:
	pci_iounmap(dev, pci_mem_addr);
error_pci_iomap:
	pci_disable_device(dev);
	return retval;
}

static void hpwdt_exit(struct pci_dev *dev)
{
	watchdog_unregister_device(&hpwdt_dev);
	hpwdt_exit_nmi_decoding();
	pci_iounmap(dev, pci_mem_addr);
	pci_disable_device(dev);
}

static struct pci_driver hpwdt_driver = {
	.name = "hpwdt",
	.id_table = hpwdt_devices,
	.probe = hpwdt_init_one,
	.remove = hpwdt_exit,
};

MODULE_AUTHOR("Tom Mingarelli");
MODULE_DESCRIPTION("hpe watchdog driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(HPWDT_VERSION);

module_param(soft_margin, int, 0);
MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");

module_param_named(timeout, soft_margin, int, 0);
MODULE_PARM_DESC(timeout, "Alias of soft_margin");

module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
		__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

module_param(kdumptimeout, int, 0444);
MODULE_PARM_DESC(kdumptimeout, "Timeout applied for crash kernel transition in seconds");

#ifdef CONFIG_HPWDT_NMI_DECODING
module_param(pretimeout, bool, 0);
MODULE_PARM_DESC(pretimeout, "Watchdog pretimeout enabled");
#endif

module_pci_driver(hpwdt_driver);
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
7f4da474	2	/*
ca22e79f	3	* HPE WatchDog Driver
7f4da474 TM	4	* based on
	5	*
	6	* SoftDog 0.05: A Software Watchdog Device
	7	*
9a46fc4e	8	* (c) Copyright 2018 Hewlett Packard Enterprise Development LP
ca22e79f	9	* Thomas Mingarelli <thomas.mingarelli@hpe.com>
7f4da474 TM	10	*/
7f4da474 TM	11
27c766aa JP	12	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27c766aa JP	13
7f4da474	14	#include <linux/device.h>
7f4da474	15	#include <linux/io.h>
7f4da474	16	#include <linux/kernel.h>
7f4da474	17	#include <linux/module.h>
7f4da474	18	#include <linux/moduleparam.h>
7f4da474 TM	19	#include <linux/pci.h>
7f4da474 TM	20	#include <linux/pci_ids.h>
7f4da474	21	#include <linux/types.h>
7f4da474	22	#include <linux/watchdog.h>
d48b0e17	23	#include <asm/nmi.h>
acc195bd	24	#include <linux/crash_dump.h>
7f4da474	25
5674b74e	26	#define HPWDT_VERSION "2.0.4"
e802e32d	27	#define SECS_TO_TICKS(secs) ((secs) * 1000 / 128)
6f681c2e	28	#define TICKS_TO_SECS(ticks) ((ticks) * 128 / 1000)
be3d7f7c JH	29	#define HPWDT_MAX_TICKS 65535
be3d7f7c JH	30	#define HPWDT_MAX_TIMER TICKS_TO_SECS(HPWDT_MAX_TICKS)
923410d0	31	#define DEFAULT_MARGIN 30
0458f403	32	#define PRETIMEOUT_SEC 9
923410d0	33
a6c24733	34	static bool ilo5;
923410d0	35	static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
86a1e189	36	static bool nowayout = WATCHDOG_NOWAYOUT;
0458f403	37	static bool pretimeout = IS_ENABLED(CONFIG_HPWDT_NMI_DECODING);
be3d7f7c	38	static int kdumptimeout = -1;
923410d0	39
923410d0	40	static void __iomem pci_mem_addr; / the PCI-memory address */
838534e5	41	static unsigned long __iomem *hpwdt_nmistat;
923410d0	42	static unsigned long __iomem *hpwdt_timer_reg;
	43	static unsigned long __iomem *hpwdt_timer_con;
	44
bc17f9dc	45	static const struct pci_device_id hpwdt_devices[] = {
36e3ff44	46	{ PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) }, /* iLO2 */
36e3ff44	47	{ PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) }, /* iLO3 */
742b80c5	48	{ PCI_DEVICE(PCI_VENDOR_ID_HP_3PAR, 0x0389) }, /* PCtrl */
923410d0	49	{0}, /* terminate list */
	50	};
	51	MODULE_DEVICE_TABLE(pci, hpwdt_devices);
	52
94d6b80c JH	53	static const struct pci_device_id hpwdt_blacklist[] = {
94d6b80c JH	54	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_HP, 0x3306, PCI_VENDOR_ID_HP, 0x1979) }, /* auxilary iLO */
de2cb0cc	55	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_HP, 0x3306, PCI_VENDOR_ID_HP_3PAR, 0x0289) }, /* CL */
94d6b80c JH	56	{0}, /* terminate list */
94d6b80c JH	57	};
7f4da474	58
be3d7f7c	59	static struct watchdog_device hpwdt_dev;
7f4da474 TM	60	/*
	61	* Watchdog operations
	62	*/
bb721d6b JH	63	static int hpwdt_hw_is_running(void)
	64	{
	65	return ioread8(hpwdt_timer_con) & 0x01;
	66	}
	67
d0a4027f	68	static int hpwdt_start(struct watchdog_device *wdd)
7f4da474	69	{
0458f403	70	int control = 0x81 \| (pretimeout ? 0x4 : 0);
c22d8e38	71	int reload = SECS_TO_TICKS(min(wdd->timeout, wdd->max_hw_heartbeat_ms/1000));
d0a4027f	72
c22d8e38	73	dev_dbg(wdd->parent, "start watchdog 0x%08x:0x%08x:0x%02x\n", wdd->timeout, reload, control);
7f4da474	74	iowrite16(reload, hpwdt_timer_reg);
0458f403	75	iowrite8(control, hpwdt_timer_con);
d0a4027f JH	76
d0a4027f JH	77	return 0;
7f4da474 TM	78	}
	79
	80	static void hpwdt_stop(void)
	81	{
	82	unsigned long data;
	83
ccfd6921 JH	84	pr_debug("stop watchdog\n");
ccfd6921 JH	85
d08c9a33	86	data = ioread8(hpwdt_timer_con);
7f4da474	87	data &= 0xFE;
d08c9a33	88	iowrite8(data, hpwdt_timer_con);
7f4da474 TM	89	}
7f4da474 TM	90
d0a4027f	91	static int hpwdt_stop_core(struct watchdog_device *wdd)
7f4da474	92	{
d0a4027f JH	93	hpwdt_stop();
	94
	95	return 0;
7f4da474 TM	96	}
7f4da474 TM	97
be3d7f7c JH	98	static void hpwdt_ping_ticks(int val)
	99	{
	100	val = min(val, HPWDT_MAX_TICKS);
	101	iowrite16(val, hpwdt_timer_reg);
	102	}
	103
d0a4027f	104	static int hpwdt_ping(struct watchdog_device *wdd)
7f4da474	105	{
c22d8e38	106	int reload = SECS_TO_TICKS(min(wdd->timeout, wdd->max_hw_heartbeat_ms/1000));
0458f403	107
c22d8e38	108	dev_dbg(wdd->parent, "ping watchdog 0x%08x:0x%08x\n", wdd->timeout, reload);
be3d7f7c	109	hpwdt_ping_ticks(reload);
0458f403	110
7f4da474 TM	111	return 0;
	112	}
	113
d0a4027f	114	static unsigned int hpwdt_gettimeleft(struct watchdog_device *wdd)
aae67f36	115	{
	116	return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
	117	}
	118
d0a4027f JH	119	static int hpwdt_settimeout(struct watchdog_device *wdd, unsigned int val)
d0a4027f JH	120	{
ccfd6921 JH	121	dev_dbg(wdd->parent, "set_timeout = %d\n", val);
ccfd6921 JH	122
d0a4027f	123	wdd->timeout = val;
0458f403	124	if (val <= wdd->pretimeout) {
ccfd6921	125	dev_dbg(wdd->parent, "pretimeout < timeout. Setting to zero\n");
0458f403	126	wdd->pretimeout = 0;
17f0d1b9	127	pretimeout = false;
0458f403 JH	128	if (watchdog_active(wdd))
	129	hpwdt_start(wdd);
	130	}
d0a4027f JH	131	hpwdt_ping(wdd);
	132
	133	return 0;
	134	}
	135
aeebc6ba	136	#ifdef CONFIG_HPWDT_NMI_DECODING
0458f403 JH	137	static int hpwdt_set_pretimeout(struct watchdog_device *wdd, unsigned int req)
	138	{
	139	unsigned int val = 0;
	140
ccfd6921	141	dev_dbg(wdd->parent, "set_pretimeout = %d\n", req);
0458f403 JH	142	if (req) {
	143	val = PRETIMEOUT_SEC;
	144	if (val >= wdd->timeout)
	145	return -EINVAL;
	146	}
	147
ccfd6921 JH	148	if (val != req)
	149	dev_dbg(wdd->parent, "Rounding pretimeout to: %d\n", val);
	150
0458f403 JH	151	wdd->pretimeout = val;
	152	pretimeout = !!val;
	153
	154	if (watchdog_active(wdd))
	155	hpwdt_start(wdd);
	156
	157	return 0;
	158	}
	159
838534e5 JH	160	static int hpwdt_my_nmi(void)
	161	{
	162	return ioread8(hpwdt_nmistat) & 0x6;
	163	}
	164
ab4ba3cd TM	165	/*
	166	* NMI Handler
	167	*/
9c48f1c6	168	static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs)
ab4ba3cd	169	{
a042229a JH	170	unsigned int mynmi = hpwdt_my_nmi();
	171	static char panic_msg[] =
	172	"00: An NMI occurred. Depending on your system the reason "
	173	"for the NMI is logged in any one of the following resources:\n"
	174	"1. Integrated Management Log (IML)\n"
	175	"2. OA Syslog\n"
	176	"3. OA Forward Progress Log\n"
	177	"4. iLO Event Log";
	178
62290a5c	179	if (ilo5 && ulReason == NMI_UNKNOWN && !mynmi)
838534e5 JH	180	return NMI_DONE;
838534e5 JH	181
093d4385	182	if (ilo5 && !pretimeout && !mynmi)
0458f403 JH	183	return NMI_DONE;
0458f403 JH	184
be3d7f7c JH	185	if (kdumptimeout < 0)
	186	hpwdt_stop();
	187	else if (kdumptimeout == 0)
	188	;
	189	else {
	190	unsigned int val = max((unsigned int)kdumptimeout, hpwdt_dev.timeout);
	191	hpwdt_ping_ticks(SECS_TO_TICKS(val));
	192	}
dbc018ec	193
a042229a JH	194	hex_byte_pack(panic_msg, mynmi);
a042229a JH	195	nmi_panic(regs, panic_msg);
5efc7a62	196
abc514c5	197	return NMI_HANDLED;
ab4ba3cd	198	}
86ded1f3	199	#endif /* CONFIG_HPWDT_NMI_DECODING */
ab4ba3cd	200
7f4da474	201
42747d71	202	static const struct watchdog_info ident = {
0458f403 JH	203	.options = WDIOF_PRETIMEOUT \|
0458f403 JH	204	WDIOF_SETTIMEOUT \|
7f4da474 TM	205	WDIOF_KEEPALIVEPING \|
7f4da474 TM	206	WDIOF_MAGICCLOSE,
ca22e79f	207	.identity = "HPE iLO2+ HW Watchdog Timer",
7f4da474 TM	208	};
7f4da474 TM	209
7f4da474 TM	210	/*
	211	* Kernel interfaces
	212	*/
d0a4027f JH	213
	214	static const struct watchdog_ops hpwdt_ops = {
	215	.owner = THIS_MODULE,
	216	.start = hpwdt_start,
	217	.stop = hpwdt_stop_core,
	218	.ping = hpwdt_ping,
	219	.set_timeout = hpwdt_settimeout,
	220	.get_timeleft = hpwdt_gettimeleft,
0458f403 JH	221	#ifdef CONFIG_HPWDT_NMI_DECODING
	222	.set_pretimeout = hpwdt_set_pretimeout,
	223	#endif
7f4da474 TM	224	};
7f4da474 TM	225
d0a4027f JH	226	static struct watchdog_device hpwdt_dev = {
	227	.info = &ident,
	228	.ops = &hpwdt_ops,
	229	.min_timeout = 1,
d0a4027f	230	.timeout = DEFAULT_MARGIN,
0458f403	231	.pretimeout = PRETIMEOUT_SEC,
c22d8e38	232	.max_hw_heartbeat_ms = HPWDT_MAX_TIMER * 1000,
7f4da474 TM	233	};
7f4da474 TM	234
d0a4027f	235
7f4da474 TM	236	/*
	237	* Init & Exit
	238	*/
	239
2d991a16	240	static int hpwdt_init_nmi_decoding(struct pci_dev *dev)
2ec7ed67	241	{
2b3d89b4	242	#ifdef CONFIG_HPWDT_NMI_DECODING
2ec7ed67	243	int retval;
2ec7ed67	244	/*
09ee1014	245	* Only one function can register for NMI_UNKNOWN
2ec7ed67	246	*/
09ee1014	247	retval = register_nmi_handler(NMI_UNKNOWN, hpwdt_pretimeout, 0, "hpwdt");
553222f3 DZ	248	if (retval)
	249	goto error;
	250	retval = register_nmi_handler(NMI_SERR, hpwdt_pretimeout, 0, "hpwdt");
	251	if (retval)
	252	goto error1;
	253	retval = register_nmi_handler(NMI_IO_CHECK, hpwdt_pretimeout, 0, "hpwdt");
	254	if (retval)
	255	goto error2;
2ec7ed67	256
2ec7ed67	257	dev_info(&dev->dev,
703fc3df JH	258	"HPE Watchdog Timer Driver: NMI decoding initialized\n");
703fc3df JH	259
2ec7ed67	260	return 0;
553222f3 DZ	261
	262	error2:
	263	unregister_nmi_handler(NMI_SERR, "hpwdt");
	264	error1:
	265	unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
	266	error:
	267	dev_warn(&dev->dev,
	268	"Unable to register a die notifier (err=%d).\n",
	269	retval);
553222f3	270	return retval;
2b3d89b4 JH	271	#endif /* CONFIG_HPWDT_NMI_DECODING */
2b3d89b4 JH	272	return 0;
2ec7ed67	273	}
2ec7ed67	274
b77b7088	275	static void hpwdt_exit_nmi_decoding(void)
2ec7ed67	276	{
2b3d89b4	277	#ifdef CONFIG_HPWDT_NMI_DECODING
9c48f1c6	278	unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
a089361c MT	279	unregister_nmi_handler(NMI_SERR, "hpwdt");
a089361c MT	280	unregister_nmi_handler(NMI_IO_CHECK, "hpwdt");
2b3d89b4	281	#endif
86ded1f3	282	}
86ded1f3	283
2d991a16	284	static int hpwdt_init_one(struct pci_dev *dev,
ab4ba3cd	285	const struct pci_device_id *ent)
7f4da474 TM	286	{
	287	int retval;
	288
	289	/*
36e3ff44	290	* First let's find out if we are on an iLO2+ server. We will
7f4da474	291	* not run on a legacy ASM box.
ab4ba3cd	292	* So we only support the G5 ProLiant servers and higher.
7f4da474	293	*/
fc113d54 BB	294	if (dev->subsystem_vendor != PCI_VENDOR_ID_HP &&
fc113d54 BB	295	dev->subsystem_vendor != PCI_VENDOR_ID_HP_3PAR) {
7f4da474	296	dev_warn(&dev->dev,
36e3ff44	297	"This server does not have an iLO2+ ASIC.\n");
7f4da474 TM	298	return -ENODEV;
	299	}
	300
94d6b80c JH	301	if (pci_match_id(hpwdt_blacklist, dev)) {
94d6b80c JH	302	dev_dbg(&dev->dev, "Not supported on this device\n");
0821f20d	303	return -ENODEV;
94d6b80c	304	}
0821f20d	305
7f4da474 TM	306	if (pci_enable_device(dev)) {
	307	dev_warn(&dev->dev,
	308	"Not possible to enable PCI Device: 0x%x:0x%x.\n",
	309	ent->vendor, ent->device);
	310	return -ENODEV;
	311	}
	312
	313	pci_mem_addr = pci_iomap(dev, 1, 0x80);
	314	if (!pci_mem_addr) {
	315	dev_warn(&dev->dev,
36e3ff44	316	"Unable to detect the iLO2+ server memory.\n");
7f4da474 TM	317	retval = -ENOMEM;
	318	goto error_pci_iomap;
	319	}
838534e5	320	hpwdt_nmistat = pci_mem_addr + 0x6e;
7f4da474 TM	321	hpwdt_timer_reg = pci_mem_addr + 0x70;
	322	hpwdt_timer_con = pci_mem_addr + 0x72;
	323
bb721d6b JH	324	/* Have the core update running timer until user space is ready */
	325	if (hpwdt_hw_is_running()) {
	326	dev_info(&dev->dev, "timer is running\n");
	327	set_bit(WDOG_HW_RUNNING, &hpwdt_dev.status);
	328	}
308b135e	329
2ec7ed67	330	/* Initialize NMI Decoding functionality */
	331	retval = hpwdt_init_nmi_decoding(dev);
	332	if (retval != 0)
	333	goto error_init_nmi_decoding;
7f4da474	334
48b32199	335	watchdog_stop_on_unregister(&hpwdt_dev);
d0a4027f	336	watchdog_set_nowayout(&hpwdt_dev, nowayout);
87dfe210	337	watchdog_init_timeout(&hpwdt_dev, soft_margin, NULL);
d0a4027f	338
acc195bd	339	if (is_kdump_kernel()) {
17f0d1b9	340	pretimeout = false;
acc195bd JH	341	kdumptimeout = 0;
	342	}
	343
10d790d1 JH	344	if (pretimeout && hpwdt_dev.timeout <= PRETIMEOUT_SEC) {
10d790d1 JH	345	dev_warn(&dev->dev, "timeout <= pretimeout. Setting pretimeout to zero\n");
17f0d1b9	346	pretimeout = false;
10d790d1	347	}
4d9186d0	348	hpwdt_dev.pretimeout = pretimeout ? PRETIMEOUT_SEC : 0;
be3d7f7c	349	kdumptimeout = min(kdumptimeout, HPWDT_MAX_TIMER);
4d9186d0	350
d0a4027f JH	351	hpwdt_dev.parent = &dev->dev;
d0a4027f JH	352	retval = watchdog_register_device(&hpwdt_dev);
f51540b8	353	if (retval < 0)
d0a4027f	354	goto error_wd_register;
7f4da474	355
92301461 JH	356	dev_info(&dev->dev, "HPE Watchdog Timer Driver: Version: %s\n",
	357	HPWDT_VERSION);
	358	dev_info(&dev->dev, "timeout: %d seconds (nowayout=%d)\n",
	359	hpwdt_dev.timeout, nowayout);
	360	dev_info(&dev->dev, "pretimeout: %s.\n",
	361	pretimeout ? "on" : "off");
be3d7f7c	362	dev_info(&dev->dev, "kdumptimeout: %d.\n", kdumptimeout);
d0a4027f	363
a6c24733 JH	364	if (dev->subsystem_vendor == PCI_VENDOR_ID_HP_3PAR)
	365	ilo5 = true;
	366
7f4da474 TM	367	return 0;
7f4da474 TM	368
d0a4027f	369	error_wd_register:
2ec7ed67	370	hpwdt_exit_nmi_decoding();
2ec7ed67	371	error_init_nmi_decoding:
7f4da474 TM	372	pci_iounmap(dev, pci_mem_addr);
	373	error_pci_iomap:
	374	pci_disable_device(dev);
	375	return retval;
	376	}
	377
4b12b896	378	static void hpwdt_exit(struct pci_dev *dev)
7f4da474	379	{
d0a4027f	380	watchdog_unregister_device(&hpwdt_dev);
2ec7ed67	381	hpwdt_exit_nmi_decoding();
7f4da474 TM	382	pci_iounmap(dev, pci_mem_addr);
	383	pci_disable_device(dev);
	384	}
	385
	386	static struct pci_driver hpwdt_driver = {
	387	.name = "hpwdt",
	388	.id_table = hpwdt_devices,
	389	.probe = hpwdt_init_one,
82268714	390	.remove = hpwdt_exit,
7f4da474 TM	391	};
7f4da474 TM	392
7f4da474	393	MODULE_AUTHOR("Tom Mingarelli");
9a46fc4e	394	MODULE_DESCRIPTION("hpe watchdog driver");
7f4da474	395	MODULE_LICENSE("GPL");
d8100c3a	396	MODULE_VERSION(HPWDT_VERSION);
7f4da474 TM	397
	398	module_param(soft_margin, int, 0);
	399	MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
	400
397a35d4 JH	401	module_param_named(timeout, soft_margin, int, 0);
	402	MODULE_PARM_DESC(timeout, "Alias of soft_margin");
	403
86a1e189	404	module_param(nowayout, bool, 0);
7f4da474 TM	405	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
	406	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	407
be3d7f7c JH	408	module_param(kdumptimeout, int, 0444);
	409	MODULE_PARM_DESC(kdumptimeout, "Timeout applied for crash kernel transition in seconds");
	410
0458f403 JH	411	#ifdef CONFIG_HPWDT_NMI_DECODING
	412	module_param(pretimeout, bool, 0);
	413	MODULE_PARM_DESC(pretimeout, "Watchdog pretimeout enabled");
	414	#endif
	415
5ce9c371	416	module_pci_driver(hpwdt_driver);