[linux-block.git] / drivers / watchdog / hpwdt.c

/*
 *	HP WatchDog Driver
 *	based on
 *
 *	SoftDog	0.05:	A Software Watchdog Device
 *
 *	(c) Copyright 2007 Hewlett-Packard Development Company, L.P.
 *	Thomas Mingarelli <thomas.mingarelli@hp.com>
 *
 *	This program is free software; you can redistribute it and/or
 *	modify it under the terms of the GNU General Public License
 *	version 2 as published by the Free Software Foundation
 *
 */

#include <linux/device.h>
#include <linux/fs.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/miscdevice.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/kdebug.h>
#include <linux/moduleparam.h>
#include <linux/notifier.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
#include <linux/reboot.h>
#include <linux/sched.h>
#include <linux/timer.h>
#include <linux/types.h>
#include <linux/uaccess.h>
#include <linux/watchdog.h>
#include <linux/dmi.h>
#include <linux/efi.h>
#include <linux/string.h>
#include <linux/bootmem.h>
#include <linux/slab.h>
#include <asm/desc.h>
#include <asm/cacheflush.h>

#define PCI_BIOS32_SD_VALUE		0x5F32335F	/* "_32_" */
#define CRU_BIOS_SIGNATURE_VALUE	0x55524324
#define PCI_BIOS32_PARAGRAPH_LEN	16
#define PCI_ROM_BASE1			0x000F0000
#define ROM_SIZE			0x10000
#define HPWDT_VERSION			"1.01"

struct bios32_service_dir {
	u32 signature;
	u32 entry_point;
	u8 revision;
	u8 length;
	u8 checksum;
	u8 reserved[5];
};

/* type 212 */
struct smbios_cru64_info {
	u8 type;
	u8 byte_length;
	u16 handle;
	u32 signature;
	u64 physical_address;
	u32 double_length;
	u32 double_offset;
};
#define SMBIOS_CRU64_INFORMATION	212

struct cmn_registers {
	union {
		struct {
			u8 ral;
			u8 rah;
			u16 rea2;
		};
		u32 reax;
	} u1;
	union {
		struct {
			u8 rbl;
			u8 rbh;
			u8 reb2l;
			u8 reb2h;
		};
		u32 rebx;
	} u2;
	union {
		struct {
			u8 rcl;
			u8 rch;
			u16 rec2;
		};
		u32 recx;
	} u3;
	union {
		struct {
			u8 rdl;
			u8 rdh;
			u16 red2;
		};
		u32 redx;
	} u4;

	u32 resi;
	u32 redi;
	u16 rds;
	u16 res;
	u32 reflags;
}  __attribute__((packed));

#define DEFAULT_MARGIN	30
static unsigned int soft_margin = DEFAULT_MARGIN;	/* in seconds */
static unsigned int reload;			/* the computed soft_margin */
static int nowayout = WATCHDOG_NOWAYOUT;
static char expect_release;
static unsigned long hpwdt_is_open;
static unsigned int allow_kdump;

static void __iomem *pci_mem_addr;		/* the PCI-memory address */
static unsigned long __iomem *hpwdt_timer_reg;
static unsigned long __iomem *hpwdt_timer_con;

static DEFINE_SPINLOCK(rom_lock);

static void *cru_rom_addr;

static struct cmn_registers cmn_regs;

static struct pci_device_id hpwdt_devices[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) },
	{ PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) },
	{0},			/* terminate list */
};
MODULE_DEVICE_TABLE(pci, hpwdt_devices);

extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
						unsigned long *pRomEntry);

#ifndef CONFIG_X86_64
/* --32 Bit Bios------------------------------------------------------------ */

#define HPWDT_ARCH	32

asm(".text                          \n\t"
    ".align 4                       \n"
    "asminline_call:                \n\t"
    "pushl       %ebp               \n\t"
    "movl        %esp, %ebp         \n\t"
    "pusha                          \n\t"
    "pushf                          \n\t"
    "push        %es                \n\t"
    "push        %ds                \n\t"
    "pop         %es                \n\t"
    "movl        8(%ebp),%eax       \n\t"
    "movl        4(%eax),%ebx       \n\t"
    "movl        8(%eax),%ecx       \n\t"
    "movl        12(%eax),%edx      \n\t"
    "movl        16(%eax),%esi      \n\t"
    "movl        20(%eax),%edi      \n\t"
    "movl        (%eax),%eax        \n\t"
    "push        %cs                \n\t"
    "call        *12(%ebp)          \n\t"
    "pushf                          \n\t"
    "pushl       %eax               \n\t"
    "movl        8(%ebp),%eax       \n\t"
    "movl        %ebx,4(%eax)       \n\t"
    "movl        %ecx,8(%eax)       \n\t"
    "movl        %edx,12(%eax)      \n\t"
    "movl        %esi,16(%eax)      \n\t"
    "movl        %edi,20(%eax)      \n\t"
    "movw        %ds,24(%eax)       \n\t"
    "movw        %es,26(%eax)       \n\t"
    "popl        %ebx               \n\t"
    "movl        %ebx,(%eax)        \n\t"
    "popl        %ebx               \n\t"
    "movl        %ebx,28(%eax)      \n\t"
    "pop         %es                \n\t"
    "popf                           \n\t"
    "popa                           \n\t"
    "leave                          \n\t"
    "ret                            \n\t"
    ".previous");


/*
 *	cru_detect
 *
 *	Routine Description:
 *	This function uses the 32-bit BIOS Service Directory record to
 *	search for a $CRU record.
 *
 *	Return Value:
 *	0        :  SUCCESS
 *	<0       :  FAILURE
 */
static int __devinit cru_detect(unsigned long map_entry,
	unsigned long map_offset)
{
	void *bios32_map;
	unsigned long *bios32_entrypoint;
	unsigned long cru_physical_address;
	unsigned long cru_length;
	unsigned long physical_bios_base = 0;
	unsigned long physical_bios_offset = 0;
	int retval = -ENODEV;

	bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));

	if (bios32_map == NULL)
		return -ENODEV;

	bios32_entrypoint = bios32_map + map_offset;

	cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;

	asminline_call(&cmn_regs, bios32_entrypoint);

	if (cmn_regs.u1.ral != 0) {
		printk(KERN_WARNING
			"hpwdt: Call succeeded but with an error: 0x%x\n",
			cmn_regs.u1.ral);
	} else {
		physical_bios_base = cmn_regs.u2.rebx;
		physical_bios_offset = cmn_regs.u4.redx;
		cru_length = cmn_regs.u3.recx;
		cru_physical_address =
			physical_bios_base + physical_bios_offset;

		/* If the values look OK, then map it in. */
		if ((physical_bios_base + physical_bios_offset)) {
			cru_rom_addr =
				ioremap(cru_physical_address, cru_length);
			if (cru_rom_addr)
				retval = 0;
		}

		printk(KERN_DEBUG "hpwdt: CRU Base Address:   0x%lx\n",
			physical_bios_base);
		printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
			physical_bios_offset);
		printk(KERN_DEBUG "hpwdt: CRU Length:         0x%lx\n",
			cru_length);
		printk(KERN_DEBUG "hpwdt: CRU Mapped Address: 0x%x\n",
			(unsigned int)&cru_rom_addr);
	}
	iounmap(bios32_map);
	return retval;
}

/*
 *	bios_checksum
 */
static int __devinit bios_checksum(const char __iomem *ptr, int len)
{
	char sum = 0;
	int i;

	/*
	 * calculate checksum of size bytes. This should add up
	 * to zero if we have a valid header.
	 */
	for (i = 0; i < len; i++)
		sum += ptr[i];

	return ((sum == 0) && (len > 0));
}

/*
 *	bios32_present
 *
 *	Routine Description:
 *	This function finds the 32-bit BIOS Service Directory
 *
 *	Return Value:
 *	0        :  SUCCESS
 *	<0       :  FAILURE
 */
static int __devinit bios32_present(const char __iomem *p)
{
	struct bios32_service_dir *bios_32_ptr;
	int length;
	unsigned long map_entry, map_offset;

	bios_32_ptr = (struct bios32_service_dir *) p;

	/*
	 * Search for signature by checking equal to the swizzled value
	 * instead of calling another routine to perform a strcmp.
	 */
	if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
		length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
		if (bios_checksum(p, length)) {
			/*
			 * According to the spec, we're looking for the
			 * first 4KB-aligned address below the entrypoint
			 * listed in the header. The Service Directory code
			 * is guaranteed to occupy no more than 2 4KB pages.
			 */
			map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
			map_offset = bios_32_ptr->entry_point - map_entry;

			return cru_detect(map_entry, map_offset);
		}
	}
	return -ENODEV;
}

static int __devinit detect_cru_service(void)
{
	char __iomem *p, *q;
	int rc = -1;

	/*
	 * Search from 0x0f0000 through 0x0fffff, inclusive.
	 */
	p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
	if (p == NULL)
		return -ENOMEM;

	for (q = p; q < p + ROM_SIZE; q += 16) {
		rc = bios32_present(q);
		if (!rc)
			break;
	}
	iounmap(p);
	return rc;
}

#else
/* --64 Bit Bios------------------------------------------------------------ */

#define HPWDT_ARCH	64

asm(".text                      \n\t"
    ".align 4                   \n"
    "asminline_call:            \n\t"
    "pushq      %rbp            \n\t"
    "movq       %rsp, %rbp      \n\t"
    "pushq      %rax            \n\t"
    "pushq      %rbx            \n\t"
    "pushq      %rdx            \n\t"
    "pushq      %r12            \n\t"
    "pushq      %r9             \n\t"
    "movq       %rsi, %r12      \n\t"
    "movq       %rdi, %r9       \n\t"
    "movl       4(%r9),%ebx     \n\t"
    "movl       8(%r9),%ecx     \n\t"
    "movl       12(%r9),%edx    \n\t"
    "movl       16(%r9),%esi    \n\t"
    "movl       20(%r9),%edi    \n\t"
    "movl       (%r9),%eax      \n\t"
    "call       *%r12           \n\t"
    "pushfq                     \n\t"
    "popq        %r12           \n\t"
    "movl       %eax, (%r9)     \n\t"
    "movl       %ebx, 4(%r9)    \n\t"
    "movl       %ecx, 8(%r9)    \n\t"
    "movl       %edx, 12(%r9)   \n\t"
    "movl       %esi, 16(%r9)   \n\t"
    "movl       %edi, 20(%r9)   \n\t"
    "movq       %r12, %rax      \n\t"
    "movl       %eax, 28(%r9)   \n\t"
    "popq       %r9             \n\t"
    "popq       %r12            \n\t"
    "popq       %rdx            \n\t"
    "popq       %rbx            \n\t"
    "popq       %rax            \n\t"
    "leave                      \n\t"
    "ret                        \n\t"
    ".previous");

/*
 *	dmi_find_cru
 *
 *	Routine Description:
 *	This function checks whether or not a SMBIOS/DMI record is
 *	the 64bit CRU info or not
 */
static void __devinit dmi_find_cru(const struct dmi_header *dm)
{
	struct smbios_cru64_info *smbios_cru64_ptr;
	unsigned long cru_physical_address;

	if (dm->type == SMBIOS_CRU64_INFORMATION) {
		smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
		if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
			cru_physical_address =
				smbios_cru64_ptr->physical_address +
				smbios_cru64_ptr->double_offset;
			cru_rom_addr = ioremap(cru_physical_address,
				smbios_cru64_ptr->double_length);
			set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
				smbios_cru64_ptr->double_length >> PAGE_SHIFT);
		}
	}
}

static int __devinit detect_cru_service(void)
{
	cru_rom_addr = NULL;

	dmi_walk(dmi_find_cru);

	/* if cru_rom_addr has been set then we found a CRU service */
	return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
}

/* ------------------------------------------------------------------------- */

#endif

/*
 *	Watchdog operations
 */
static void hpwdt_start(void)
{
	reload = (soft_margin * 1000) / 128;
	iowrite16(reload, hpwdt_timer_reg);
	iowrite16(0x85, hpwdt_timer_con);
}

static void hpwdt_stop(void)
{
	unsigned long data;

	data = ioread16(hpwdt_timer_con);
	data &= 0xFE;
	iowrite16(data, hpwdt_timer_con);
}

static void hpwdt_ping(void)
{
	iowrite16(reload, hpwdt_timer_reg);
}

static int hpwdt_change_timer(int new_margin)
{
	/* Arbitrary, can't find the card's limits */
	if (new_margin < 30 || new_margin > 600) {
		printk(KERN_WARNING
			"hpwdt: New value passed in is invalid: %d seconds.\n",
			new_margin);
		return -EINVAL;
	}

	soft_margin = new_margin;
	printk(KERN_DEBUG
		"hpwdt: New timer passed in is %d seconds.\n",
		new_margin);
	reload = (soft_margin * 1000) / 128;

	return 0;
}

/*
 *	NMI Handler
 */
static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
				void *data)
{
	unsigned long rom_pl;
	static int die_nmi_called;

	if (ulReason != DIE_NMI && ulReason != DIE_NMI_IPI)
		return NOTIFY_OK;

	spin_lock_irqsave(&rom_lock, rom_pl);
	if (!die_nmi_called)
		asminline_call(&cmn_regs, cru_rom_addr);
	die_nmi_called = 1;
	spin_unlock_irqrestore(&rom_lock, rom_pl);
	if (cmn_regs.u1.ral == 0) {
		printk(KERN_WARNING "hpwdt: An NMI occurred, "
			"but unable to determine source.\n");
	} else {
		if (allow_kdump)
			hpwdt_stop();
		panic("An NMI occurred, please see the Integrated "
			"Management Log for details.\n");
	}

	return NOTIFY_OK;
}

/*
 *	/dev/watchdog handling
 */
static int hpwdt_open(struct inode *inode, struct file *file)
{
	/* /dev/watchdog can only be opened once */
	if (test_and_set_bit(0, &hpwdt_is_open))
		return -EBUSY;

	/* Start the watchdog */
	hpwdt_start();
	hpwdt_ping();

	return nonseekable_open(inode, file);
}

static int hpwdt_release(struct inode *inode, struct file *file)
{
	/* Stop the watchdog */
	if (expect_release == 42) {
		hpwdt_stop();
	} else {
		printk(KERN_CRIT
			"hpwdt: Unexpected close, not stopping watchdog!\n");
		hpwdt_ping();
	}

	expect_release = 0;

	/* /dev/watchdog is being closed, make sure it can be re-opened */
	clear_bit(0, &hpwdt_is_open);

	return 0;
}

static ssize_t hpwdt_write(struct file *file, const char __user *data,
	size_t len, loff_t *ppos)
{
	/* See if we got the magic character 'V' and reload the timer */
	if (len) {
		if (!nowayout) {
			size_t i;

			/* note: just in case someone wrote the magic character
			 * five months ago... */
			expect_release = 0;

			/* scan to see whether or not we got the magic char. */
			for (i = 0; i != len; i++) {
				char c;
				if (get_user(c, data + i))
					return -EFAULT;
				if (c == 'V')
					expect_release = 42;
			}
		}

		/* someone wrote to us, we should reload the timer */
		hpwdt_ping();
	}

	return len;
}

static struct watchdog_info ident = {
	.options = WDIOF_SETTIMEOUT |
		   WDIOF_KEEPALIVEPING |
		   WDIOF_MAGICCLOSE,
	.identity = "HP iLO2 HW Watchdog Timer",
};

static long hpwdt_ioctl(struct file *file, unsigned int cmd,
	unsigned long arg)
{
	void __user *argp = (void __user *)arg;
	int __user *p = argp;
	int new_margin;
	int ret = -ENOTTY;

	switch (cmd) {
	case WDIOC_GETSUPPORT:
		ret = 0;
		if (copy_to_user(argp, &ident, sizeof(ident)))
			ret = -EFAULT;
		break;

	case WDIOC_GETSTATUS:
	case WDIOC_GETBOOTSTATUS:
		ret = put_user(0, p);
		break;

	case WDIOC_KEEPALIVE:
		hpwdt_ping();
		ret = 0;
		break;

	case WDIOC_SETTIMEOUT:
		ret = get_user(new_margin, p);
		if (ret)
			break;

		ret = hpwdt_change_timer(new_margin);
		if (ret)
			break;

		hpwdt_ping();
		/* Fall */
	case WDIOC_GETTIMEOUT:
		ret = put_user(soft_margin, p);
		break;
	}
	return ret;
}

/*
 *	Kernel interfaces
 */
static const struct file_operations hpwdt_fops = {
	.owner = THIS_MODULE,
	.llseek = no_llseek,
	.write = hpwdt_write,
	.unlocked_ioctl = hpwdt_ioctl,
	.open = hpwdt_open,
	.release = hpwdt_release,
};

static struct miscdevice hpwdt_miscdev = {
	.minor = WATCHDOG_MINOR,
	.name = "watchdog",
	.fops = &hpwdt_fops,
};

static struct notifier_block die_notifier = {
	.notifier_call = hpwdt_pretimeout,
	.priority = 0x7FFFFFFF,
};

/*
 *	Init & Exit
 */

static int __devinit hpwdt_init_one(struct pci_dev *dev,
					const struct pci_device_id *ent)
{
	int retval;

	/*
	 * First let's find out if we are on an iLO2 server. We will
	 * not run on a legacy ASM box.
	 * So we only support the G5 ProLiant servers and higher.
	 */
	if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
		dev_warn(&dev->dev,
			"This server does not have an iLO2 ASIC.\n");
		return -ENODEV;
	}

	if (pci_enable_device(dev)) {
		dev_warn(&dev->dev,
			"Not possible to enable PCI Device: 0x%x:0x%x.\n",
			ent->vendor, ent->device);
		return -ENODEV;
	}

	pci_mem_addr = pci_iomap(dev, 1, 0x80);
	if (!pci_mem_addr) {
		dev_warn(&dev->dev,
			"Unable to detect the iLO2 server memory.\n");
		retval = -ENOMEM;
		goto error_pci_iomap;
	}
	hpwdt_timer_reg = pci_mem_addr + 0x70;
	hpwdt_timer_con = pci_mem_addr + 0x72;

	/* Make sure that we have a valid soft_margin */
	if (hpwdt_change_timer(soft_margin))
		hpwdt_change_timer(DEFAULT_MARGIN);

	/*
	 * We need to map the ROM to get the CRU service.
	 * For 32 bit Operating Systems we need to go through the 32 Bit
	 * BIOS Service Directory
	 * For 64 bit Operating Systems we get that service through SMBIOS.
	 */
	retval = detect_cru_service();
	if (retval < 0) {
		dev_warn(&dev->dev,
			"Unable to detect the %d Bit CRU Service.\n",
			HPWDT_ARCH);
		goto error_get_cru;
	}

	/*
	 * We know this is the only CRU call we need to make so lets keep as
	 * few instructions as possible once the NMI comes in.
	 */
	cmn_regs.u1.rah = 0x0D;
	cmn_regs.u1.ral = 0x02;

	retval = register_die_notifier(&die_notifier);
	if (retval != 0) {
		dev_warn(&dev->dev,
			"Unable to register a die notifier (err=%d).\n",
			retval);
		goto error_die_notifier;
	}

	retval = misc_register(&hpwdt_miscdev);
	if (retval < 0) {
		dev_warn(&dev->dev,
			"Unable to register miscdev on minor=%d (err=%d).\n",
			WATCHDOG_MINOR, retval);
		goto error_misc_register;
	}

	printk(KERN_INFO
		"hp Watchdog Timer Driver: %s"
		", timer margin: %d seconds (nowayout=%d)"
		", allow kernel dump: %s (default = 0/OFF).\n",
		HPWDT_VERSION, soft_margin, nowayout,
		(allow_kdump == 0) ? "OFF" : "ON");

	return 0;

error_misc_register:
	unregister_die_notifier(&die_notifier);
error_die_notifier:
	if (cru_rom_addr)
		iounmap(cru_rom_addr);
error_get_cru:
	pci_iounmap(dev, pci_mem_addr);
error_pci_iomap:
	pci_disable_device(dev);
	return retval;
}

static void __devexit hpwdt_exit(struct pci_dev *dev)
{
	if (!nowayout)
		hpwdt_stop();

	misc_deregister(&hpwdt_miscdev);
	unregister_die_notifier(&die_notifier);

	if (cru_rom_addr)
		iounmap(cru_rom_addr);
	pci_iounmap(dev, pci_mem_addr);
	pci_disable_device(dev);
}

static struct pci_driver hpwdt_driver = {
	.name = "hpwdt",
	.id_table = hpwdt_devices,
	.probe = hpwdt_init_one,
	.remove = __devexit_p(hpwdt_exit),
};

static void __exit hpwdt_cleanup(void)
{
	pci_unregister_driver(&hpwdt_driver);
}

static int __init hpwdt_init(void)
{
	return pci_register_driver(&hpwdt_driver);
}

MODULE_AUTHOR("Tom Mingarelli");
MODULE_DESCRIPTION("hp watchdog driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(HPWDT_VERSION);
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);

module_param(soft_margin, int, 0);
MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");

module_param(allow_kdump, int, 0);
MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");

module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
		__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

module_init(hpwdt_init);
module_exit(hpwdt_cleanup);
Commit	Line	Data
7f4da474 TM	1	/*
	2	* HP WatchDog Driver
	3	* based on
	4	*
	5	* SoftDog 0.05: A Software Watchdog Device
	6	*
	7	* (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
	8	* Thomas Mingarelli <thomas.mingarelli@hp.com>
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License
	12	* version 2 as published by the Free Software Foundation
	13	*
	14	*/
	15
	16	#include <linux/device.h>
	17	#include <linux/fs.h>
	18	#include <linux/init.h>
	19	#include <linux/interrupt.h>
	20	#include <linux/io.h>
	21	#include <linux/irq.h>
	22	#include <linux/kernel.h>
	23	#include <linux/miscdevice.h>
	24	#include <linux/mm.h>
	25	#include <linux/module.h>
	26	#include <linux/kdebug.h>
	27	#include <linux/moduleparam.h>
	28	#include <linux/notifier.h>
	29	#include <linux/pci.h>
	30	#include <linux/pci_ids.h>
	31	#include <linux/reboot.h>
	32	#include <linux/sched.h>
	33	#include <linux/timer.h>
	34	#include <linux/types.h>
	35	#include <linux/uaccess.h>
	36	#include <linux/watchdog.h>
	37	#include <linux/dmi.h>
	38	#include <linux/efi.h>
	39	#include <linux/string.h>
	40	#include <linux/bootmem.h>
	41	#include <linux/slab.h>
7f4da474	42	#include <asm/desc.h>
06026413	43	#include <asm/cacheflush.h>
7f4da474 TM	44
	45	#define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
	46	#define CRU_BIOS_SIGNATURE_VALUE 0x55524324
	47	#define PCI_BIOS32_PARAGRAPH_LEN 16
	48	#define PCI_ROM_BASE1 0x000F0000
	49	#define ROM_SIZE 0x10000
d8100c3a	50	#define HPWDT_VERSION "1.01"
7f4da474 TM	51
	52	struct bios32_service_dir {
	53	u32 signature;
	54	u32 entry_point;
	55	u8 revision;
	56	u8 length;
	57	u8 checksum;
	58	u8 reserved[5];
	59	};
	60
7f4da474 TM	61	/* type 212 */
	62	struct smbios_cru64_info {
	63	u8 type;
	64	u8 byte_length;
	65	u16 handle;
	66	u32 signature;
	67	u64 physical_address;
	68	u32 double_length;
	69	u32 double_offset;
	70	};
	71	#define SMBIOS_CRU64_INFORMATION 212
	72
	73	struct cmn_registers {
	74	union {
	75	struct {
	76	u8 ral;
	77	u8 rah;
	78	u16 rea2;
	79	};
	80	u32 reax;
	81	} u1;
	82	union {
	83	struct {
	84	u8 rbl;
	85	u8 rbh;
	86	u8 reb2l;
	87	u8 reb2h;
	88	};
	89	u32 rebx;
	90	} u2;
	91	union {
	92	struct {
	93	u8 rcl;
	94	u8 rch;
	95	u16 rec2;
	96	};
	97	u32 recx;
	98	} u3;
	99	union {
	100	struct {
	101	u8 rdl;
	102	u8 rdh;
	103	u16 red2;
	104	};
	105	u32 redx;
	106	} u4;
	107
	108	u32 resi;
	109	u32 redi;
	110	u16 rds;
	111	u16 res;
	112	u32 reflags;
	113	} __attribute__((packed));
	114
	115	#define DEFAULT_MARGIN 30
	116	static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
	117	static unsigned int reload; /* the computed soft_margin */
	118	static int nowayout = WATCHDOG_NOWAYOUT;
	119	static char expect_release;
	120	static unsigned long hpwdt_is_open;
ab4ba3cd	121	static unsigned int allow_kdump;
7f4da474 TM	122
	123	static void __iomem pci_mem_addr; / the PCI-memory address */
	124	static unsigned long __iomem *hpwdt_timer_reg;
	125	static unsigned long __iomem *hpwdt_timer_con;
	126
	127	static DEFINE_SPINLOCK(rom_lock);
	128
	129	static void *cru_rom_addr;
	130
	131	static struct cmn_registers cmn_regs;
	132
	133	static struct pci_device_id hpwdt_devices[] = {
d8100c3a TM	134	{ PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) },
d8100c3a TM	135	{ PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) },
7f4da474 TM	136	{0}, /* terminate list */
	137	};
	138	MODULE_DEVICE_TABLE(pci, hpwdt_devices);
	139
143a2e54 WVS	140	extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
143a2e54 WVS	141	unsigned long *pRomEntry);
1f6ef234	142
7f4da474 TM	143	#ifndef CONFIG_X86_64
	144	/* --32 Bit Bios------------------------------------------------------------ */
	145
	146	#define HPWDT_ARCH 32
	147
1f6ef234 LT	148	asm(".text \n\t"
	149	".align 4 \n"
	150	"asminline_call: \n\t"
	151	"pushl %ebp \n\t"
	152	"movl %esp, %ebp \n\t"
	153	"pusha \n\t"
	154	"pushf \n\t"
	155	"push %es \n\t"
	156	"push %ds \n\t"
	157	"pop %es \n\t"
	158	"movl 8(%ebp),%eax \n\t"
	159	"movl 4(%eax),%ebx \n\t"
	160	"movl 8(%eax),%ecx \n\t"
	161	"movl 12(%eax),%edx \n\t"
	162	"movl 16(%eax),%esi \n\t"
	163	"movl 20(%eax),%edi \n\t"
	164	"movl (%eax),%eax \n\t"
	165	"push %cs \n\t"
	166	"call *12(%ebp) \n\t"
	167	"pushf \n\t"
	168	"pushl %eax \n\t"
	169	"movl 8(%ebp),%eax \n\t"
	170	"movl %ebx,4(%eax) \n\t"
	171	"movl %ecx,8(%eax) \n\t"
	172	"movl %edx,12(%eax) \n\t"
	173	"movl %esi,16(%eax) \n\t"
	174	"movl %edi,20(%eax) \n\t"
	175	"movw %ds,24(%eax) \n\t"
	176	"movw %es,26(%eax) \n\t"
	177	"popl %ebx \n\t"
	178	"movl %ebx,(%eax) \n\t"
	179	"popl %ebx \n\t"
	180	"movl %ebx,28(%eax) \n\t"
	181	"pop %es \n\t"
	182	"popf \n\t"
	183	"popa \n\t"
	184	"leave \n\t"
	185	"ret \n\t"
	186	".previous");
	187
7f4da474 TM	188
	189	/*
	190	* cru_detect
	191	*
	192	* Routine Description:
	193	* This function uses the 32-bit BIOS Service Directory record to
	194	* search for a $CRU record.
	195	*
	196	* Return Value:
	197	* 0 : SUCCESS
	198	* <0 : FAILURE
	199	*/
	200	static int __devinit cru_detect(unsigned long map_entry,
	201	unsigned long map_offset)
	202	{
	203	void *bios32_map;
	204	unsigned long *bios32_entrypoint;
	205	unsigned long cru_physical_address;
	206	unsigned long cru_length;
	207	unsigned long physical_bios_base = 0;
	208	unsigned long physical_bios_offset = 0;
	209	int retval = -ENODEV;
	210
	211	bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
	212
	213	if (bios32_map == NULL)
	214	return -ENODEV;
	215
	216	bios32_entrypoint = bios32_map + map_offset;
	217
	218	cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
	219
	220	asminline_call(&cmn_regs, bios32_entrypoint);
	221
	222	if (cmn_regs.u1.ral != 0) {
	223	printk(KERN_WARNING
ab4ba3cd TM	224	"hpwdt: Call succeeded but with an error: 0x%x\n",
ab4ba3cd TM	225	cmn_regs.u1.ral);
7f4da474 TM	226	} else {
	227	physical_bios_base = cmn_regs.u2.rebx;
	228	physical_bios_offset = cmn_regs.u4.redx;
	229	cru_length = cmn_regs.u3.recx;
	230	cru_physical_address =
ab4ba3cd	231	physical_bios_base + physical_bios_offset;
7f4da474 TM	232
	233	/* If the values look OK, then map it in. */
	234	if ((physical_bios_base + physical_bios_offset)) {
	235	cru_rom_addr =
ab4ba3cd	236	ioremap(cru_physical_address, cru_length);
7f4da474 TM	237	if (cru_rom_addr)
	238	retval = 0;
	239	}
	240
	241	printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n",
	242	physical_bios_base);
	243	printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
	244	physical_bios_offset);
	245	printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n",
	246	cru_length);
	247	printk(KERN_DEBUG "hpwdt: CRU Mapped Address: 0x%x\n",
	248	(unsigned int)&cru_rom_addr);
	249	}
	250	iounmap(bios32_map);
	251	return retval;
	252	}
	253
30ec910e RD	254	/*
	255	* bios_checksum
	256	*/
	257	static int __devinit bios_checksum(const char __iomem *ptr, int len)
	258	{
	259	char sum = 0;
	260	int i;
	261
	262	/*
	263	* calculate checksum of size bytes. This should add up
	264	* to zero if we have a valid header.
	265	*/
	266	for (i = 0; i < len; i++)
	267	sum += ptr[i];
	268
	269	return ((sum == 0) && (len > 0));
	270	}
	271
7f4da474 TM	272	/*
	273	* bios32_present
	274	*
	275	* Routine Description:
	276	* This function finds the 32-bit BIOS Service Directory
	277	*
	278	* Return Value:
	279	* 0 : SUCCESS
	280	* <0 : FAILURE
	281	*/
	282	static int __devinit bios32_present(const char __iomem *p)
	283	{
	284	struct bios32_service_dir *bios_32_ptr;
	285	int length;
	286	unsigned long map_entry, map_offset;
	287
	288	bios_32_ptr = (struct bios32_service_dir *) p;
	289
	290	/*
	291	* Search for signature by checking equal to the swizzled value
	292	* instead of calling another routine to perform a strcmp.
	293	*/
	294	if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
	295	length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
	296	if (bios_checksum(p, length)) {
	297	/*
	298	* According to the spec, we're looking for the
	299	* first 4KB-aligned address below the entrypoint
	300	* listed in the header. The Service Directory code
	301	* is guaranteed to occupy no more than 2 4KB pages.
	302	*/
	303	map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
	304	map_offset = bios_32_ptr->entry_point - map_entry;
	305
	306	return cru_detect(map_entry, map_offset);
	307	}
	308	}
	309	return -ENODEV;
	310	}
	311
	312	static int __devinit detect_cru_service(void)
	313	{
	314	char __iomem p, q;
	315	int rc = -1;
	316
	317	/*
	318	* Search from 0x0f0000 through 0x0fffff, inclusive.
	319	*/
	320	p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
	321	if (p == NULL)
	322	return -ENOMEM;
	323
	324	for (q = p; q < p + ROM_SIZE; q += 16) {
	325	rc = bios32_present(q);
	326	if (!rc)
	327	break;
	328	}
	329	iounmap(p);
	330	return rc;
	331	}
	332
	333	#else
	334	/* --64 Bit Bios------------------------------------------------------------ */
	335
336	#define HPWDT_ARCH 64
337
1f6ef234 LT	338	asm(".text \n\t"
	339	".align 4 \n"
	340	"asminline_call: \n\t"
	341	"pushq %rbp \n\t"
	342	"movq %rsp, %rbp \n\t"
	343	"pushq %rax \n\t"
	344	"pushq %rbx \n\t"
	345	"pushq %rdx \n\t"
	346	"pushq %r12 \n\t"
	347	"pushq %r9 \n\t"
	348	"movq %rsi, %r12 \n\t"
	349	"movq %rdi, %r9 \n\t"
	350	"movl 4(%r9),%ebx \n\t"
	351	"movl 8(%r9),%ecx \n\t"
	352	"movl 12(%r9),%edx \n\t"
	353	"movl 16(%r9),%esi \n\t"
	354	"movl 20(%r9),%edi \n\t"
	355	"movl (%r9),%eax \n\t"
	356	"call *%r12 \n\t"
	357	"pushfq \n\t"
	358	"popq %r12 \n\t"
1f6ef234 LT	359	"movl %eax, (%r9) \n\t"
	360	"movl %ebx, 4(%r9) \n\t"
	361	"movl %ecx, 8(%r9) \n\t"
	362	"movl %edx, 12(%r9) \n\t"
	363	"movl %esi, 16(%r9) \n\t"
	364	"movl %edi, 20(%r9) \n\t"
	365	"movq %r12, %rax \n\t"
	366	"movl %eax, 28(%r9) \n\t"
	367	"popq %r9 \n\t"
	368	"popq %r12 \n\t"
	369	"popq %rdx \n\t"
	370	"popq %rbx \n\t"
	371	"popq %rax \n\t"
	372	"leave \n\t"
	373	"ret \n\t"
	374	".previous");
7f4da474 TM	375
	376	/*
	377	* dmi_find_cru
	378	*
	379	* Routine Description:
30ec910e	380	* This function checks whether or not a SMBIOS/DMI record is
7f4da474	381	* the 64bit CRU info or not
7f4da474 TM	382	*/
	383	static void __devinit dmi_find_cru(const struct dmi_header *dm)
	384	{
	385	struct smbios_cru64_info *smbios_cru64_ptr;
	386	unsigned long cru_physical_address;
	387
	388	if (dm->type == SMBIOS_CRU64_INFORMATION) {
	389	smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
	390	if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
	391	cru_physical_address =
ab4ba3cd TM	392	smbios_cru64_ptr->physical_address +
ab4ba3cd TM	393	smbios_cru64_ptr->double_offset;
7f4da474	394	cru_rom_addr = ioremap(cru_physical_address,
ab4ba3cd	395	smbios_cru64_ptr->double_length);
06026413 BW	396	set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
06026413 BW	397	smbios_cru64_ptr->double_length >> PAGE_SHIFT);
7f4da474 TM	398	}
	399	}
	400	}
	401
7f4da474 TM	402	static int __devinit detect_cru_service(void)
	403	{
	404	cru_rom_addr = NULL;
	405
30ec910e	406	dmi_walk(dmi_find_cru);
7f4da474 TM	407
7f4da474 TM	408	/* if cru_rom_addr has been set then we found a CRU service */
ab4ba3cd	409	return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
7f4da474 TM	410	}
	411
	412	/* ------------------------------------------------------------------------- */
	413
	414	#endif
	415
7f4da474 TM	416	/*
	417	* Watchdog operations
	418	*/
	419	static void hpwdt_start(void)
	420	{
	421	reload = (soft_margin * 1000) / 128;
	422	iowrite16(reload, hpwdt_timer_reg);
	423	iowrite16(0x85, hpwdt_timer_con);
	424	}
	425
	426	static void hpwdt_stop(void)
	427	{
	428	unsigned long data;
	429
	430	data = ioread16(hpwdt_timer_con);
	431	data &= 0xFE;
	432	iowrite16(data, hpwdt_timer_con);
	433	}
	434
	435	static void hpwdt_ping(void)
	436	{
	437	iowrite16(reload, hpwdt_timer_reg);
	438	}
	439
	440	static int hpwdt_change_timer(int new_margin)
	441	{
	442	/* Arbitrary, can't find the card's limits */
	443	if (new_margin < 30 \|\| new_margin > 600) {
	444	printk(KERN_WARNING
	445	"hpwdt: New value passed in is invalid: %d seconds.\n",
	446	new_margin);
	447	return -EINVAL;
	448	}
	449
	450	soft_margin = new_margin;
	451	printk(KERN_DEBUG
	452	"hpwdt: New timer passed in is %d seconds.\n",
	453	new_margin);
	454	reload = (soft_margin * 1000) / 128;
	455
	456	return 0;
	457	}
	458
ab4ba3cd TM	459	/*
	460	* NMI Handler
	461	*/
	462	static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
	463	void *data)
	464	{
	465	unsigned long rom_pl;
	466	static int die_nmi_called;
	467
	468	if (ulReason != DIE_NMI && ulReason != DIE_NMI_IPI)
	469	return NOTIFY_OK;
	470
	471	spin_lock_irqsave(&rom_lock, rom_pl);
	472	if (!die_nmi_called)
	473	asminline_call(&cmn_regs, cru_rom_addr);
	474	die_nmi_called = 1;
	475	spin_unlock_irqrestore(&rom_lock, rom_pl);
	476	if (cmn_regs.u1.ral == 0) {
	477	printk(KERN_WARNING "hpwdt: An NMI occurred, "
	478	"but unable to determine source.\n");
	479	} else {
	480	if (allow_kdump)
	481	hpwdt_stop();
	482	panic("An NMI occurred, please see the Integrated "
	483	"Management Log for details.\n");
	484	}
	485
290172e7	486	return NOTIFY_OK;
ab4ba3cd TM	487	}
ab4ba3cd TM	488
7f4da474 TM	489	/*
	490	* /dev/watchdog handling
	491	*/
	492	static int hpwdt_open(struct inode inode, struct file file)
	493	{
	494	/* /dev/watchdog can only be opened once */
	495	if (test_and_set_bit(0, &hpwdt_is_open))
	496	return -EBUSY;
	497
	498	/* Start the watchdog */
	499	hpwdt_start();
	500	hpwdt_ping();
	501
	502	return nonseekable_open(inode, file);
	503	}
	504
	505	static int hpwdt_release(struct inode inode, struct file file)
	506	{
	507	/* Stop the watchdog */
	508	if (expect_release == 42) {
	509	hpwdt_stop();
	510	} else {
	511	printk(KERN_CRIT
	512	"hpwdt: Unexpected close, not stopping watchdog!\n");
	513	hpwdt_ping();
	514	}
	515
	516	expect_release = 0;
	517
	518	/* /dev/watchdog is being closed, make sure it can be re-opened */
	519	clear_bit(0, &hpwdt_is_open);
	520
	521	return 0;
	522	}
	523
	524	static ssize_t hpwdt_write(struct file file, const char __user data,
	525	size_t len, loff_t *ppos)
	526	{
	527	/* See if we got the magic character 'V' and reload the timer */
	528	if (len) {
	529	if (!nowayout) {
	530	size_t i;
	531
	532	/* note: just in case someone wrote the magic character
	533	* five months ago... */
	534	expect_release = 0;
	535
	536	/* scan to see whether or not we got the magic char. */
	537	for (i = 0; i != len; i++) {
	538	char c;
7944d3a5	539	if (get_user(c, data + i))
7f4da474 TM	540	return -EFAULT;
	541	if (c == 'V')
	542	expect_release = 42;
	543	}
	544	}
	545
	546	/* someone wrote to us, we should reload the timer */
	547	hpwdt_ping();
	548	}
	549
	550	return len;
	551	}
	552
	553	static struct watchdog_info ident = {
	554	.options = WDIOF_SETTIMEOUT \|
	555	WDIOF_KEEPALIVEPING \|
	556	WDIOF_MAGICCLOSE,
	557	.identity = "HP iLO2 HW Watchdog Timer",
	558	};
	559
	560	static long hpwdt_ioctl(struct file *file, unsigned int cmd,
	561	unsigned long arg)
	562	{
	563	void __user argp = (void __user )arg;
	564	int __user *p = argp;
	565	int new_margin;
	566	int ret = -ENOTTY;
	567
	568	switch (cmd) {
	569	case WDIOC_GETSUPPORT:
	570	ret = 0;
	571	if (copy_to_user(argp, &ident, sizeof(ident)))
	572	ret = -EFAULT;
	573	break;
	574
	575	case WDIOC_GETSTATUS:
	576	case WDIOC_GETBOOTSTATUS:
	577	ret = put_user(0, p);
	578	break;
	579
	580	case WDIOC_KEEPALIVE:
	581	hpwdt_ping();
	582	ret = 0;
	583	break;
	584
	585	case WDIOC_SETTIMEOUT:
	586	ret = get_user(new_margin, p);
	587	if (ret)
	588	break;
	589
	590	ret = hpwdt_change_timer(new_margin);
	591	if (ret)
	592	break;
	593
	594	hpwdt_ping();
	595	/* Fall */
	596	case WDIOC_GETTIMEOUT:
	597	ret = put_user(soft_margin, p);
	598	break;
	599	}
	600	return ret;
	601	}
	602
	603	/*
604	* Kernel interfaces
605	*/
d5c26a59	606	static const struct file_operations hpwdt_fops = {
7f4da474 TM	607	.owner = THIS_MODULE,
	608	.llseek = no_llseek,
	609	.write = hpwdt_write,
	610	.unlocked_ioctl = hpwdt_ioctl,
	611	.open = hpwdt_open,
	612	.release = hpwdt_release,
	613	};
	614
	615	static struct miscdevice hpwdt_miscdev = {
	616	.minor = WATCHDOG_MINOR,
	617	.name = "watchdog",
	618	.fops = &hpwdt_fops,
	619	};
	620
	621	static struct notifier_block die_notifier = {
	622	.notifier_call = hpwdt_pretimeout,
	623	.priority = 0x7FFFFFFF,
	624	};
	625
	626	/*
	627	* Init & Exit
	628	*/
	629
	630	static int __devinit hpwdt_init_one(struct pci_dev *dev,
ab4ba3cd	631	const struct pci_device_id *ent)
7f4da474 TM	632	{
	633	int retval;
	634
	635	/*
	636	* First let's find out if we are on an iLO2 server. We will
	637	* not run on a legacy ASM box.
ab4ba3cd	638	* So we only support the G5 ProLiant servers and higher.
7f4da474 TM	639	*/
	640	if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
	641	dev_warn(&dev->dev,
ab4ba3cd	642	"This server does not have an iLO2 ASIC.\n");
7f4da474 TM	643	return -ENODEV;
	644	}
	645
	646	if (pci_enable_device(dev)) {
	647	dev_warn(&dev->dev,
	648	"Not possible to enable PCI Device: 0x%x:0x%x.\n",
	649	ent->vendor, ent->device);
	650	return -ENODEV;
	651	}
	652
	653	pci_mem_addr = pci_iomap(dev, 1, 0x80);
	654	if (!pci_mem_addr) {
	655	dev_warn(&dev->dev,
	656	"Unable to detect the iLO2 server memory.\n");
	657	retval = -ENOMEM;
	658	goto error_pci_iomap;
	659	}
	660	hpwdt_timer_reg = pci_mem_addr + 0x70;
	661	hpwdt_timer_con = pci_mem_addr + 0x72;
	662
	663	/* Make sure that we have a valid soft_margin */
	664	if (hpwdt_change_timer(soft_margin))
	665	hpwdt_change_timer(DEFAULT_MARGIN);
	666
	667	/*
	668	* We need to map the ROM to get the CRU service.
	669	* For 32 bit Operating Systems we need to go through the 32 Bit
	670	* BIOS Service Directory
	671	* For 64 bit Operating Systems we get that service through SMBIOS.
	672	*/
	673	retval = detect_cru_service();
	674	if (retval < 0) {
	675	dev_warn(&dev->dev,
ab4ba3cd	676	"Unable to detect the %d Bit CRU Service.\n",
7f4da474 TM	677	HPWDT_ARCH);
	678	goto error_get_cru;
	679	}
	680
	681	/*
	682	* We know this is the only CRU call we need to make so lets keep as
	683	* few instructions as possible once the NMI comes in.
	684	*/
	685	cmn_regs.u1.rah = 0x0D;
	686	cmn_regs.u1.ral = 0x02;
	687
	688	retval = register_die_notifier(&die_notifier);
	689	if (retval != 0) {
	690	dev_warn(&dev->dev,
ab4ba3cd	691	"Unable to register a die notifier (err=%d).\n",
7f4da474 TM	692	retval);
	693	goto error_die_notifier;
	694	}
	695
	696	retval = misc_register(&hpwdt_miscdev);
	697	if (retval < 0) {
	698	dev_warn(&dev->dev,
	699	"Unable to register miscdev on minor=%d (err=%d).\n",
	700	WATCHDOG_MINOR, retval);
	701	goto error_misc_register;
	702	}
	703
	704	printk(KERN_INFO
d8100c3a	705	"hp Watchdog Timer Driver: %s"
ab4ba3cd TM	706	", timer margin: %d seconds (nowayout=%d)"
ab4ba3cd TM	707	", allow kernel dump: %s (default = 0/OFF).\n",
d8100c3a TM	708	HPWDT_VERSION, soft_margin, nowayout,
d8100c3a TM	709	(allow_kdump == 0) ? "OFF" : "ON");
7f4da474 TM	710
	711	return 0;
	712
	713	error_misc_register:
	714	unregister_die_notifier(&die_notifier);
	715	error_die_notifier:
	716	if (cru_rom_addr)
	717	iounmap(cru_rom_addr);
	718	error_get_cru:
	719	pci_iounmap(dev, pci_mem_addr);
	720	error_pci_iomap:
	721	pci_disable_device(dev);
	722	return retval;
	723	}
	724
	725	static void __devexit hpwdt_exit(struct pci_dev *dev)
	726	{
	727	if (!nowayout)
	728	hpwdt_stop();
	729
	730	misc_deregister(&hpwdt_miscdev);
	731	unregister_die_notifier(&die_notifier);
	732
	733	if (cru_rom_addr)
	734	iounmap(cru_rom_addr);
	735	pci_iounmap(dev, pci_mem_addr);
	736	pci_disable_device(dev);
	737	}
	738
	739	static struct pci_driver hpwdt_driver = {
	740	.name = "hpwdt",
	741	.id_table = hpwdt_devices,
	742	.probe = hpwdt_init_one,
	743	.remove = __devexit_p(hpwdt_exit),
	744	};
	745
	746	static void __exit hpwdt_cleanup(void)
	747	{
	748	pci_unregister_driver(&hpwdt_driver);
	749	}
	750
	751	static int __init hpwdt_init(void)
	752	{
	753	return pci_register_driver(&hpwdt_driver);
	754	}
	755
	756	MODULE_AUTHOR("Tom Mingarelli");
	757	MODULE_DESCRIPTION("hp watchdog driver");
	758	MODULE_LICENSE("GPL");
d8100c3a	759	MODULE_VERSION(HPWDT_VERSION);
7f4da474 TM	760	MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
	761
	762	module_param(soft_margin, int, 0);
	763	MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
	764
ab4ba3cd TM	765	module_param(allow_kdump, int, 0);
	766	MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
	767
7f4da474 TM	768	module_param(nowayout, int, 0);
	769	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
	770	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	771
	772	module_init(hpwdt_init);
	773	module_exit(hpwdt_cleanup);