Commit | Line | Data |
---|---|---|
7f4da474 TM |
1 | /* |
2 | * HP WatchDog Driver | |
3 | * based on | |
4 | * | |
5 | * SoftDog 0.05: A Software Watchdog Device | |
6 | * | |
7 | * (c) Copyright 2007 Hewlett-Packard Development Company, L.P. | |
8 | * Thomas Mingarelli <thomas.mingarelli@hp.com> | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License | |
12 | * version 2 as published by the Free Software Foundation | |
13 | * | |
14 | */ | |
15 | ||
16 | #include <linux/device.h> | |
17 | #include <linux/fs.h> | |
18 | #include <linux/init.h> | |
7f4da474 | 19 | #include <linux/io.h> |
a52e6d18 | 20 | #include <linux/bitops.h> |
7f4da474 TM |
21 | #include <linux/kernel.h> |
22 | #include <linux/miscdevice.h> | |
7f4da474 | 23 | #include <linux/module.h> |
7f4da474 | 24 | #include <linux/moduleparam.h> |
7f4da474 TM |
25 | #include <linux/pci.h> |
26 | #include <linux/pci_ids.h> | |
7f4da474 TM |
27 | #include <linux/types.h> |
28 | #include <linux/uaccess.h> | |
29 | #include <linux/watchdog.h> | |
86ded1f3 | 30 | #ifdef CONFIG_HPWDT_NMI_DECODING |
7f4da474 | 31 | #include <linux/dmi.h> |
a52e6d18 | 32 | #include <linux/spinlock.h> |
923410d0 | 33 | #include <linux/nmi.h> |
34 | #include <linux/kdebug.h> | |
35 | #include <linux/notifier.h> | |
06026413 | 36 | #include <asm/cacheflush.h> |
86ded1f3 | 37 | #endif /* CONFIG_HPWDT_NMI_DECODING */ |
7f4da474 | 38 | |
5efc7a62 | 39 | #define HPWDT_VERSION "1.3.0" |
e802e32d | 40 | #define SECS_TO_TICKS(secs) ((secs) * 1000 / 128) |
6f681c2e | 41 | #define TICKS_TO_SECS(ticks) ((ticks) * 128 / 1000) |
42 | #define HPWDT_MAX_TIMER TICKS_TO_SECS(65535) | |
923410d0 | 43 | #define DEFAULT_MARGIN 30 |
44 | ||
45 | static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */ | |
46 | static unsigned int reload; /* the computed soft_margin */ | |
47 | static int nowayout = WATCHDOG_NOWAYOUT; | |
48 | static char expect_release; | |
49 | static unsigned long hpwdt_is_open; | |
50 | ||
51 | static void __iomem *pci_mem_addr; /* the PCI-memory address */ | |
52 | static unsigned long __iomem *hpwdt_timer_reg; | |
53 | static unsigned long __iomem *hpwdt_timer_con; | |
54 | ||
4562f539 | 55 | static DEFINE_PCI_DEVICE_TABLE(hpwdt_devices) = { |
36e3ff44 | 56 | { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) }, /* iLO2 */ |
57 | { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) }, /* iLO3 */ | |
923410d0 | 58 | {0}, /* terminate list */ |
59 | }; | |
60 | MODULE_DEVICE_TABLE(pci, hpwdt_devices); | |
61 | ||
86ded1f3 | 62 | #ifdef CONFIG_HPWDT_NMI_DECODING |
7f4da474 TM |
63 | #define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */ |
64 | #define CRU_BIOS_SIGNATURE_VALUE 0x55524324 | |
65 | #define PCI_BIOS32_PARAGRAPH_LEN 16 | |
66 | #define PCI_ROM_BASE1 0x000F0000 | |
67 | #define ROM_SIZE 0x10000 | |
68 | ||
69 | struct bios32_service_dir { | |
70 | u32 signature; | |
71 | u32 entry_point; | |
72 | u8 revision; | |
73 | u8 length; | |
74 | u8 checksum; | |
75 | u8 reserved[5]; | |
76 | }; | |
77 | ||
7f4da474 TM |
78 | /* type 212 */ |
79 | struct smbios_cru64_info { | |
80 | u8 type; | |
81 | u8 byte_length; | |
82 | u16 handle; | |
83 | u32 signature; | |
84 | u64 physical_address; | |
85 | u32 double_length; | |
86 | u32 double_offset; | |
87 | }; | |
88 | #define SMBIOS_CRU64_INFORMATION 212 | |
89 | ||
5efc7a62 TM |
90 | /* type 219 */ |
91 | struct smbios_proliant_info { | |
92 | u8 type; | |
93 | u8 byte_length; | |
94 | u16 handle; | |
95 | u32 power_features; | |
96 | u32 omega_features; | |
97 | u32 reserved; | |
98 | u32 misc_features; | |
99 | }; | |
100 | #define SMBIOS_ICRU_INFORMATION 219 | |
101 | ||
102 | ||
7f4da474 TM |
103 | struct cmn_registers { |
104 | union { | |
105 | struct { | |
106 | u8 ral; | |
107 | u8 rah; | |
108 | u16 rea2; | |
109 | }; | |
110 | u32 reax; | |
111 | } u1; | |
112 | union { | |
113 | struct { | |
114 | u8 rbl; | |
115 | u8 rbh; | |
116 | u8 reb2l; | |
117 | u8 reb2h; | |
118 | }; | |
119 | u32 rebx; | |
120 | } u2; | |
121 | union { | |
122 | struct { | |
123 | u8 rcl; | |
124 | u8 rch; | |
125 | u16 rec2; | |
126 | }; | |
127 | u32 recx; | |
128 | } u3; | |
129 | union { | |
130 | struct { | |
131 | u8 rdl; | |
132 | u8 rdh; | |
133 | u16 red2; | |
134 | }; | |
135 | u32 redx; | |
136 | } u4; | |
137 | ||
138 | u32 resi; | |
139 | u32 redi; | |
140 | u16 rds; | |
141 | u16 res; | |
142 | u32 reflags; | |
143 | } __attribute__((packed)); | |
144 | ||
34572b29 | 145 | static unsigned int hpwdt_nmi_decoding; |
923410d0 | 146 | static unsigned int allow_kdump; |
44df7535 | 147 | static unsigned int priority; /* hpwdt at end of die_notify list */ |
5efc7a62 | 148 | static unsigned int is_icru; |
7f4da474 | 149 | static DEFINE_SPINLOCK(rom_lock); |
7f4da474 | 150 | static void *cru_rom_addr; |
7f4da474 TM |
151 | static struct cmn_registers cmn_regs; |
152 | ||
143a2e54 WVS |
153 | extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs, |
154 | unsigned long *pRomEntry); | |
1f6ef234 | 155 | |
6b7f3d53 | 156 | #ifdef CONFIG_X86_32 |
7f4da474 TM |
157 | /* --32 Bit Bios------------------------------------------------------------ */ |
158 | ||
159 | #define HPWDT_ARCH 32 | |
160 | ||
1f6ef234 LT |
161 | asm(".text \n\t" |
162 | ".align 4 \n" | |
163 | "asminline_call: \n\t" | |
164 | "pushl %ebp \n\t" | |
165 | "movl %esp, %ebp \n\t" | |
166 | "pusha \n\t" | |
167 | "pushf \n\t" | |
168 | "push %es \n\t" | |
169 | "push %ds \n\t" | |
170 | "pop %es \n\t" | |
171 | "movl 8(%ebp),%eax \n\t" | |
172 | "movl 4(%eax),%ebx \n\t" | |
173 | "movl 8(%eax),%ecx \n\t" | |
174 | "movl 12(%eax),%edx \n\t" | |
175 | "movl 16(%eax),%esi \n\t" | |
176 | "movl 20(%eax),%edi \n\t" | |
177 | "movl (%eax),%eax \n\t" | |
178 | "push %cs \n\t" | |
179 | "call *12(%ebp) \n\t" | |
180 | "pushf \n\t" | |
181 | "pushl %eax \n\t" | |
182 | "movl 8(%ebp),%eax \n\t" | |
183 | "movl %ebx,4(%eax) \n\t" | |
184 | "movl %ecx,8(%eax) \n\t" | |
185 | "movl %edx,12(%eax) \n\t" | |
186 | "movl %esi,16(%eax) \n\t" | |
187 | "movl %edi,20(%eax) \n\t" | |
188 | "movw %ds,24(%eax) \n\t" | |
189 | "movw %es,26(%eax) \n\t" | |
190 | "popl %ebx \n\t" | |
191 | "movl %ebx,(%eax) \n\t" | |
192 | "popl %ebx \n\t" | |
193 | "movl %ebx,28(%eax) \n\t" | |
194 | "pop %es \n\t" | |
195 | "popf \n\t" | |
196 | "popa \n\t" | |
197 | "leave \n\t" | |
198 | "ret \n\t" | |
199 | ".previous"); | |
200 | ||
7f4da474 TM |
201 | |
202 | /* | |
203 | * cru_detect | |
204 | * | |
205 | * Routine Description: | |
206 | * This function uses the 32-bit BIOS Service Directory record to | |
207 | * search for a $CRU record. | |
208 | * | |
209 | * Return Value: | |
210 | * 0 : SUCCESS | |
211 | * <0 : FAILURE | |
212 | */ | |
213 | static int __devinit cru_detect(unsigned long map_entry, | |
214 | unsigned long map_offset) | |
215 | { | |
216 | void *bios32_map; | |
217 | unsigned long *bios32_entrypoint; | |
218 | unsigned long cru_physical_address; | |
219 | unsigned long cru_length; | |
220 | unsigned long physical_bios_base = 0; | |
221 | unsigned long physical_bios_offset = 0; | |
222 | int retval = -ENODEV; | |
223 | ||
224 | bios32_map = ioremap(map_entry, (2 * PAGE_SIZE)); | |
225 | ||
226 | if (bios32_map == NULL) | |
227 | return -ENODEV; | |
228 | ||
229 | bios32_entrypoint = bios32_map + map_offset; | |
230 | ||
231 | cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE; | |
232 | ||
233 | asminline_call(&cmn_regs, bios32_entrypoint); | |
234 | ||
235 | if (cmn_regs.u1.ral != 0) { | |
236 | printk(KERN_WARNING | |
ab4ba3cd TM |
237 | "hpwdt: Call succeeded but with an error: 0x%x\n", |
238 | cmn_regs.u1.ral); | |
7f4da474 TM |
239 | } else { |
240 | physical_bios_base = cmn_regs.u2.rebx; | |
241 | physical_bios_offset = cmn_regs.u4.redx; | |
242 | cru_length = cmn_regs.u3.recx; | |
243 | cru_physical_address = | |
ab4ba3cd | 244 | physical_bios_base + physical_bios_offset; |
7f4da474 TM |
245 | |
246 | /* If the values look OK, then map it in. */ | |
247 | if ((physical_bios_base + physical_bios_offset)) { | |
248 | cru_rom_addr = | |
ab4ba3cd | 249 | ioremap(cru_physical_address, cru_length); |
7f4da474 TM |
250 | if (cru_rom_addr) |
251 | retval = 0; | |
252 | } | |
253 | ||
254 | printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n", | |
255 | physical_bios_base); | |
256 | printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n", | |
257 | physical_bios_offset); | |
258 | printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n", | |
259 | cru_length); | |
adb23631 KV |
260 | printk(KERN_DEBUG "hpwdt: CRU Mapped Address: %p\n", |
261 | &cru_rom_addr); | |
7f4da474 TM |
262 | } |
263 | iounmap(bios32_map); | |
264 | return retval; | |
265 | } | |
266 | ||
30ec910e RD |
267 | /* |
268 | * bios_checksum | |
269 | */ | |
270 | static int __devinit bios_checksum(const char __iomem *ptr, int len) | |
271 | { | |
272 | char sum = 0; | |
273 | int i; | |
274 | ||
275 | /* | |
276 | * calculate checksum of size bytes. This should add up | |
277 | * to zero if we have a valid header. | |
278 | */ | |
279 | for (i = 0; i < len; i++) | |
280 | sum += ptr[i]; | |
281 | ||
282 | return ((sum == 0) && (len > 0)); | |
283 | } | |
284 | ||
7f4da474 TM |
285 | /* |
286 | * bios32_present | |
287 | * | |
288 | * Routine Description: | |
289 | * This function finds the 32-bit BIOS Service Directory | |
290 | * | |
291 | * Return Value: | |
292 | * 0 : SUCCESS | |
293 | * <0 : FAILURE | |
294 | */ | |
295 | static int __devinit bios32_present(const char __iomem *p) | |
296 | { | |
297 | struct bios32_service_dir *bios_32_ptr; | |
298 | int length; | |
299 | unsigned long map_entry, map_offset; | |
300 | ||
301 | bios_32_ptr = (struct bios32_service_dir *) p; | |
302 | ||
303 | /* | |
304 | * Search for signature by checking equal to the swizzled value | |
305 | * instead of calling another routine to perform a strcmp. | |
306 | */ | |
307 | if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) { | |
308 | length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN; | |
309 | if (bios_checksum(p, length)) { | |
310 | /* | |
311 | * According to the spec, we're looking for the | |
312 | * first 4KB-aligned address below the entrypoint | |
313 | * listed in the header. The Service Directory code | |
314 | * is guaranteed to occupy no more than 2 4KB pages. | |
315 | */ | |
316 | map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1); | |
317 | map_offset = bios_32_ptr->entry_point - map_entry; | |
318 | ||
319 | return cru_detect(map_entry, map_offset); | |
320 | } | |
321 | } | |
322 | return -ENODEV; | |
323 | } | |
324 | ||
325 | static int __devinit detect_cru_service(void) | |
326 | { | |
327 | char __iomem *p, *q; | |
328 | int rc = -1; | |
329 | ||
330 | /* | |
331 | * Search from 0x0f0000 through 0x0fffff, inclusive. | |
332 | */ | |
333 | p = ioremap(PCI_ROM_BASE1, ROM_SIZE); | |
334 | if (p == NULL) | |
335 | return -ENOMEM; | |
336 | ||
337 | for (q = p; q < p + ROM_SIZE; q += 16) { | |
338 | rc = bios32_present(q); | |
339 | if (!rc) | |
340 | break; | |
341 | } | |
342 | iounmap(p); | |
343 | return rc; | |
344 | } | |
6b7f3d53 | 345 | /* ------------------------------------------------------------------------- */ |
346 | #endif /* CONFIG_X86_32 */ | |
347 | #ifdef CONFIG_X86_64 | |
7f4da474 TM |
348 | /* --64 Bit Bios------------------------------------------------------------ */ |
349 | ||
350 | #define HPWDT_ARCH 64 | |
351 | ||
1f6ef234 LT |
352 | asm(".text \n\t" |
353 | ".align 4 \n" | |
354 | "asminline_call: \n\t" | |
355 | "pushq %rbp \n\t" | |
356 | "movq %rsp, %rbp \n\t" | |
357 | "pushq %rax \n\t" | |
358 | "pushq %rbx \n\t" | |
359 | "pushq %rdx \n\t" | |
360 | "pushq %r12 \n\t" | |
361 | "pushq %r9 \n\t" | |
362 | "movq %rsi, %r12 \n\t" | |
363 | "movq %rdi, %r9 \n\t" | |
364 | "movl 4(%r9),%ebx \n\t" | |
365 | "movl 8(%r9),%ecx \n\t" | |
366 | "movl 12(%r9),%edx \n\t" | |
367 | "movl 16(%r9),%esi \n\t" | |
368 | "movl 20(%r9),%edi \n\t" | |
369 | "movl (%r9),%eax \n\t" | |
370 | "call *%r12 \n\t" | |
371 | "pushfq \n\t" | |
372 | "popq %r12 \n\t" | |
1f6ef234 LT |
373 | "movl %eax, (%r9) \n\t" |
374 | "movl %ebx, 4(%r9) \n\t" | |
375 | "movl %ecx, 8(%r9) \n\t" | |
376 | "movl %edx, 12(%r9) \n\t" | |
377 | "movl %esi, 16(%r9) \n\t" | |
378 | "movl %edi, 20(%r9) \n\t" | |
379 | "movq %r12, %rax \n\t" | |
380 | "movl %eax, 28(%r9) \n\t" | |
381 | "popq %r9 \n\t" | |
382 | "popq %r12 \n\t" | |
383 | "popq %rdx \n\t" | |
384 | "popq %rbx \n\t" | |
385 | "popq %rax \n\t" | |
386 | "leave \n\t" | |
387 | "ret \n\t" | |
388 | ".previous"); | |
7f4da474 TM |
389 | |
390 | /* | |
391 | * dmi_find_cru | |
392 | * | |
393 | * Routine Description: | |
30ec910e | 394 | * This function checks whether or not a SMBIOS/DMI record is |
7f4da474 | 395 | * the 64bit CRU info or not |
7f4da474 | 396 | */ |
e7a19c56 | 397 | static void __devinit dmi_find_cru(const struct dmi_header *dm, void *dummy) |
7f4da474 TM |
398 | { |
399 | struct smbios_cru64_info *smbios_cru64_ptr; | |
400 | unsigned long cru_physical_address; | |
401 | ||
402 | if (dm->type == SMBIOS_CRU64_INFORMATION) { | |
403 | smbios_cru64_ptr = (struct smbios_cru64_info *) dm; | |
404 | if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) { | |
405 | cru_physical_address = | |
ab4ba3cd TM |
406 | smbios_cru64_ptr->physical_address + |
407 | smbios_cru64_ptr->double_offset; | |
7f4da474 | 408 | cru_rom_addr = ioremap(cru_physical_address, |
ab4ba3cd | 409 | smbios_cru64_ptr->double_length); |
06026413 BW |
410 | set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK, |
411 | smbios_cru64_ptr->double_length >> PAGE_SHIFT); | |
7f4da474 TM |
412 | } |
413 | } | |
414 | } | |
415 | ||
7f4da474 TM |
416 | static int __devinit detect_cru_service(void) |
417 | { | |
418 | cru_rom_addr = NULL; | |
419 | ||
e7a19c56 | 420 | dmi_walk(dmi_find_cru, NULL); |
7f4da474 TM |
421 | |
422 | /* if cru_rom_addr has been set then we found a CRU service */ | |
ab4ba3cd | 423 | return ((cru_rom_addr != NULL) ? 0 : -ENODEV); |
7f4da474 | 424 | } |
7f4da474 | 425 | /* ------------------------------------------------------------------------- */ |
6b7f3d53 | 426 | #endif /* CONFIG_X86_64 */ |
86ded1f3 | 427 | #endif /* CONFIG_HPWDT_NMI_DECODING */ |
7f4da474 | 428 | |
7f4da474 TM |
429 | /* |
430 | * Watchdog operations | |
431 | */ | |
432 | static void hpwdt_start(void) | |
433 | { | |
e802e32d | 434 | reload = SECS_TO_TICKS(soft_margin); |
7f4da474 TM |
435 | iowrite16(reload, hpwdt_timer_reg); |
436 | iowrite16(0x85, hpwdt_timer_con); | |
437 | } | |
438 | ||
439 | static void hpwdt_stop(void) | |
440 | { | |
441 | unsigned long data; | |
442 | ||
443 | data = ioread16(hpwdt_timer_con); | |
444 | data &= 0xFE; | |
445 | iowrite16(data, hpwdt_timer_con); | |
446 | } | |
447 | ||
448 | static void hpwdt_ping(void) | |
449 | { | |
450 | iowrite16(reload, hpwdt_timer_reg); | |
451 | } | |
452 | ||
453 | static int hpwdt_change_timer(int new_margin) | |
454 | { | |
6f681c2e | 455 | if (new_margin < 1 || new_margin > HPWDT_MAX_TIMER) { |
7f4da474 TM |
456 | printk(KERN_WARNING |
457 | "hpwdt: New value passed in is invalid: %d seconds.\n", | |
458 | new_margin); | |
459 | return -EINVAL; | |
460 | } | |
461 | ||
462 | soft_margin = new_margin; | |
463 | printk(KERN_DEBUG | |
464 | "hpwdt: New timer passed in is %d seconds.\n", | |
465 | new_margin); | |
e802e32d | 466 | reload = SECS_TO_TICKS(soft_margin); |
7f4da474 TM |
467 | |
468 | return 0; | |
469 | } | |
470 | ||
aae67f36 | 471 | static int hpwdt_time_left(void) |
472 | { | |
473 | return TICKS_TO_SECS(ioread16(hpwdt_timer_reg)); | |
474 | } | |
475 | ||
86ded1f3 | 476 | #ifdef CONFIG_HPWDT_NMI_DECODING |
ab4ba3cd TM |
477 | /* |
478 | * NMI Handler | |
479 | */ | |
480 | static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason, | |
481 | void *data) | |
482 | { | |
483 | unsigned long rom_pl; | |
484 | static int die_nmi_called; | |
485 | ||
673a6092 | 486 | if (ulReason != DIE_NMIUNKNOWN) |
243066ba | 487 | goto out; |
488 | ||
34572b29 | 489 | if (!hpwdt_nmi_decoding) |
243066ba | 490 | goto out; |
491 | ||
492 | spin_lock_irqsave(&rom_lock, rom_pl); | |
5efc7a62 | 493 | if (!die_nmi_called && !is_icru) |
243066ba | 494 | asminline_call(&cmn_regs, cru_rom_addr); |
495 | die_nmi_called = 1; | |
496 | spin_unlock_irqrestore(&rom_lock, rom_pl); | |
5efc7a62 TM |
497 | if (!is_icru) { |
498 | if (cmn_regs.u1.ral == 0) { | |
499 | printk(KERN_WARNING "hpwdt: An NMI occurred, " | |
500 | "but unable to determine source.\n"); | |
501 | } | |
ab4ba3cd | 502 | } |
5efc7a62 TM |
503 | |
504 | if (allow_kdump) | |
505 | hpwdt_stop(); | |
506 | panic("An NMI occurred, please see the Integrated " | |
507 | "Management Log for details.\n"); | |
508 | ||
243066ba | 509 | out: |
290172e7 | 510 | return NOTIFY_OK; |
ab4ba3cd | 511 | } |
86ded1f3 | 512 | #endif /* CONFIG_HPWDT_NMI_DECODING */ |
ab4ba3cd | 513 | |
7f4da474 TM |
514 | /* |
515 | * /dev/watchdog handling | |
516 | */ | |
517 | static int hpwdt_open(struct inode *inode, struct file *file) | |
518 | { | |
519 | /* /dev/watchdog can only be opened once */ | |
520 | if (test_and_set_bit(0, &hpwdt_is_open)) | |
521 | return -EBUSY; | |
522 | ||
523 | /* Start the watchdog */ | |
524 | hpwdt_start(); | |
525 | hpwdt_ping(); | |
526 | ||
527 | return nonseekable_open(inode, file); | |
528 | } | |
529 | ||
530 | static int hpwdt_release(struct inode *inode, struct file *file) | |
531 | { | |
532 | /* Stop the watchdog */ | |
533 | if (expect_release == 42) { | |
534 | hpwdt_stop(); | |
535 | } else { | |
536 | printk(KERN_CRIT | |
537 | "hpwdt: Unexpected close, not stopping watchdog!\n"); | |
538 | hpwdt_ping(); | |
539 | } | |
540 | ||
541 | expect_release = 0; | |
542 | ||
543 | /* /dev/watchdog is being closed, make sure it can be re-opened */ | |
544 | clear_bit(0, &hpwdt_is_open); | |
545 | ||
546 | return 0; | |
547 | } | |
548 | ||
549 | static ssize_t hpwdt_write(struct file *file, const char __user *data, | |
550 | size_t len, loff_t *ppos) | |
551 | { | |
552 | /* See if we got the magic character 'V' and reload the timer */ | |
553 | if (len) { | |
554 | if (!nowayout) { | |
555 | size_t i; | |
556 | ||
557 | /* note: just in case someone wrote the magic character | |
558 | * five months ago... */ | |
559 | expect_release = 0; | |
560 | ||
561 | /* scan to see whether or not we got the magic char. */ | |
562 | for (i = 0; i != len; i++) { | |
563 | char c; | |
7944d3a5 | 564 | if (get_user(c, data + i)) |
7f4da474 TM |
565 | return -EFAULT; |
566 | if (c == 'V') | |
567 | expect_release = 42; | |
568 | } | |
569 | } | |
570 | ||
571 | /* someone wrote to us, we should reload the timer */ | |
572 | hpwdt_ping(); | |
573 | } | |
574 | ||
575 | return len; | |
576 | } | |
577 | ||
42747d71 | 578 | static const struct watchdog_info ident = { |
7f4da474 TM |
579 | .options = WDIOF_SETTIMEOUT | |
580 | WDIOF_KEEPALIVEPING | | |
581 | WDIOF_MAGICCLOSE, | |
36e3ff44 | 582 | .identity = "HP iLO2+ HW Watchdog Timer", |
7f4da474 TM |
583 | }; |
584 | ||
585 | static long hpwdt_ioctl(struct file *file, unsigned int cmd, | |
586 | unsigned long arg) | |
587 | { | |
588 | void __user *argp = (void __user *)arg; | |
589 | int __user *p = argp; | |
590 | int new_margin; | |
591 | int ret = -ENOTTY; | |
592 | ||
593 | switch (cmd) { | |
594 | case WDIOC_GETSUPPORT: | |
595 | ret = 0; | |
596 | if (copy_to_user(argp, &ident, sizeof(ident))) | |
597 | ret = -EFAULT; | |
598 | break; | |
599 | ||
600 | case WDIOC_GETSTATUS: | |
601 | case WDIOC_GETBOOTSTATUS: | |
602 | ret = put_user(0, p); | |
603 | break; | |
604 | ||
605 | case WDIOC_KEEPALIVE: | |
606 | hpwdt_ping(); | |
607 | ret = 0; | |
608 | break; | |
609 | ||
610 | case WDIOC_SETTIMEOUT: | |
611 | ret = get_user(new_margin, p); | |
612 | if (ret) | |
613 | break; | |
614 | ||
615 | ret = hpwdt_change_timer(new_margin); | |
616 | if (ret) | |
617 | break; | |
618 | ||
619 | hpwdt_ping(); | |
620 | /* Fall */ | |
621 | case WDIOC_GETTIMEOUT: | |
622 | ret = put_user(soft_margin, p); | |
623 | break; | |
aae67f36 | 624 | |
625 | case WDIOC_GETTIMELEFT: | |
626 | ret = put_user(hpwdt_time_left(), p); | |
627 | break; | |
7f4da474 TM |
628 | } |
629 | return ret; | |
630 | } | |
631 | ||
632 | /* | |
633 | * Kernel interfaces | |
634 | */ | |
d5c26a59 | 635 | static const struct file_operations hpwdt_fops = { |
7f4da474 TM |
636 | .owner = THIS_MODULE, |
637 | .llseek = no_llseek, | |
638 | .write = hpwdt_write, | |
639 | .unlocked_ioctl = hpwdt_ioctl, | |
640 | .open = hpwdt_open, | |
641 | .release = hpwdt_release, | |
642 | }; | |
643 | ||
644 | static struct miscdevice hpwdt_miscdev = { | |
645 | .minor = WATCHDOG_MINOR, | |
646 | .name = "watchdog", | |
647 | .fops = &hpwdt_fops, | |
648 | }; | |
649 | ||
86ded1f3 | 650 | #ifdef CONFIG_HPWDT_NMI_DECODING |
7f4da474 TM |
651 | static struct notifier_block die_notifier = { |
652 | .notifier_call = hpwdt_pretimeout, | |
44df7535 | 653 | .priority = 0, |
7f4da474 | 654 | }; |
86ded1f3 | 655 | #endif /* CONFIG_HPWDT_NMI_DECODING */ |
7f4da474 TM |
656 | |
657 | /* | |
658 | * Init & Exit | |
659 | */ | |
660 | ||
86ded1f3 | 661 | #ifdef CONFIG_HPWDT_NMI_DECODING |
4a7863cc | 662 | #ifdef CONFIG_X86_LOCAL_APIC |
34572b29 | 663 | static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev) |
47bece87 TM |
664 | { |
665 | /* | |
666 | * If nmi_watchdog is turned off then we can turn on | |
34572b29 | 667 | * our nmi decoding capability. |
47bece87 | 668 | */ |
072b198a | 669 | hpwdt_nmi_decoding = 1; |
47bece87 TM |
670 | } |
671 | #else | |
34572b29 | 672 | static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev) |
47bece87 | 673 | { |
34572b29 | 674 | dev_warn(&dev->dev, "NMI decoding is disabled. " |
47bece87 TM |
675 | "Your kernel does not support a NMI Watchdog.\n"); |
676 | } | |
4a7863cc | 677 | #endif /* CONFIG_X86_LOCAL_APIC */ |
2ec7ed67 | 678 | |
5efc7a62 TM |
679 | /* |
680 | * dmi_find_icru | |
681 | * | |
682 | * Routine Description: | |
683 | * This function checks whether or not we are on an iCRU-based server. | |
684 | * This check is independent of architecture and needs to be made for | |
685 | * any ProLiant system. | |
686 | */ | |
687 | static void __devinit dmi_find_icru(const struct dmi_header *dm, void *dummy) | |
688 | { | |
689 | struct smbios_proliant_info *smbios_proliant_ptr; | |
690 | ||
691 | if (dm->type == SMBIOS_ICRU_INFORMATION) { | |
692 | smbios_proliant_ptr = (struct smbios_proliant_info *) dm; | |
693 | if (smbios_proliant_ptr->misc_features & 0x01) | |
694 | is_icru = 1; | |
695 | } | |
696 | } | |
697 | ||
2ec7ed67 | 698 | static int __devinit hpwdt_init_nmi_decoding(struct pci_dev *dev) |
699 | { | |
700 | int retval; | |
701 | ||
702 | /* | |
5efc7a62 TM |
703 | * On typical CRU-based systems we need to map that service in |
704 | * the BIOS. For 32 bit Operating Systems we need to go through | |
705 | * the 32 Bit BIOS Service Directory. For 64 bit Operating | |
706 | * Systems we get that service through SMBIOS. | |
707 | * | |
708 | * On systems that support the new iCRU service all we need to | |
709 | * do is call dmi_walk to get the supported flag value and skip | |
710 | * the old cru detect code. | |
2ec7ed67 | 711 | */ |
5efc7a62 TM |
712 | dmi_walk(dmi_find_icru, NULL); |
713 | if (!is_icru) { | |
714 | ||
715 | /* | |
716 | * We need to map the ROM to get the CRU service. | |
717 | * For 32 bit Operating Systems we need to go through the 32 Bit | |
718 | * BIOS Service Directory | |
719 | * For 64 bit Operating Systems we get that service through SMBIOS. | |
720 | */ | |
721 | retval = detect_cru_service(); | |
722 | if (retval < 0) { | |
723 | dev_warn(&dev->dev, | |
724 | "Unable to detect the %d Bit CRU Service.\n", | |
725 | HPWDT_ARCH); | |
726 | return retval; | |
727 | } | |
2ec7ed67 | 728 | |
5efc7a62 TM |
729 | /* |
730 | * We know this is the only CRU call we need to make so lets keep as | |
731 | * few instructions as possible once the NMI comes in. | |
732 | */ | |
733 | cmn_regs.u1.rah = 0x0D; | |
734 | cmn_regs.u1.ral = 0x02; | |
735 | } | |
2ec7ed67 | 736 | |
737 | /* | |
738 | * If the priority is set to 1, then we will be put first on the | |
739 | * die notify list to handle a critical NMI. The default is to | |
740 | * be last so other users of the NMI signal can function. | |
741 | */ | |
742 | if (priority) | |
743 | die_notifier.priority = 0x7FFFFFFF; | |
744 | ||
745 | retval = register_die_notifier(&die_notifier); | |
746 | if (retval != 0) { | |
747 | dev_warn(&dev->dev, | |
748 | "Unable to register a die notifier (err=%d).\n", | |
749 | retval); | |
750 | if (cru_rom_addr) | |
751 | iounmap(cru_rom_addr); | |
752 | } | |
753 | ||
754 | dev_info(&dev->dev, | |
755 | "HP Watchdog Timer Driver: NMI decoding initialized" | |
756 | ", allow kernel dump: %s (default = 0/OFF)" | |
757 | ", priority: %s (default = 0/LAST).\n", | |
758 | (allow_kdump == 0) ? "OFF" : "ON", | |
759 | (priority == 0) ? "LAST" : "FIRST"); | |
760 | return 0; | |
761 | } | |
762 | ||
b77b7088 | 763 | static void hpwdt_exit_nmi_decoding(void) |
2ec7ed67 | 764 | { |
765 | unregister_die_notifier(&die_notifier); | |
766 | if (cru_rom_addr) | |
767 | iounmap(cru_rom_addr); | |
768 | } | |
86ded1f3 | 769 | #else /* !CONFIG_HPWDT_NMI_DECODING */ |
770 | static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev) | |
771 | { | |
772 | } | |
773 | ||
774 | static int __devinit hpwdt_init_nmi_decoding(struct pci_dev *dev) | |
775 | { | |
776 | return 0; | |
777 | } | |
778 | ||
b77b7088 | 779 | static void hpwdt_exit_nmi_decoding(void) |
86ded1f3 | 780 | { |
781 | } | |
782 | #endif /* CONFIG_HPWDT_NMI_DECODING */ | |
47bece87 | 783 | |
7f4da474 | 784 | static int __devinit hpwdt_init_one(struct pci_dev *dev, |
ab4ba3cd | 785 | const struct pci_device_id *ent) |
7f4da474 TM |
786 | { |
787 | int retval; | |
788 | ||
47bece87 | 789 | /* |
34572b29 | 790 | * Check if we can do NMI decoding or not |
47bece87 | 791 | */ |
34572b29 | 792 | hpwdt_check_nmi_decoding(dev); |
47bece87 | 793 | |
7f4da474 | 794 | /* |
36e3ff44 | 795 | * First let's find out if we are on an iLO2+ server. We will |
7f4da474 | 796 | * not run on a legacy ASM box. |
ab4ba3cd | 797 | * So we only support the G5 ProLiant servers and higher. |
7f4da474 TM |
798 | */ |
799 | if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) { | |
800 | dev_warn(&dev->dev, | |
36e3ff44 | 801 | "This server does not have an iLO2+ ASIC.\n"); |
7f4da474 TM |
802 | return -ENODEV; |
803 | } | |
804 | ||
805 | if (pci_enable_device(dev)) { | |
806 | dev_warn(&dev->dev, | |
807 | "Not possible to enable PCI Device: 0x%x:0x%x.\n", | |
808 | ent->vendor, ent->device); | |
809 | return -ENODEV; | |
810 | } | |
811 | ||
812 | pci_mem_addr = pci_iomap(dev, 1, 0x80); | |
813 | if (!pci_mem_addr) { | |
814 | dev_warn(&dev->dev, | |
36e3ff44 | 815 | "Unable to detect the iLO2+ server memory.\n"); |
7f4da474 TM |
816 | retval = -ENOMEM; |
817 | goto error_pci_iomap; | |
818 | } | |
819 | hpwdt_timer_reg = pci_mem_addr + 0x70; | |
820 | hpwdt_timer_con = pci_mem_addr + 0x72; | |
821 | ||
822 | /* Make sure that we have a valid soft_margin */ | |
823 | if (hpwdt_change_timer(soft_margin)) | |
824 | hpwdt_change_timer(DEFAULT_MARGIN); | |
825 | ||
2ec7ed67 | 826 | /* Initialize NMI Decoding functionality */ |
827 | retval = hpwdt_init_nmi_decoding(dev); | |
828 | if (retval != 0) | |
829 | goto error_init_nmi_decoding; | |
7f4da474 TM |
830 | |
831 | retval = misc_register(&hpwdt_miscdev); | |
832 | if (retval < 0) { | |
833 | dev_warn(&dev->dev, | |
834 | "Unable to register miscdev on minor=%d (err=%d).\n", | |
835 | WATCHDOG_MINOR, retval); | |
836 | goto error_misc_register; | |
837 | } | |
838 | ||
2ec7ed67 | 839 | dev_info(&dev->dev, "HP Watchdog Timer Driver: %s" |
840 | ", timer margin: %d seconds (nowayout=%d).\n", | |
841 | HPWDT_VERSION, soft_margin, nowayout); | |
7f4da474 TM |
842 | return 0; |
843 | ||
844 | error_misc_register: | |
2ec7ed67 | 845 | hpwdt_exit_nmi_decoding(); |
846 | error_init_nmi_decoding: | |
7f4da474 TM |
847 | pci_iounmap(dev, pci_mem_addr); |
848 | error_pci_iomap: | |
849 | pci_disable_device(dev); | |
850 | return retval; | |
851 | } | |
852 | ||
853 | static void __devexit hpwdt_exit(struct pci_dev *dev) | |
854 | { | |
855 | if (!nowayout) | |
856 | hpwdt_stop(); | |
857 | ||
858 | misc_deregister(&hpwdt_miscdev); | |
2ec7ed67 | 859 | hpwdt_exit_nmi_decoding(); |
7f4da474 TM |
860 | pci_iounmap(dev, pci_mem_addr); |
861 | pci_disable_device(dev); | |
862 | } | |
863 | ||
864 | static struct pci_driver hpwdt_driver = { | |
865 | .name = "hpwdt", | |
866 | .id_table = hpwdt_devices, | |
867 | .probe = hpwdt_init_one, | |
868 | .remove = __devexit_p(hpwdt_exit), | |
869 | }; | |
870 | ||
871 | static void __exit hpwdt_cleanup(void) | |
872 | { | |
873 | pci_unregister_driver(&hpwdt_driver); | |
874 | } | |
875 | ||
876 | static int __init hpwdt_init(void) | |
877 | { | |
878 | return pci_register_driver(&hpwdt_driver); | |
879 | } | |
880 | ||
881 | MODULE_AUTHOR("Tom Mingarelli"); | |
882 | MODULE_DESCRIPTION("hp watchdog driver"); | |
883 | MODULE_LICENSE("GPL"); | |
d8100c3a | 884 | MODULE_VERSION(HPWDT_VERSION); |
7f4da474 TM |
885 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); |
886 | ||
887 | module_param(soft_margin, int, 0); | |
888 | MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds"); | |
889 | ||
890 | module_param(nowayout, int, 0); | |
891 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" | |
892 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
893 | ||
86ded1f3 | 894 | #ifdef CONFIG_HPWDT_NMI_DECODING |
550d299e | 895 | module_param(allow_kdump, int, 0); |
896 | MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs"); | |
897 | ||
44df7535 TM |
898 | module_param(priority, int, 0); |
899 | MODULE_PARM_DESC(priority, "The hpwdt driver handles NMIs first or last" | |
900 | " (default = 0/Last)\n"); | |
86ded1f3 | 901 | #endif /* !CONFIG_HPWDT_NMI_DECODING */ |
44df7535 | 902 | |
7f4da474 TM |
903 | module_init(hpwdt_init); |
904 | module_exit(hpwdt_cleanup); |