[linux-2.6-block.git] / drivers / watchdog / bcm7038_wdt.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2015 Broadcom Corporation
 *
 */

#include <linux/clk.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/platform_data/bcm7038_wdt.h>
#include <linux/pm.h>
#include <linux/watchdog.h>

#define WDT_START_1		0xff00
#define WDT_START_2		0x00ff
#define WDT_STOP_1		0xee00
#define WDT_STOP_2		0x00ee

#define WDT_TIMEOUT_REG		0x0
#define WDT_CMD_REG		0x4

#define WDT_MIN_TIMEOUT		1 /* seconds */
#define WDT_DEFAULT_TIMEOUT	30 /* seconds */
#define WDT_DEFAULT_RATE	27000000

struct bcm7038_watchdog {
	void __iomem		*base;
	struct watchdog_device	wdd;
	u32			rate;
	struct clk		*clk;
};

static bool nowayout = WATCHDOG_NOWAYOUT;

static inline void bcm7038_wdt_write(u32 value, void __iomem *addr)
{
	/* MIPS chips strapped for BE will automagically configure the
	 * peripheral registers for CPU-native byte order.
	 */
	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
		__raw_writel(value, addr);
	else
		writel_relaxed(value, addr);
}

static inline u32 bcm7038_wdt_read(void __iomem *addr)
{
	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
		return __raw_readl(addr);
	else
		return readl_relaxed(addr);
}

static void bcm7038_wdt_set_timeout_reg(struct watchdog_device *wdog)
{
	struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
	u32 timeout;

	timeout = wdt->rate * wdog->timeout;

	bcm7038_wdt_write(timeout, wdt->base + WDT_TIMEOUT_REG);
}

static int bcm7038_wdt_ping(struct watchdog_device *wdog)
{
	struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);

	bcm7038_wdt_write(WDT_START_1, wdt->base + WDT_CMD_REG);
	bcm7038_wdt_write(WDT_START_2, wdt->base + WDT_CMD_REG);

	return 0;
}

static int bcm7038_wdt_start(struct watchdog_device *wdog)
{
	bcm7038_wdt_set_timeout_reg(wdog);
	bcm7038_wdt_ping(wdog);

	return 0;
}

static int bcm7038_wdt_stop(struct watchdog_device *wdog)
{
	struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);

	bcm7038_wdt_write(WDT_STOP_1, wdt->base + WDT_CMD_REG);
	bcm7038_wdt_write(WDT_STOP_2, wdt->base + WDT_CMD_REG);

	return 0;
}

static int bcm7038_wdt_set_timeout(struct watchdog_device *wdog,
				   unsigned int t)
{
	/* Can't modify timeout value if watchdog timer is running */
	bcm7038_wdt_stop(wdog);
	wdog->timeout = t;
	bcm7038_wdt_start(wdog);

	return 0;
}

static unsigned int bcm7038_wdt_get_timeleft(struct watchdog_device *wdog)
{
	struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
	u32 time_left;

	time_left = bcm7038_wdt_read(wdt->base + WDT_CMD_REG);

	return time_left / wdt->rate;
}

static const struct watchdog_info bcm7038_wdt_info = {
	.identity	= "Broadcom BCM7038 Watchdog Timer",
	.options	= WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
				WDIOF_MAGICCLOSE
};

static const struct watchdog_ops bcm7038_wdt_ops = {
	.owner		= THIS_MODULE,
	.start		= bcm7038_wdt_start,
	.stop		= bcm7038_wdt_stop,
	.set_timeout	= bcm7038_wdt_set_timeout,
	.get_timeleft	= bcm7038_wdt_get_timeleft,
};

static void bcm7038_clk_disable_unprepare(void *data)
{
	clk_disable_unprepare(data);
}

static int bcm7038_wdt_probe(struct platform_device *pdev)
{
	struct bcm7038_wdt_platform_data *pdata = pdev->dev.platform_data;
	struct device *dev = &pdev->dev;
	struct bcm7038_watchdog *wdt;
	const char *clk_name = NULL;
	int err;

	wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
	if (!wdt)
		return -ENOMEM;

	platform_set_drvdata(pdev, wdt);

	wdt->base = devm_platform_ioremap_resource(pdev, 0);
	if (IS_ERR(wdt->base))
		return PTR_ERR(wdt->base);

	if (pdata && pdata->clk_name)
		clk_name = pdata->clk_name;

	wdt->clk = devm_clk_get(dev, clk_name);
	/* If unable to get clock, use default frequency */
	if (!IS_ERR(wdt->clk)) {
		err = clk_prepare_enable(wdt->clk);
		if (err)
			return err;
		err = devm_add_action_or_reset(dev,
					       bcm7038_clk_disable_unprepare,
					       wdt->clk);
		if (err)
			return err;
		wdt->rate = clk_get_rate(wdt->clk);
		/* Prevent divide-by-zero exception */
		if (!wdt->rate)
			wdt->rate = WDT_DEFAULT_RATE;
	} else {
		wdt->rate = WDT_DEFAULT_RATE;
		wdt->clk = NULL;
	}

	wdt->wdd.info		= &bcm7038_wdt_info;
	wdt->wdd.ops		= &bcm7038_wdt_ops;
	wdt->wdd.min_timeout	= WDT_MIN_TIMEOUT;
	wdt->wdd.timeout	= WDT_DEFAULT_TIMEOUT;
	wdt->wdd.max_timeout	= 0xffffffff / wdt->rate;
	wdt->wdd.parent		= dev;
	watchdog_set_drvdata(&wdt->wdd, wdt);

	watchdog_stop_on_reboot(&wdt->wdd);
	watchdog_stop_on_unregister(&wdt->wdd);
	err = devm_watchdog_register_device(dev, &wdt->wdd);
	if (err)
		return err;

	dev_info(dev, "Registered BCM7038 Watchdog\n");

	return 0;
}

#ifdef CONFIG_PM_SLEEP
static int bcm7038_wdt_suspend(struct device *dev)
{
	struct bcm7038_watchdog *wdt = dev_get_drvdata(dev);

	if (watchdog_active(&wdt->wdd))
		return bcm7038_wdt_stop(&wdt->wdd);

	return 0;
}

static int bcm7038_wdt_resume(struct device *dev)
{
	struct bcm7038_watchdog *wdt = dev_get_drvdata(dev);

	if (watchdog_active(&wdt->wdd))
		return bcm7038_wdt_start(&wdt->wdd);

	return 0;
}
#endif

static SIMPLE_DEV_PM_OPS(bcm7038_wdt_pm_ops, bcm7038_wdt_suspend,
			 bcm7038_wdt_resume);

static const struct of_device_id bcm7038_wdt_match[] = {
	{ .compatible = "brcm,bcm6345-wdt" },
	{ .compatible = "brcm,bcm7038-wdt" },
	{},
};
MODULE_DEVICE_TABLE(of, bcm7038_wdt_match);

static const struct platform_device_id bcm7038_wdt_devtype[] = {
	{ .name = "bcm63xx-wdt" },
	{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(platform, bcm7038_wdt_devtype);

static struct platform_driver bcm7038_wdt_driver = {
	.probe		= bcm7038_wdt_probe,
	.id_table	= bcm7038_wdt_devtype,
	.driver		= {
		.name		= "bcm7038-wdt",
		.of_match_table	= bcm7038_wdt_match,
		.pm		= &bcm7038_wdt_pm_ops,
	}
};
module_platform_driver(bcm7038_wdt_driver);

module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Driver for Broadcom 7038 SoCs Watchdog");
MODULE_AUTHOR("Justin Chen");
Commit	Line	Data
2e62c498	1	// SPDX-License-Identifier: GPL-2.0+
7a3629fe JC	2	/*
	3	* Copyright (C) 2015 Broadcom Corporation
	4	*
7a3629fe JC	5	*/
	6
	7	#include <linux/clk.h>
	8	#include <linux/init.h>
	9	#include <linux/io.h>
	10	#include <linux/module.h>
	11	#include <linux/of.h>
	12	#include <linux/platform_device.h>
d6b9c679	13	#include <linux/platform_data/bcm7038_wdt.h>
7a3629fe JC	14	#include <linux/pm.h>
	15	#include <linux/watchdog.h>
	16
	17	#define WDT_START_1 0xff00
	18	#define WDT_START_2 0x00ff
	19	#define WDT_STOP_1 0xee00
	20	#define WDT_STOP_2 0x00ee
	21
	22	#define WDT_TIMEOUT_REG 0x0
	23	#define WDT_CMD_REG 0x4
	24
	25	#define WDT_MIN_TIMEOUT 1 /* seconds */
	26	#define WDT_DEFAULT_TIMEOUT 30 /* seconds */
	27	#define WDT_DEFAULT_RATE 27000000
	28
	29	struct bcm7038_watchdog {
	30	void __iomem *base;
	31	struct watchdog_device wdd;
	32	u32 rate;
	33	struct clk *clk;
	34	};
	35
	36	static bool nowayout = WATCHDOG_NOWAYOUT;
	37
e379c219 ÁFR	38	static inline void bcm7038_wdt_write(u32 value, void __iomem *addr)
	39	{
	40	/* MIPS chips strapped for BE will automagically configure the
	41	* peripheral registers for CPU-native byte order.
	42	*/
	43	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
	44	__raw_writel(value, addr);
	45	else
	46	writel_relaxed(value, addr);
	47	}
	48
	49	static inline u32 bcm7038_wdt_read(void __iomem *addr)
	50	{
	51	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
	52	return __raw_readl(addr);
	53	else
	54	return readl_relaxed(addr);
	55	}
	56
7a3629fe JC	57	static void bcm7038_wdt_set_timeout_reg(struct watchdog_device *wdog)
	58	{
	59	struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
	60	u32 timeout;
	61
	62	timeout = wdt->rate * wdog->timeout;
	63
e379c219	64	bcm7038_wdt_write(timeout, wdt->base + WDT_TIMEOUT_REG);
7a3629fe JC	65	}
	66
	67	static int bcm7038_wdt_ping(struct watchdog_device *wdog)
	68	{
	69	struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
	70
e379c219 ÁFR	71	bcm7038_wdt_write(WDT_START_1, wdt->base + WDT_CMD_REG);
e379c219 ÁFR	72	bcm7038_wdt_write(WDT_START_2, wdt->base + WDT_CMD_REG);
7a3629fe JC	73
	74	return 0;
	75	}
	76
	77	static int bcm7038_wdt_start(struct watchdog_device *wdog)
	78	{
	79	bcm7038_wdt_set_timeout_reg(wdog);
	80	bcm7038_wdt_ping(wdog);
	81
	82	return 0;
	83	}
	84
	85	static int bcm7038_wdt_stop(struct watchdog_device *wdog)
	86	{
	87	struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
	88
e379c219 ÁFR	89	bcm7038_wdt_write(WDT_STOP_1, wdt->base + WDT_CMD_REG);
e379c219 ÁFR	90	bcm7038_wdt_write(WDT_STOP_2, wdt->base + WDT_CMD_REG);
7a3629fe JC	91
	92	return 0;
	93	}
	94
	95	static int bcm7038_wdt_set_timeout(struct watchdog_device *wdog,
	96	unsigned int t)
	97	{
	98	/* Can't modify timeout value if watchdog timer is running */
	99	bcm7038_wdt_stop(wdog);
	100	wdog->timeout = t;
	101	bcm7038_wdt_start(wdog);
	102
	103	return 0;
	104	}
	105
	106	static unsigned int bcm7038_wdt_get_timeleft(struct watchdog_device *wdog)
	107	{
	108	struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
	109	u32 time_left;
	110
e379c219	111	time_left = bcm7038_wdt_read(wdt->base + WDT_CMD_REG);
7a3629fe JC	112
	113	return time_left / wdt->rate;
	114	}
	115
6c368932	116	static const struct watchdog_info bcm7038_wdt_info = {
7a3629fe JC	117	.identity = "Broadcom BCM7038 Watchdog Timer",
	118	.options = WDIOF_SETTIMEOUT \| WDIOF_KEEPALIVEPING \|
	119	WDIOF_MAGICCLOSE
	120	};
	121
85f15cfc	122	static const struct watchdog_ops bcm7038_wdt_ops = {
7a3629fe JC	123	.owner = THIS_MODULE,
	124	.start = bcm7038_wdt_start,
	125	.stop = bcm7038_wdt_stop,
	126	.set_timeout = bcm7038_wdt_set_timeout,
	127	.get_timeleft = bcm7038_wdt_get_timeleft,
	128	};
	129
69656dcd GR	130	static void bcm7038_clk_disable_unprepare(void *data)
	131	{
	132	clk_disable_unprepare(data);
	133	}
	134
7a3629fe JC	135	static int bcm7038_wdt_probe(struct platform_device *pdev)
7a3629fe JC	136	{
d6b9c679	137	struct bcm7038_wdt_platform_data *pdata = pdev->dev.platform_data;
7a3629fe JC	138	struct device *dev = &pdev->dev;
7a3629fe JC	139	struct bcm7038_watchdog *wdt;
d6b9c679	140	const char *clk_name = NULL;
7a3629fe JC	141	int err;
	142
	143	wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
	144	if (!wdt)
	145	return -ENOMEM;
	146
	147	platform_set_drvdata(pdev, wdt);
	148
0f0a6a28	149	wdt->base = devm_platform_ioremap_resource(pdev, 0);
7a3629fe JC	150	if (IS_ERR(wdt->base))
	151	return PTR_ERR(wdt->base);
	152
d6b9c679 FF	153	if (pdata && pdata->clk_name)
	154	clk_name = pdata->clk_name;
	155
	156	wdt->clk = devm_clk_get(dev, clk_name);
7a3629fe JC	157	/* If unable to get clock, use default frequency */
7a3629fe JC	158	if (!IS_ERR(wdt->clk)) {
dd0a18ca	159	err = clk_prepare_enable(wdt->clk);
69656dcd GR	160	if (err)
	161	return err;
	162	err = devm_add_action_or_reset(dev,
	163	bcm7038_clk_disable_unprepare,
	164	wdt->clk);
dd0a18ca FE	165	if (err)
dd0a18ca FE	166	return err;
7a3629fe JC	167	wdt->rate = clk_get_rate(wdt->clk);
	168	/* Prevent divide-by-zero exception */
	169	if (!wdt->rate)
	170	wdt->rate = WDT_DEFAULT_RATE;
	171	} else {
	172	wdt->rate = WDT_DEFAULT_RATE;
	173	wdt->clk = NULL;
	174	}
	175
	176	wdt->wdd.info = &bcm7038_wdt_info;
	177	wdt->wdd.ops = &bcm7038_wdt_ops;
	178	wdt->wdd.min_timeout = WDT_MIN_TIMEOUT;
	179	wdt->wdd.timeout = WDT_DEFAULT_TIMEOUT;
	180	wdt->wdd.max_timeout = 0xffffffff / wdt->rate;
	181	wdt->wdd.parent = dev;
	182	watchdog_set_drvdata(&wdt->wdd, wdt);
	183
69656dcd GR	184	watchdog_stop_on_reboot(&wdt->wdd);
	185	watchdog_stop_on_unregister(&wdt->wdd);
	186	err = devm_watchdog_register_device(dev, &wdt->wdd);
f5429895	187	if (err)
7a3629fe	188	return err;
7a3629fe JC	189
	190	dev_info(dev, "Registered BCM7038 Watchdog\n");
	191
	192	return 0;
	193	}
	194
7a3629fe JC	195	#ifdef CONFIG_PM_SLEEP
	196	static int bcm7038_wdt_suspend(struct device *dev)
	197	{
	198	struct bcm7038_watchdog *wdt = dev_get_drvdata(dev);
	199
	200	if (watchdog_active(&wdt->wdd))
	201	return bcm7038_wdt_stop(&wdt->wdd);
	202
	203	return 0;
	204	}
	205
	206	static int bcm7038_wdt_resume(struct device *dev)
	207	{
	208	struct bcm7038_watchdog *wdt = dev_get_drvdata(dev);
	209
	210	if (watchdog_active(&wdt->wdd))
	211	return bcm7038_wdt_start(&wdt->wdd);
	212
	213	return 0;
	214	}
	215	#endif
	216
	217	static SIMPLE_DEV_PM_OPS(bcm7038_wdt_pm_ops, bcm7038_wdt_suspend,
	218	bcm7038_wdt_resume);
	219
7a3629fe	220	static const struct of_device_id bcm7038_wdt_match[] = {
2dd441f1	221	{ .compatible = "brcm,bcm6345-wdt" },
7a3629fe JC	222	{ .compatible = "brcm,bcm7038-wdt" },
	223	{},
	224	};
57d77c62	225	MODULE_DEVICE_TABLE(of, bcm7038_wdt_match);
7a3629fe	226
e764faef FF	227	static const struct platform_device_id bcm7038_wdt_devtype[] = {
	228	{ .name = "bcm63xx-wdt" },
	229	{ /* sentinel */ },
	230	};
	231	MODULE_DEVICE_TABLE(platform, bcm7038_wdt_devtype);
	232
7a3629fe JC	233	static struct platform_driver bcm7038_wdt_driver = {
7a3629fe JC	234	.probe = bcm7038_wdt_probe,
e764faef	235	.id_table = bcm7038_wdt_devtype,
7a3629fe JC	236	.driver = {
	237	.name = "bcm7038-wdt",
	238	.of_match_table = bcm7038_wdt_match,
	239	.pm = &bcm7038_wdt_pm_ops,
	240	}
	241	};
	242	module_platform_driver(bcm7038_wdt_driver);
	243
	244	module_param(nowayout, bool, 0);
	245	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
	246	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
2e62c498	247	MODULE_LICENSE("GPL");
7a3629fe JC	248	MODULE_DESCRIPTION("Driver for Broadcom 7038 SoCs Watchdog");
7a3629fe JC	249	MODULE_AUTHOR("Justin Chen");