[linux-2.6-block.git] / drivers / watchdog / bcm2835_wdt.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Watchdog driver for Broadcom BCM2835
 *
 * "bcm2708_wdog" driver written by Luke Diamand that was obtained from
 * branch "rpi-3.6.y" of git://github.com/raspberrypi/linux.git was used
 * as a hardware reference for the Broadcom BCM2835 watchdog timer.
 *
 * Copyright (C) 2013 Lubomir Rintel <lkundrak@v3.sk>
 *
 */

#include <linux/delay.h>
#include <linux/types.h>
#include <linux/mfd/bcm2835-pm.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/watchdog.h>
#include <linux/platform_device.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>

#define PM_RSTC				0x1c
#define PM_RSTS				0x20
#define PM_WDOG				0x24

#define PM_PASSWORD			0x5a000000

#define PM_WDOG_TIME_SET		0x000fffff
#define PM_RSTC_WRCFG_CLR		0xffffffcf
#define PM_RSTS_HADWRH_SET		0x00000040
#define PM_RSTC_WRCFG_SET		0x00000030
#define PM_RSTC_WRCFG_FULL_RESET	0x00000020
#define PM_RSTC_RESET			0x00000102

/*
 * The Raspberry Pi firmware uses the RSTS register to know which partition
 * to boot from. The partition value is spread into bits 0, 2, 4, 6, 8, 10.
 * Partition 63 is a special partition used by the firmware to indicate halt.
 */
#define PM_RSTS_RASPBERRYPI_HALT	0x555

#define SECS_TO_WDOG_TICKS(x) ((x) << 16)
#define WDOG_TICKS_TO_SECS(x) ((x) >> 16)

struct bcm2835_wdt {
	void __iomem		*base;
	spinlock_t		lock;
};

static struct bcm2835_wdt *bcm2835_power_off_wdt;

static unsigned int heartbeat;
static bool nowayout = WATCHDOG_NOWAYOUT;

static bool bcm2835_wdt_is_running(struct bcm2835_wdt *wdt)
{
	uint32_t cur;

	cur = readl(wdt->base + PM_RSTC);

	return !!(cur & PM_RSTC_WRCFG_FULL_RESET);
}

static int bcm2835_wdt_start(struct watchdog_device *wdog)
{
	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	uint32_t cur;
	unsigned long flags;

	spin_lock_irqsave(&wdt->lock, flags);

	writel_relaxed(PM_PASSWORD | (SECS_TO_WDOG_TICKS(wdog->timeout) &
				PM_WDOG_TIME_SET), wdt->base + PM_WDOG);
	cur = readl_relaxed(wdt->base + PM_RSTC);
	writel_relaxed(PM_PASSWORD | (cur & PM_RSTC_WRCFG_CLR) |
		  PM_RSTC_WRCFG_FULL_RESET, wdt->base + PM_RSTC);

	spin_unlock_irqrestore(&wdt->lock, flags);

	return 0;
}

static int bcm2835_wdt_stop(struct watchdog_device *wdog)
{
	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);

	writel_relaxed(PM_PASSWORD | PM_RSTC_RESET, wdt->base + PM_RSTC);
	return 0;
}

static unsigned int bcm2835_wdt_get_timeleft(struct watchdog_device *wdog)
{
	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);

	uint32_t ret = readl_relaxed(wdt->base + PM_WDOG);
	return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
}

static void __bcm2835_restart(struct bcm2835_wdt *wdt)
{
	u32 val;

	/* use a timeout of 10 ticks (~150us) */
	writel_relaxed(10 | PM_PASSWORD, wdt->base + PM_WDOG);
	val = readl_relaxed(wdt->base + PM_RSTC);
	val &= PM_RSTC_WRCFG_CLR;
	val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET;
	writel_relaxed(val, wdt->base + PM_RSTC);

	/* No sleeping, possibly atomic. */
	mdelay(1);
}

static int bcm2835_restart(struct watchdog_device *wdog,
			   unsigned long action, void *data)
{
	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);

	__bcm2835_restart(wdt);

	return 0;
}

static const struct watchdog_ops bcm2835_wdt_ops = {
	.owner =	THIS_MODULE,
	.start =	bcm2835_wdt_start,
	.stop =		bcm2835_wdt_stop,
	.get_timeleft =	bcm2835_wdt_get_timeleft,
	.restart =	bcm2835_restart,
};

static const struct watchdog_info bcm2835_wdt_info = {
	.options =	WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE |
			WDIOF_KEEPALIVEPING,
	.identity =	"Broadcom BCM2835 Watchdog timer",
};

static struct watchdog_device bcm2835_wdt_wdd = {
	.info =		&bcm2835_wdt_info,
	.ops =		&bcm2835_wdt_ops,
	.min_timeout =	1,
	.max_timeout =	WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
	.timeout =	WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
};

/*
 * We can't really power off, but if we do the normal reset scheme, and
 * indicate to bootcode.bin not to reboot, then most of the chip will be
 * powered off.
 */
static void bcm2835_power_off(void)
{
	struct bcm2835_wdt *wdt = bcm2835_power_off_wdt;
	u32 val;

	/*
	 * We set the watchdog hard reset bit here to distinguish this reset
	 * from the normal (full) reset. bootcode.bin will not reboot after a
	 * hard reset.
	 */
	val = readl_relaxed(wdt->base + PM_RSTS);
	val |= PM_PASSWORD | PM_RSTS_RASPBERRYPI_HALT;
	writel_relaxed(val, wdt->base + PM_RSTS);

	/* Continue with normal reset mechanism */
	__bcm2835_restart(wdt);
}

static int bcm2835_wdt_probe(struct platform_device *pdev)
{
	struct bcm2835_pm *pm = dev_get_drvdata(pdev->dev.parent);
	struct device *dev = &pdev->dev;
	struct bcm2835_wdt *wdt;
	int err;

	wdt = devm_kzalloc(dev, sizeof(struct bcm2835_wdt), GFP_KERNEL);
	if (!wdt)
		return -ENOMEM;

	spin_lock_init(&wdt->lock);

	wdt->base = pm->base;

	watchdog_set_drvdata(&bcm2835_wdt_wdd, wdt);
	watchdog_init_timeout(&bcm2835_wdt_wdd, heartbeat, dev);
	watchdog_set_nowayout(&bcm2835_wdt_wdd, nowayout);
	bcm2835_wdt_wdd.parent = dev;
	if (bcm2835_wdt_is_running(wdt)) {
		/*
		 * The currently active timeout value (set by the
		 * bootloader) may be different from the module
		 * heartbeat parameter or the value in device
		 * tree. But we just need to set WDOG_HW_RUNNING,
		 * because then the framework will "immediately" ping
		 * the device, updating the timeout.
		 */
		set_bit(WDOG_HW_RUNNING, &bcm2835_wdt_wdd.status);
	}

	watchdog_set_restart_priority(&bcm2835_wdt_wdd, 128);

	watchdog_stop_on_reboot(&bcm2835_wdt_wdd);
	err = devm_watchdog_register_device(dev, &bcm2835_wdt_wdd);
	if (err)
		return err;

	if (pm_power_off == NULL) {
		pm_power_off = bcm2835_power_off;
		bcm2835_power_off_wdt = wdt;
	}

	dev_info(dev, "Broadcom BCM2835 watchdog timer");
	return 0;
}

static int bcm2835_wdt_remove(struct platform_device *pdev)
{
	if (pm_power_off == bcm2835_power_off)
		pm_power_off = NULL;

	return 0;
}

static struct platform_driver bcm2835_wdt_driver = {
	.probe		= bcm2835_wdt_probe,
	.remove		= bcm2835_wdt_remove,
	.driver = {
		.name =		"bcm2835-wdt",
	},
};
module_platform_driver(bcm2835_wdt_driver);

module_param(heartbeat, uint, 0);
MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");

module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
				__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

MODULE_ALIAS("platform:bcm2835-wdt");
MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
MODULE_DESCRIPTION("Driver for Broadcom BCM2835 watchdog timer");
MODULE_LICENSE("GPL");
Commit	Line	Data
2e62c498	1	// SPDX-License-Identifier: GPL-2.0+
938d0a84 LR	2	/*
	3	* Watchdog driver for Broadcom BCM2835
	4	*
	5	* "bcm2708_wdog" driver written by Luke Diamand that was obtained from
	6	* branch "rpi-3.6.y" of git://github.com/raspberrypi/linux.git was used
	7	* as a hardware reference for the Broadcom BCM2835 watchdog timer.
	8	*
	9	* Copyright (C) 2013 Lubomir Rintel <lkundrak@v3.sk>
	10	*
938d0a84 LR	11	*/
938d0a84 LR	12
33a9f5bc	13	#include <linux/delay.h>
938d0a84	14	#include <linux/types.h>
5e6acc3e	15	#include <linux/mfd/bcm2835-pm.h>
938d0a84 LR	16	#include <linux/module.h>
	17	#include <linux/io.h>
	18	#include <linux/watchdog.h>
	19	#include <linux/platform_device.h>
	20	#include <linux/of_address.h>
33a9f5bc	21	#include <linux/of_platform.h>
938d0a84 LR	22
938d0a84 LR	23	#define PM_RSTC 0x1c
33a9f5bc	24	#define PM_RSTS 0x20
938d0a84 LR	25	#define PM_WDOG 0x24
	26
	27	#define PM_PASSWORD 0x5a000000
	28
	29	#define PM_WDOG_TIME_SET 0x000fffff
	30	#define PM_RSTC_WRCFG_CLR 0xffffffcf
33a9f5bc	31	#define PM_RSTS_HADWRH_SET 0x00000040
938d0a84 LR	32	#define PM_RSTC_WRCFG_SET 0x00000030
	33	#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
	34	#define PM_RSTC_RESET 0x00000102
	35
898e6861	36	/*
8ab102d6 MY	37	* The Raspberry Pi firmware uses the RSTS register to know which partition
	38	* to boot from. The partition value is spread into bits 0, 2, 4, 6, 8, 10.
	39	* Partition 63 is a special partition used by the firmware to indicate halt.
898e6861 NT	40	*/
	41	#define PM_RSTS_RASPBERRYPI_HALT 0x555
	42
938d0a84 LR	43	#define SECS_TO_WDOG_TICKS(x) ((x) << 16)
	44	#define WDOG_TICKS_TO_SECS(x) ((x) >> 16)
	45
	46	struct bcm2835_wdt {
	47	void __iomem *base;
	48	spinlock_t lock;
	49	};
	50
5e6acc3e EA	51	static struct bcm2835_wdt *bcm2835_power_off_wdt;
5e6acc3e EA	52
938d0a84 LR	53	static unsigned int heartbeat;
	54	static bool nowayout = WATCHDOG_NOWAYOUT;
	55
054ae194 RV	56	static bool bcm2835_wdt_is_running(struct bcm2835_wdt *wdt)
	57	{
	58	uint32_t cur;
	59
	60	cur = readl(wdt->base + PM_RSTC);
	61
	62	return !!(cur & PM_RSTC_WRCFG_FULL_RESET);
	63	}
	64
938d0a84 LR	65	static int bcm2835_wdt_start(struct watchdog_device *wdog)
	66	{
	67	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	68	uint32_t cur;
	69	unsigned long flags;
	70
	71	spin_lock_irqsave(&wdt->lock, flags);
	72
	73	writel_relaxed(PM_PASSWORD \| (SECS_TO_WDOG_TICKS(wdog->timeout) &
	74	PM_WDOG_TIME_SET), wdt->base + PM_WDOG);
	75	cur = readl_relaxed(wdt->base + PM_RSTC);
	76	writel_relaxed(PM_PASSWORD \| (cur & PM_RSTC_WRCFG_CLR) \|
	77	PM_RSTC_WRCFG_FULL_RESET, wdt->base + PM_RSTC);
	78
	79	spin_unlock_irqrestore(&wdt->lock, flags);
	80
	81	return 0;
	82	}
	83
	84	static int bcm2835_wdt_stop(struct watchdog_device *wdog)
	85	{
	86	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	87
	88	writel_relaxed(PM_PASSWORD \| PM_RSTC_RESET, wdt->base + PM_RSTC);
938d0a84 LR	89	return 0;
	90	}
	91
938d0a84 LR	92	static unsigned int bcm2835_wdt_get_timeleft(struct watchdog_device *wdog)
	93	{
	94	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	95
	96	uint32_t ret = readl_relaxed(wdt->base + PM_WDOG);
	97	return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
	98	}
	99
71e9b2f0 GR	100	static void __bcm2835_restart(struct bcm2835_wdt *wdt)
	101	{
	102	u32 val;
	103
	104	/* use a timeout of 10 ticks (~150us) */
	105	writel_relaxed(10 \| PM_PASSWORD, wdt->base + PM_WDOG);
	106	val = readl_relaxed(wdt->base + PM_RSTC);
	107	val &= PM_RSTC_WRCFG_CLR;
	108	val \|= PM_PASSWORD \| PM_RSTC_WRCFG_FULL_RESET;
	109	writel_relaxed(val, wdt->base + PM_RSTC);
	110
	111	/* No sleeping, possibly atomic. */
	112	mdelay(1);
	113	}
	114
	115	static int bcm2835_restart(struct watchdog_device *wdog,
	116	unsigned long action, void *data)
	117	{
	118	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	119
	120	__bcm2835_restart(wdt);
	121
	122	return 0;
	123	}
	124
aea4b477	125	static const struct watchdog_ops bcm2835_wdt_ops = {
938d0a84 LR	126	.owner = THIS_MODULE,
	127	.start = bcm2835_wdt_start,
	128	.stop = bcm2835_wdt_stop,
938d0a84	129	.get_timeleft = bcm2835_wdt_get_timeleft,
71e9b2f0	130	.restart = bcm2835_restart,
938d0a84 LR	131	};
938d0a84 LR	132
aea4b477	133	static const struct watchdog_info bcm2835_wdt_info = {
938d0a84 LR	134	.options = WDIOF_SETTIMEOUT \| WDIOF_MAGICCLOSE \|
	135	WDIOF_KEEPALIVEPING,
	136	.identity = "Broadcom BCM2835 Watchdog timer",
	137	};
	138
	139	static struct watchdog_device bcm2835_wdt_wdd = {
	140	.info = &bcm2835_wdt_info,
	141	.ops = &bcm2835_wdt_ops,
	142	.min_timeout = 1,
	143	.max_timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
	144	.timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
	145	};
	146
33a9f5bc EA	147	/*
	148	* We can't really power off, but if we do the normal reset scheme, and
	149	* indicate to bootcode.bin not to reboot, then most of the chip will be
	150	* powered off.
	151	*/
	152	static void bcm2835_power_off(void)
	153	{
5e6acc3e	154	struct bcm2835_wdt *wdt = bcm2835_power_off_wdt;
33a9f5bc EA	155	u32 val;
	156
	157	/*
	158	* We set the watchdog hard reset bit here to distinguish this reset
	159	* from the normal (full) reset. bootcode.bin will not reboot after a
	160	* hard reset.
	161	*/
	162	val = readl_relaxed(wdt->base + PM_RSTS);
898e6861	163	val \|= PM_PASSWORD \| PM_RSTS_RASPBERRYPI_HALT;
33a9f5bc EA	164	writel_relaxed(val, wdt->base + PM_RSTS);
	165
	166	/* Continue with normal reset mechanism */
71e9b2f0	167	__bcm2835_restart(wdt);
33a9f5bc EA	168	}
33a9f5bc EA	169
938d0a84 LR	170	static int bcm2835_wdt_probe(struct platform_device *pdev)
938d0a84 LR	171	{
5e6acc3e	172	struct bcm2835_pm *pm = dev_get_drvdata(pdev->dev.parent);
938d0a84	173	struct device *dev = &pdev->dev;
938d0a84 LR	174	struct bcm2835_wdt *wdt;
	175	int err;
	176
	177	wdt = devm_kzalloc(dev, sizeof(struct bcm2835_wdt), GFP_KERNEL);
8deea830	178	if (!wdt)
938d0a84	179	return -ENOMEM;
938d0a84 LR	180
	181	spin_lock_init(&wdt->lock);
	182
5e6acc3e	183	wdt->base = pm->base;
938d0a84 LR	184
	185	watchdog_set_drvdata(&bcm2835_wdt_wdd, wdt);
	186	watchdog_init_timeout(&bcm2835_wdt_wdd, heartbeat, dev);
	187	watchdog_set_nowayout(&bcm2835_wdt_wdd, nowayout);
5f5aa6f1	188	bcm2835_wdt_wdd.parent = dev;
054ae194 RV	189	if (bcm2835_wdt_is_running(wdt)) {
	190	/*
	191	* The currently active timeout value (set by the
	192	* bootloader) may be different from the module
	193	* heartbeat parameter or the value in device
	194	* tree. But we just need to set WDOG_HW_RUNNING,
	195	* because then the framework will "immediately" ping
	196	* the device, updating the timeout.
	197	*/
	198	set_bit(WDOG_HW_RUNNING, &bcm2835_wdt_wdd.status);
	199	}
71e9b2f0 GR	200
	201	watchdog_set_restart_priority(&bcm2835_wdt_wdd, 128);
	202
5f5aa6f1 GR	203	watchdog_stop_on_reboot(&bcm2835_wdt_wdd);
5f5aa6f1 GR	204	err = devm_watchdog_register_device(dev, &bcm2835_wdt_wdd);
d5f3e24f	205	if (err)
938d0a84	206	return err;
938d0a84	207
5e6acc3e	208	if (pm_power_off == NULL) {
33a9f5bc	209	pm_power_off = bcm2835_power_off;
5e6acc3e EA	210	bcm2835_power_off_wdt = wdt;
5e6acc3e EA	211	}
33a9f5bc	212
938d0a84 LR	213	dev_info(dev, "Broadcom BCM2835 watchdog timer");
	214	return 0;
	215	}
	216
	217	static int bcm2835_wdt_remove(struct platform_device *pdev)
	218	{
33a9f5bc EA	219	if (pm_power_off == bcm2835_power_off)
33a9f5bc EA	220	pm_power_off = NULL;
938d0a84 LR	221
	222	return 0;
	223	}
	224
938d0a84 LR	225	static struct platform_driver bcm2835_wdt_driver = {
	226	.probe = bcm2835_wdt_probe,
	227	.remove = bcm2835_wdt_remove,
938d0a84 LR	228	.driver = {
938d0a84 LR	229	.name = "bcm2835-wdt",
938d0a84 LR	230	},
	231	};
	232	module_platform_driver(bcm2835_wdt_driver);
	233
	234	module_param(heartbeat, uint, 0);
	235	MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");
	236
	237	module_param(nowayout, bool, 0);
	238	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
	239	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	240
215e06f0	241	MODULE_ALIAS("platform:bcm2835-wdt");
938d0a84 LR	242	MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
	243	MODULE_DESCRIPTION("Driver for Broadcom BCM2835 watchdog timer");
	244	MODULE_LICENSE("GPL");