[linux-2.6-block.git] / drivers / watchdog / bcm2835_wdt.c

/*
 * Watchdog driver for Broadcom BCM2835
 *
 * "bcm2708_wdog" driver written by Luke Diamand that was obtained from
 * branch "rpi-3.6.y" of git://github.com/raspberrypi/linux.git was used
 * as a hardware reference for the Broadcom BCM2835 watchdog timer.
 *
 * Copyright (C) 2013 Lubomir Rintel <lkundrak@v3.sk>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 */

#include <linux/delay.h>
#include <linux/reboot.h>
#include <linux/types.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/watchdog.h>
#include <linux/platform_device.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>

#define PM_RSTC				0x1c
#define PM_RSTS				0x20
#define PM_WDOG				0x24

#define PM_PASSWORD			0x5a000000

#define PM_WDOG_TIME_SET		0x000fffff
#define PM_RSTC_WRCFG_CLR		0xffffffcf
#define PM_RSTS_HADWRH_SET		0x00000040
#define PM_RSTC_WRCFG_SET		0x00000030
#define PM_RSTC_WRCFG_FULL_RESET	0x00000020
#define PM_RSTC_RESET			0x00000102

/*
 * The Raspberry Pi firmware uses the RSTS register to know which partiton
 * to boot from. The partiton value is spread into bits 0, 2, 4, 6, 8, 10.
 * Partiton 63 is a special partition used by the firmware to indicate halt.
 */
#define PM_RSTS_RASPBERRYPI_HALT	0x555

#define SECS_TO_WDOG_TICKS(x) ((x) << 16)
#define WDOG_TICKS_TO_SECS(x) ((x) >> 16)

struct bcm2835_wdt {
	void __iomem		*base;
	spinlock_t		lock;
	struct notifier_block	restart_handler;
};

static unsigned int heartbeat;
static bool nowayout = WATCHDOG_NOWAYOUT;

static int bcm2835_wdt_start(struct watchdog_device *wdog)
{
	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	uint32_t cur;
	unsigned long flags;

	spin_lock_irqsave(&wdt->lock, flags);

	writel_relaxed(PM_PASSWORD | (SECS_TO_WDOG_TICKS(wdog->timeout) &
				PM_WDOG_TIME_SET), wdt->base + PM_WDOG);
	cur = readl_relaxed(wdt->base + PM_RSTC);
	writel_relaxed(PM_PASSWORD | (cur & PM_RSTC_WRCFG_CLR) |
		  PM_RSTC_WRCFG_FULL_RESET, wdt->base + PM_RSTC);

	spin_unlock_irqrestore(&wdt->lock, flags);

	return 0;
}

static int bcm2835_wdt_stop(struct watchdog_device *wdog)
{
	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);

	writel_relaxed(PM_PASSWORD | PM_RSTC_RESET, wdt->base + PM_RSTC);
	return 0;
}

static int bcm2835_wdt_set_timeout(struct watchdog_device *wdog, unsigned int t)
{
	wdog->timeout = t;
	return 0;
}

static unsigned int bcm2835_wdt_get_timeleft(struct watchdog_device *wdog)
{
	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);

	uint32_t ret = readl_relaxed(wdt->base + PM_WDOG);
	return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
}

static struct watchdog_ops bcm2835_wdt_ops = {
	.owner =	THIS_MODULE,
	.start =	bcm2835_wdt_start,
	.stop =		bcm2835_wdt_stop,
	.set_timeout =	bcm2835_wdt_set_timeout,
	.get_timeleft =	bcm2835_wdt_get_timeleft,
};

static struct watchdog_info bcm2835_wdt_info = {
	.options =	WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE |
			WDIOF_KEEPALIVEPING,
	.identity =	"Broadcom BCM2835 Watchdog timer",
};

static struct watchdog_device bcm2835_wdt_wdd = {
	.info =		&bcm2835_wdt_info,
	.ops =		&bcm2835_wdt_ops,
	.min_timeout =	1,
	.max_timeout =	WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
	.timeout =	WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
};

static int
bcm2835_restart(struct notifier_block *this, unsigned long mode, void *cmd)
{
	struct bcm2835_wdt *wdt = container_of(this, struct bcm2835_wdt,
					       restart_handler);
	u32 val;

	/* use a timeout of 10 ticks (~150us) */
	writel_relaxed(10 | PM_PASSWORD, wdt->base + PM_WDOG);
	val = readl_relaxed(wdt->base + PM_RSTC);
	val &= PM_RSTC_WRCFG_CLR;
	val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET;
	writel_relaxed(val, wdt->base + PM_RSTC);

	/* No sleeping, possibly atomic. */
	mdelay(1);

	return 0;
}

/*
 * We can't really power off, but if we do the normal reset scheme, and
 * indicate to bootcode.bin not to reboot, then most of the chip will be
 * powered off.
 */
static void bcm2835_power_off(void)
{
	struct device_node *np =
		of_find_compatible_node(NULL, NULL, "brcm,bcm2835-pm-wdt");
	struct platform_device *pdev = of_find_device_by_node(np);
	struct bcm2835_wdt *wdt = platform_get_drvdata(pdev);
	u32 val;

	/*
	 * We set the watchdog hard reset bit here to distinguish this reset
	 * from the normal (full) reset. bootcode.bin will not reboot after a
	 * hard reset.
	 */
	val = readl_relaxed(wdt->base + PM_RSTS);
	val |= PM_PASSWORD | PM_RSTS_RASPBERRYPI_HALT;
	writel_relaxed(val, wdt->base + PM_RSTS);

	/* Continue with normal reset mechanism */
	bcm2835_restart(&wdt->restart_handler, REBOOT_HARD, NULL);
}

static int bcm2835_wdt_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct device_node *np = dev->of_node;
	struct bcm2835_wdt *wdt;
	int err;

	wdt = devm_kzalloc(dev, sizeof(struct bcm2835_wdt), GFP_KERNEL);
	if (!wdt)
		return -ENOMEM;
	platform_set_drvdata(pdev, wdt);

	spin_lock_init(&wdt->lock);

	wdt->base = of_iomap(np, 0);
	if (!wdt->base) {
		dev_err(dev, "Failed to remap watchdog regs");
		return -ENODEV;
	}

	watchdog_set_drvdata(&bcm2835_wdt_wdd, wdt);
	watchdog_init_timeout(&bcm2835_wdt_wdd, heartbeat, dev);
	watchdog_set_nowayout(&bcm2835_wdt_wdd, nowayout);
	bcm2835_wdt_wdd.parent = &pdev->dev;
	err = watchdog_register_device(&bcm2835_wdt_wdd);
	if (err) {
		dev_err(dev, "Failed to register watchdog device");
		iounmap(wdt->base);
		return err;
	}

	wdt->restart_handler.notifier_call = bcm2835_restart;
	wdt->restart_handler.priority = 128;
	register_restart_handler(&wdt->restart_handler);
	if (pm_power_off == NULL)
		pm_power_off = bcm2835_power_off;

	dev_info(dev, "Broadcom BCM2835 watchdog timer");
	return 0;
}

static int bcm2835_wdt_remove(struct platform_device *pdev)
{
	struct bcm2835_wdt *wdt = platform_get_drvdata(pdev);

	unregister_restart_handler(&wdt->restart_handler);
	if (pm_power_off == bcm2835_power_off)
		pm_power_off = NULL;
	watchdog_unregister_device(&bcm2835_wdt_wdd);
	iounmap(wdt->base);

	return 0;
}

static void bcm2835_wdt_shutdown(struct platform_device *pdev)
{
	bcm2835_wdt_stop(&bcm2835_wdt_wdd);
}

static const struct of_device_id bcm2835_wdt_of_match[] = {
	{ .compatible = "brcm,bcm2835-pm-wdt", },
	{},
};
MODULE_DEVICE_TABLE(of, bcm2835_wdt_of_match);

static struct platform_driver bcm2835_wdt_driver = {
	.probe		= bcm2835_wdt_probe,
	.remove		= bcm2835_wdt_remove,
	.shutdown	= bcm2835_wdt_shutdown,
	.driver = {
		.name =		"bcm2835-wdt",
		.of_match_table = bcm2835_wdt_of_match,
	},
};
module_platform_driver(bcm2835_wdt_driver);

module_param(heartbeat, uint, 0);
MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");

module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
				__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
MODULE_DESCRIPTION("Driver for Broadcom BCM2835 watchdog timer");
MODULE_LICENSE("GPL");
Commit	Line	Data
938d0a84 LR	1	/*
	2	* Watchdog driver for Broadcom BCM2835
	3	*
	4	* "bcm2708_wdog" driver written by Luke Diamand that was obtained from
	5	* branch "rpi-3.6.y" of git://github.com/raspberrypi/linux.git was used
	6	* as a hardware reference for the Broadcom BCM2835 watchdog timer.
	7	*
	8	* Copyright (C) 2013 Lubomir Rintel <lkundrak@v3.sk>
	9	*
	10	* This program is free software; you can redistribute it and/or modify it
	11	* under the terms of the GNU General Public License as published by the
	12	* Free Software Foundation; either version 2 of the License, or (at your
	13	* option) any later version.
	14	*/
	15
33a9f5bc EA	16	#include <linux/delay.h>
33a9f5bc EA	17	#include <linux/reboot.h>
938d0a84 LR	18	#include <linux/types.h>
	19	#include <linux/module.h>
	20	#include <linux/io.h>
	21	#include <linux/watchdog.h>
	22	#include <linux/platform_device.h>
	23	#include <linux/of_address.h>
33a9f5bc	24	#include <linux/of_platform.h>
938d0a84 LR	25
938d0a84 LR	26	#define PM_RSTC 0x1c
33a9f5bc	27	#define PM_RSTS 0x20
938d0a84 LR	28	#define PM_WDOG 0x24
	29
	30	#define PM_PASSWORD 0x5a000000
	31
	32	#define PM_WDOG_TIME_SET 0x000fffff
	33	#define PM_RSTC_WRCFG_CLR 0xffffffcf
33a9f5bc	34	#define PM_RSTS_HADWRH_SET 0x00000040
938d0a84 LR	35	#define PM_RSTC_WRCFG_SET 0x00000030
	36	#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
	37	#define PM_RSTC_RESET 0x00000102
	38
898e6861 NT	39	/*
	40	* The Raspberry Pi firmware uses the RSTS register to know which partiton
	41	* to boot from. The partiton value is spread into bits 0, 2, 4, 6, 8, 10.
	42	* Partiton 63 is a special partition used by the firmware to indicate halt.
	43	*/
	44	#define PM_RSTS_RASPBERRYPI_HALT 0x555
	45
938d0a84 LR	46	#define SECS_TO_WDOG_TICKS(x) ((x) << 16)
	47	#define WDOG_TICKS_TO_SECS(x) ((x) >> 16)
	48
	49	struct bcm2835_wdt {
	50	void __iomem *base;
	51	spinlock_t lock;
33a9f5bc	52	struct notifier_block restart_handler;
938d0a84 LR	53	};
	54
	55	static unsigned int heartbeat;
	56	static bool nowayout = WATCHDOG_NOWAYOUT;
	57
	58	static int bcm2835_wdt_start(struct watchdog_device *wdog)
	59	{
	60	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	61	uint32_t cur;
	62	unsigned long flags;
	63
	64	spin_lock_irqsave(&wdt->lock, flags);
	65
	66	writel_relaxed(PM_PASSWORD \| (SECS_TO_WDOG_TICKS(wdog->timeout) &
	67	PM_WDOG_TIME_SET), wdt->base + PM_WDOG);
	68	cur = readl_relaxed(wdt->base + PM_RSTC);
	69	writel_relaxed(PM_PASSWORD \| (cur & PM_RSTC_WRCFG_CLR) \|
	70	PM_RSTC_WRCFG_FULL_RESET, wdt->base + PM_RSTC);
	71
	72	spin_unlock_irqrestore(&wdt->lock, flags);
	73
	74	return 0;
	75	}
	76
	77	static int bcm2835_wdt_stop(struct watchdog_device *wdog)
	78	{
	79	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	80
	81	writel_relaxed(PM_PASSWORD \| PM_RSTC_RESET, wdt->base + PM_RSTC);
938d0a84 LR	82	return 0;
	83	}
	84
	85	static int bcm2835_wdt_set_timeout(struct watchdog_device *wdog, unsigned int t)
	86	{
	87	wdog->timeout = t;
	88	return 0;
	89	}
	90
	91	static unsigned int bcm2835_wdt_get_timeleft(struct watchdog_device *wdog)
	92	{
	93	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	94
	95	uint32_t ret = readl_relaxed(wdt->base + PM_WDOG);
	96	return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
	97	}
	98
	99	static struct watchdog_ops bcm2835_wdt_ops = {
	100	.owner = THIS_MODULE,
	101	.start = bcm2835_wdt_start,
	102	.stop = bcm2835_wdt_stop,
	103	.set_timeout = bcm2835_wdt_set_timeout,
	104	.get_timeleft = bcm2835_wdt_get_timeleft,
	105	};
	106
	107	static struct watchdog_info bcm2835_wdt_info = {
	108	.options = WDIOF_SETTIMEOUT \| WDIOF_MAGICCLOSE \|
	109	WDIOF_KEEPALIVEPING,
	110	.identity = "Broadcom BCM2835 Watchdog timer",
	111	};
	112
	113	static struct watchdog_device bcm2835_wdt_wdd = {
	114	.info = &bcm2835_wdt_info,
	115	.ops = &bcm2835_wdt_ops,
	116	.min_timeout = 1,
	117	.max_timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
	118	.timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
	119	};
	120
33a9f5bc EA	121	static int
	122	bcm2835_restart(struct notifier_block this, unsigned long mode, void cmd)
	123	{
	124	struct bcm2835_wdt *wdt = container_of(this, struct bcm2835_wdt,
	125	restart_handler);
	126	u32 val;
	127
	128	/* use a timeout of 10 ticks (~150us) */
	129	writel_relaxed(10 \| PM_PASSWORD, wdt->base + PM_WDOG);
	130	val = readl_relaxed(wdt->base + PM_RSTC);
	131	val &= PM_RSTC_WRCFG_CLR;
	132	val \|= PM_PASSWORD \| PM_RSTC_WRCFG_FULL_RESET;
	133	writel_relaxed(val, wdt->base + PM_RSTC);
	134
	135	/* No sleeping, possibly atomic. */
	136	mdelay(1);
	137
	138	return 0;
	139	}
	140
	141	/*
	142	* We can't really power off, but if we do the normal reset scheme, and
	143	* indicate to bootcode.bin not to reboot, then most of the chip will be
	144	* powered off.
	145	*/
	146	static void bcm2835_power_off(void)
	147	{
	148	struct device_node *np =
	149	of_find_compatible_node(NULL, NULL, "brcm,bcm2835-pm-wdt");
	150	struct platform_device *pdev = of_find_device_by_node(np);
	151	struct bcm2835_wdt *wdt = platform_get_drvdata(pdev);
	152	u32 val;
	153
	154	/*
	155	* We set the watchdog hard reset bit here to distinguish this reset
	156	* from the normal (full) reset. bootcode.bin will not reboot after a
	157	* hard reset.
	158	*/
	159	val = readl_relaxed(wdt->base + PM_RSTS);
898e6861	160	val \|= PM_PASSWORD \| PM_RSTS_RASPBERRYPI_HALT;
33a9f5bc EA	161	writel_relaxed(val, wdt->base + PM_RSTS);
	162
	163	/* Continue with normal reset mechanism */
	164	bcm2835_restart(&wdt->restart_handler, REBOOT_HARD, NULL);
	165	}
	166
938d0a84 LR	167	static int bcm2835_wdt_probe(struct platform_device *pdev)
	168	{
	169	struct device *dev = &pdev->dev;
	170	struct device_node *np = dev->of_node;
	171	struct bcm2835_wdt *wdt;
	172	int err;
	173
	174	wdt = devm_kzalloc(dev, sizeof(struct bcm2835_wdt), GFP_KERNEL);
8deea830	175	if (!wdt)
938d0a84	176	return -ENOMEM;
938d0a84 LR	177	platform_set_drvdata(pdev, wdt);
	178
	179	spin_lock_init(&wdt->lock);
	180
	181	wdt->base = of_iomap(np, 0);
	182	if (!wdt->base) {
	183	dev_err(dev, "Failed to remap watchdog regs");
	184	return -ENODEV;
	185	}
	186
	187	watchdog_set_drvdata(&bcm2835_wdt_wdd, wdt);
	188	watchdog_init_timeout(&bcm2835_wdt_wdd, heartbeat, dev);
	189	watchdog_set_nowayout(&bcm2835_wdt_wdd, nowayout);
6551881c	190	bcm2835_wdt_wdd.parent = &pdev->dev;
938d0a84 LR	191	err = watchdog_register_device(&bcm2835_wdt_wdd);
	192	if (err) {
	193	dev_err(dev, "Failed to register watchdog device");
	194	iounmap(wdt->base);
	195	return err;
	196	}
	197
33a9f5bc EA	198	wdt->restart_handler.notifier_call = bcm2835_restart;
	199	wdt->restart_handler.priority = 128;
	200	register_restart_handler(&wdt->restart_handler);
	201	if (pm_power_off == NULL)
	202	pm_power_off = bcm2835_power_off;
	203
938d0a84 LR	204	dev_info(dev, "Broadcom BCM2835 watchdog timer");
	205	return 0;
	206	}
	207
	208	static int bcm2835_wdt_remove(struct platform_device *pdev)
	209	{
	210	struct bcm2835_wdt *wdt = platform_get_drvdata(pdev);
	211
33a9f5bc EA	212	unregister_restart_handler(&wdt->restart_handler);
	213	if (pm_power_off == bcm2835_power_off)
	214	pm_power_off = NULL;
938d0a84 LR	215	watchdog_unregister_device(&bcm2835_wdt_wdd);
	216	iounmap(wdt->base);
	217
	218	return 0;
	219	}
	220
	221	static void bcm2835_wdt_shutdown(struct platform_device *pdev)
	222	{
	223	bcm2835_wdt_stop(&bcm2835_wdt_wdd);
	224	}
	225
	226	static const struct of_device_id bcm2835_wdt_of_match[] = {
	227	{ .compatible = "brcm,bcm2835-pm-wdt", },
	228	{},
	229	};
	230	MODULE_DEVICE_TABLE(of, bcm2835_wdt_of_match);
	231
	232	static struct platform_driver bcm2835_wdt_driver = {
	233	.probe = bcm2835_wdt_probe,
	234	.remove = bcm2835_wdt_remove,
	235	.shutdown = bcm2835_wdt_shutdown,
	236	.driver = {
	237	.name = "bcm2835-wdt",
938d0a84 LR	238	.of_match_table = bcm2835_wdt_of_match,
	239	},
	240	};
	241	module_platform_driver(bcm2835_wdt_driver);
	242
	243	module_param(heartbeat, uint, 0);
	244	MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");
	245
	246	module_param(nowayout, bool, 0);
	247	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
	248	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	249
	250	MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
	251	MODULE_DESCRIPTION("Driver for Broadcom BCM2835 watchdog timer");
	252	MODULE_LICENSE("GPL");