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c283cf2c MC |
1 | /* |
2 | * drivers/watchdog/ar7_wdt.c | |
3 | * | |
4 | * Copyright (C) 2007 Nicolas Thill <nico@openwrt.org> | |
5 | * Copyright (c) 2005 Enrik Berkhan <Enrik.Berkhan@akk.org> | |
6 | * | |
7 | * Some code taken from: | |
8 | * National Semiconductor SCx200 Watchdog support | |
9 | * Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
24 | */ | |
25 | ||
26 | #include <linux/module.h> | |
27 | #include <linux/moduleparam.h> | |
28 | #include <linux/errno.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/miscdevice.h> | |
31 | #include <linux/watchdog.h> | |
32 | #include <linux/notifier.h> | |
33 | #include <linux/reboot.h> | |
34 | #include <linux/fs.h> | |
35 | #include <linux/ioport.h> | |
36 | #include <linux/io.h> | |
37 | #include <linux/uaccess.h> | |
38 | ||
39 | #include <asm/addrspace.h> | |
40 | #include <asm/ar7/ar7.h> | |
41 | ||
42 | #define DRVNAME "ar7_wdt" | |
43 | #define LONGNAME "TI AR7 Watchdog Timer" | |
44 | ||
45 | MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>"); | |
46 | MODULE_DESCRIPTION(LONGNAME); | |
47 | MODULE_LICENSE("GPL"); | |
48 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); | |
49 | ||
50 | static int margin = 60; | |
51 | module_param(margin, int, 0); | |
52 | MODULE_PARM_DESC(margin, "Watchdog margin in seconds"); | |
53 | ||
54 | static int nowayout = WATCHDOG_NOWAYOUT; | |
55 | module_param(nowayout, int, 0); | |
56 | MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close"); | |
57 | ||
58 | #define READ_REG(x) readl((void __iomem *)&(x)) | |
59 | #define WRITE_REG(x, v) writel((v), (void __iomem *)&(x)) | |
60 | ||
61 | struct ar7_wdt { | |
62 | u32 kick_lock; | |
63 | u32 kick; | |
64 | u32 change_lock; | |
65 | u32 change; | |
66 | u32 disable_lock; | |
67 | u32 disable; | |
68 | u32 prescale_lock; | |
69 | u32 prescale; | |
70 | }; | |
71 | ||
670d59c0 AC |
72 | static unsigned long wdt_is_open; |
73 | static spinlock_t wdt_lock; | |
c283cf2c MC |
74 | static unsigned expect_close; |
75 | ||
76 | /* XXX currently fixed, allows max margin ~68.72 secs */ | |
77 | #define prescale_value 0xffff | |
78 | ||
79 | /* Offset of the WDT registers */ | |
80 | static unsigned long ar7_regs_wdt; | |
81 | /* Pointer to the remapped WDT IO space */ | |
82 | static struct ar7_wdt *ar7_wdt; | |
83 | static void ar7_wdt_get_regs(void) | |
84 | { | |
85 | u16 chip_id = ar7_chip_id(); | |
86 | switch (chip_id) { | |
87 | case AR7_CHIP_7100: | |
88 | case AR7_CHIP_7200: | |
89 | ar7_regs_wdt = AR7_REGS_WDT; | |
90 | break; | |
91 | default: | |
92 | ar7_regs_wdt = UR8_REGS_WDT; | |
93 | break; | |
94 | } | |
95 | } | |
96 | ||
97 | ||
98 | static void ar7_wdt_kick(u32 value) | |
99 | { | |
100 | WRITE_REG(ar7_wdt->kick_lock, 0x5555); | |
101 | if ((READ_REG(ar7_wdt->kick_lock) & 3) == 1) { | |
102 | WRITE_REG(ar7_wdt->kick_lock, 0xaaaa); | |
103 | if ((READ_REG(ar7_wdt->kick_lock) & 3) == 3) { | |
104 | WRITE_REG(ar7_wdt->kick, value); | |
105 | return; | |
106 | } | |
107 | } | |
108 | printk(KERN_ERR DRVNAME ": failed to unlock WDT kick reg\n"); | |
109 | } | |
110 | ||
111 | static void ar7_wdt_prescale(u32 value) | |
112 | { | |
113 | WRITE_REG(ar7_wdt->prescale_lock, 0x5a5a); | |
114 | if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 1) { | |
115 | WRITE_REG(ar7_wdt->prescale_lock, 0xa5a5); | |
116 | if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 3) { | |
117 | WRITE_REG(ar7_wdt->prescale, value); | |
118 | return; | |
119 | } | |
120 | } | |
121 | printk(KERN_ERR DRVNAME ": failed to unlock WDT prescale reg\n"); | |
122 | } | |
123 | ||
124 | static void ar7_wdt_change(u32 value) | |
125 | { | |
126 | WRITE_REG(ar7_wdt->change_lock, 0x6666); | |
127 | if ((READ_REG(ar7_wdt->change_lock) & 3) == 1) { | |
128 | WRITE_REG(ar7_wdt->change_lock, 0xbbbb); | |
129 | if ((READ_REG(ar7_wdt->change_lock) & 3) == 3) { | |
130 | WRITE_REG(ar7_wdt->change, value); | |
131 | return; | |
132 | } | |
133 | } | |
134 | printk(KERN_ERR DRVNAME ": failed to unlock WDT change reg\n"); | |
135 | } | |
136 | ||
137 | static void ar7_wdt_disable(u32 value) | |
138 | { | |
139 | WRITE_REG(ar7_wdt->disable_lock, 0x7777); | |
140 | if ((READ_REG(ar7_wdt->disable_lock) & 3) == 1) { | |
141 | WRITE_REG(ar7_wdt->disable_lock, 0xcccc); | |
142 | if ((READ_REG(ar7_wdt->disable_lock) & 3) == 2) { | |
143 | WRITE_REG(ar7_wdt->disable_lock, 0xdddd); | |
144 | if ((READ_REG(ar7_wdt->disable_lock) & 3) == 3) { | |
145 | WRITE_REG(ar7_wdt->disable, value); | |
146 | return; | |
147 | } | |
148 | } | |
149 | } | |
150 | printk(KERN_ERR DRVNAME ": failed to unlock WDT disable reg\n"); | |
151 | } | |
152 | ||
153 | static void ar7_wdt_update_margin(int new_margin) | |
154 | { | |
155 | u32 change; | |
156 | ||
157 | change = new_margin * (ar7_vbus_freq() / prescale_value); | |
670d59c0 AC |
158 | if (change < 1) |
159 | change = 1; | |
160 | if (change > 0xffff) | |
161 | change = 0xffff; | |
c283cf2c MC |
162 | ar7_wdt_change(change); |
163 | margin = change * prescale_value / ar7_vbus_freq(); | |
164 | printk(KERN_INFO DRVNAME | |
165 | ": timer margin %d seconds (prescale %d, change %d, freq %d)\n", | |
166 | margin, prescale_value, change, ar7_vbus_freq()); | |
167 | } | |
168 | ||
169 | static void ar7_wdt_enable_wdt(void) | |
170 | { | |
171 | printk(KERN_DEBUG DRVNAME ": enabling watchdog timer\n"); | |
172 | ar7_wdt_disable(1); | |
173 | ar7_wdt_kick(1); | |
174 | } | |
175 | ||
176 | static void ar7_wdt_disable_wdt(void) | |
177 | { | |
178 | printk(KERN_DEBUG DRVNAME ": disabling watchdog timer\n"); | |
179 | ar7_wdt_disable(0); | |
180 | } | |
181 | ||
182 | static int ar7_wdt_open(struct inode *inode, struct file *file) | |
183 | { | |
184 | /* only allow one at a time */ | |
670d59c0 | 185 | if (test_and_set_bit(0, &wdt_is_open)) |
c283cf2c MC |
186 | return -EBUSY; |
187 | ar7_wdt_enable_wdt(); | |
188 | expect_close = 0; | |
189 | ||
190 | return nonseekable_open(inode, file); | |
191 | } | |
192 | ||
193 | static int ar7_wdt_release(struct inode *inode, struct file *file) | |
194 | { | |
195 | if (!expect_close) | |
196 | printk(KERN_WARNING DRVNAME | |
197 | ": watchdog device closed unexpectedly," | |
198 | "will not disable the watchdog timer\n"); | |
199 | else if (!nowayout) | |
200 | ar7_wdt_disable_wdt(); | |
670d59c0 | 201 | clear_bit(0, &wdt_is_open); |
c283cf2c MC |
202 | return 0; |
203 | } | |
204 | ||
205 | static int ar7_wdt_notify_sys(struct notifier_block *this, | |
206 | unsigned long code, void *unused) | |
207 | { | |
208 | if (code == SYS_HALT || code == SYS_POWER_OFF) | |
209 | if (!nowayout) | |
210 | ar7_wdt_disable_wdt(); | |
211 | ||
212 | return NOTIFY_DONE; | |
213 | } | |
214 | ||
215 | static struct notifier_block ar7_wdt_notifier = { | |
7944d3a5 | 216 | .notifier_call = ar7_wdt_notify_sys, |
c283cf2c MC |
217 | }; |
218 | ||
219 | static ssize_t ar7_wdt_write(struct file *file, const char *data, | |
220 | size_t len, loff_t *ppos) | |
221 | { | |
222 | /* check for a magic close character */ | |
223 | if (len) { | |
224 | size_t i; | |
225 | ||
670d59c0 | 226 | spin_lock(&wdt_lock); |
c283cf2c | 227 | ar7_wdt_kick(1); |
670d59c0 | 228 | spin_unlock(&wdt_lock); |
c283cf2c MC |
229 | |
230 | expect_close = 0; | |
231 | for (i = 0; i < len; ++i) { | |
232 | char c; | |
7944d3a5 | 233 | if (get_user(c, data + i)) |
c283cf2c MC |
234 | return -EFAULT; |
235 | if (c == 'V') | |
236 | expect_close = 1; | |
237 | } | |
238 | ||
239 | } | |
240 | return len; | |
241 | } | |
242 | ||
670d59c0 AC |
243 | static long ar7_wdt_ioctl(struct file *file, |
244 | unsigned int cmd, unsigned long arg) | |
c283cf2c MC |
245 | { |
246 | static struct watchdog_info ident = { | |
247 | .identity = LONGNAME, | |
248 | .firmware_version = 1, | |
249 | .options = (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING), | |
250 | }; | |
251 | int new_margin; | |
252 | ||
253 | switch (cmd) { | |
c283cf2c MC |
254 | case WDIOC_GETSUPPORT: |
255 | if (copy_to_user((struct watchdog_info *)arg, &ident, | |
256 | sizeof(ident))) | |
257 | return -EFAULT; | |
258 | return 0; | |
259 | case WDIOC_GETSTATUS: | |
260 | case WDIOC_GETBOOTSTATUS: | |
261 | if (put_user(0, (int *)arg)) | |
262 | return -EFAULT; | |
263 | return 0; | |
264 | case WDIOC_KEEPALIVE: | |
265 | ar7_wdt_kick(1); | |
266 | return 0; | |
267 | case WDIOC_SETTIMEOUT: | |
268 | if (get_user(new_margin, (int *)arg)) | |
269 | return -EFAULT; | |
270 | if (new_margin < 1) | |
271 | return -EINVAL; | |
272 | ||
670d59c0 | 273 | spin_lock(&wdt_lock); |
c283cf2c MC |
274 | ar7_wdt_update_margin(new_margin); |
275 | ar7_wdt_kick(1); | |
670d59c0 | 276 | spin_unlock(&wdt_lock); |
c283cf2c MC |
277 | |
278 | case WDIOC_GETTIMEOUT: | |
279 | if (put_user(margin, (int *)arg)) | |
280 | return -EFAULT; | |
281 | return 0; | |
0c06090c WVS |
282 | default: |
283 | return -ENOTTY; | |
c283cf2c MC |
284 | } |
285 | } | |
286 | ||
b47a166e | 287 | static const struct file_operations ar7_wdt_fops = { |
c283cf2c MC |
288 | .owner = THIS_MODULE, |
289 | .write = ar7_wdt_write, | |
670d59c0 | 290 | .unlocked_ioctl = ar7_wdt_ioctl, |
c283cf2c MC |
291 | .open = ar7_wdt_open, |
292 | .release = ar7_wdt_release, | |
293 | }; | |
294 | ||
295 | static struct miscdevice ar7_wdt_miscdev = { | |
296 | .minor = WATCHDOG_MINOR, | |
297 | .name = "watchdog", | |
298 | .fops = &ar7_wdt_fops, | |
299 | }; | |
300 | ||
301 | static int __init ar7_wdt_init(void) | |
302 | { | |
303 | int rc; | |
304 | ||
670d59c0 AC |
305 | spin_lock_init(&wdt_lock); |
306 | ||
c283cf2c MC |
307 | ar7_wdt_get_regs(); |
308 | ||
309 | if (!request_mem_region(ar7_regs_wdt, sizeof(struct ar7_wdt), | |
310 | LONGNAME)) { | |
311 | printk(KERN_WARNING DRVNAME ": watchdog I/O region busy\n"); | |
312 | return -EBUSY; | |
313 | } | |
314 | ||
315 | ar7_wdt = (struct ar7_wdt *) | |
316 | ioremap(ar7_regs_wdt, sizeof(struct ar7_wdt)); | |
317 | ||
318 | ar7_wdt_disable_wdt(); | |
319 | ar7_wdt_prescale(prescale_value); | |
320 | ar7_wdt_update_margin(margin); | |
321 | ||
c283cf2c MC |
322 | rc = register_reboot_notifier(&ar7_wdt_notifier); |
323 | if (rc) { | |
324 | printk(KERN_ERR DRVNAME | |
325 | ": unable to register reboot notifier\n"); | |
326 | goto out_alloc; | |
327 | } | |
328 | ||
329 | rc = misc_register(&ar7_wdt_miscdev); | |
330 | if (rc) { | |
331 | printk(KERN_ERR DRVNAME ": unable to register misc device\n"); | |
332 | goto out_register; | |
333 | } | |
334 | goto out; | |
335 | ||
336 | out_register: | |
337 | unregister_reboot_notifier(&ar7_wdt_notifier); | |
338 | out_alloc: | |
339 | iounmap(ar7_wdt); | |
340 | release_mem_region(ar7_regs_wdt, sizeof(struct ar7_wdt)); | |
341 | out: | |
342 | return rc; | |
343 | } | |
344 | ||
345 | static void __exit ar7_wdt_cleanup(void) | |
346 | { | |
347 | misc_deregister(&ar7_wdt_miscdev); | |
348 | unregister_reboot_notifier(&ar7_wdt_notifier); | |
349 | iounmap(ar7_wdt); | |
350 | release_mem_region(ar7_regs_wdt, sizeof(struct ar7_wdt)); | |
351 | } | |
352 | ||
353 | module_init(ar7_wdt_init); | |
354 | module_exit(ar7_wdt_cleanup); |