Merge 3.14-rc4 into char-misc-linus
[linux-block.git] / drivers / watchdog / ar7_wdt.c
CommitLineData
c283cf2c
MC
1/*
2 * drivers/watchdog/ar7_wdt.c
3 *
4 * Copyright (C) 2007 Nicolas Thill <nico@openwrt.org>
5 * Copyright (c) 2005 Enrik Berkhan <Enrik.Berkhan@akk.org>
6 *
7 * Some code taken from:
8 * National Semiconductor SCx200 Watchdog support
9 * Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 */
25
27c766aa
JP
26#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27
c283cf2c
MC
28#include <linux/module.h>
29#include <linux/moduleparam.h>
30#include <linux/errno.h>
31#include <linux/init.h>
32#include <linux/miscdevice.h>
64d4062a 33#include <linux/platform_device.h>
c283cf2c 34#include <linux/watchdog.h>
c283cf2c
MC
35#include <linux/fs.h>
36#include <linux/ioport.h>
37#include <linux/io.h>
38#include <linux/uaccess.h>
780019dd 39#include <linux/clk.h>
c283cf2c
MC
40
41#include <asm/addrspace.h>
c5e7f5a3 42#include <asm/mach-ar7/ar7.h>
c283cf2c 43
c283cf2c
MC
44#define LONGNAME "TI AR7 Watchdog Timer"
45
46MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>");
47MODULE_DESCRIPTION(LONGNAME);
48MODULE_LICENSE("GPL");
c283cf2c
MC
49
50static int margin = 60;
51module_param(margin, int, 0);
52MODULE_PARM_DESC(margin, "Watchdog margin in seconds");
53
86a1e189
WVS
54static bool nowayout = WATCHDOG_NOWAYOUT;
55module_param(nowayout, bool, 0);
c283cf2c
MC
56MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
57
58#define READ_REG(x) readl((void __iomem *)&(x))
59#define WRITE_REG(x, v) writel((v), (void __iomem *)&(x))
60
61struct ar7_wdt {
62 u32 kick_lock;
63 u32 kick;
64 u32 change_lock;
65 u32 change;
66 u32 disable_lock;
67 u32 disable;
68 u32 prescale_lock;
69 u32 prescale;
70};
71
670d59c0 72static unsigned long wdt_is_open;
c283cf2c 73static unsigned expect_close;
1334f329 74static DEFINE_SPINLOCK(wdt_lock);
c283cf2c
MC
75
76/* XXX currently fixed, allows max margin ~68.72 secs */
77#define prescale_value 0xffff
78
64d4062a
FF
79/* Resource of the WDT registers */
80static struct resource *ar7_regs_wdt;
c283cf2c
MC
81/* Pointer to the remapped WDT IO space */
82static struct ar7_wdt *ar7_wdt;
c283cf2c 83
780019dd
FF
84static struct clk *vbus_clk;
85
c283cf2c
MC
86static void ar7_wdt_kick(u32 value)
87{
88 WRITE_REG(ar7_wdt->kick_lock, 0x5555);
89 if ((READ_REG(ar7_wdt->kick_lock) & 3) == 1) {
90 WRITE_REG(ar7_wdt->kick_lock, 0xaaaa);
91 if ((READ_REG(ar7_wdt->kick_lock) & 3) == 3) {
92 WRITE_REG(ar7_wdt->kick, value);
93 return;
94 }
95 }
27c766aa 96 pr_err("failed to unlock WDT kick reg\n");
c283cf2c
MC
97}
98
99static void ar7_wdt_prescale(u32 value)
100{
101 WRITE_REG(ar7_wdt->prescale_lock, 0x5a5a);
102 if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 1) {
103 WRITE_REG(ar7_wdt->prescale_lock, 0xa5a5);
104 if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 3) {
105 WRITE_REG(ar7_wdt->prescale, value);
106 return;
107 }
108 }
27c766aa 109 pr_err("failed to unlock WDT prescale reg\n");
c283cf2c
MC
110}
111
112static void ar7_wdt_change(u32 value)
113{
114 WRITE_REG(ar7_wdt->change_lock, 0x6666);
115 if ((READ_REG(ar7_wdt->change_lock) & 3) == 1) {
116 WRITE_REG(ar7_wdt->change_lock, 0xbbbb);
117 if ((READ_REG(ar7_wdt->change_lock) & 3) == 3) {
118 WRITE_REG(ar7_wdt->change, value);
119 return;
120 }
121 }
27c766aa 122 pr_err("failed to unlock WDT change reg\n");
c283cf2c
MC
123}
124
125static void ar7_wdt_disable(u32 value)
126{
127 WRITE_REG(ar7_wdt->disable_lock, 0x7777);
128 if ((READ_REG(ar7_wdt->disable_lock) & 3) == 1) {
129 WRITE_REG(ar7_wdt->disable_lock, 0xcccc);
130 if ((READ_REG(ar7_wdt->disable_lock) & 3) == 2) {
131 WRITE_REG(ar7_wdt->disable_lock, 0xdddd);
132 if ((READ_REG(ar7_wdt->disable_lock) & 3) == 3) {
133 WRITE_REG(ar7_wdt->disable, value);
134 return;
135 }
136 }
137 }
27c766aa 138 pr_err("failed to unlock WDT disable reg\n");
c283cf2c
MC
139}
140
141static void ar7_wdt_update_margin(int new_margin)
142{
143 u32 change;
780019dd 144 u32 vbus_rate;
c283cf2c 145
780019dd
FF
146 vbus_rate = clk_get_rate(vbus_clk);
147 change = new_margin * (vbus_rate / prescale_value);
670d59c0
AC
148 if (change < 1)
149 change = 1;
150 if (change > 0xffff)
151 change = 0xffff;
c283cf2c 152 ar7_wdt_change(change);
780019dd 153 margin = change * prescale_value / vbus_rate;
27c766aa
JP
154 pr_info("timer margin %d seconds (prescale %d, change %d, freq %d)\n",
155 margin, prescale_value, change, vbus_rate);
c283cf2c
MC
156}
157
158static void ar7_wdt_enable_wdt(void)
159{
27c766aa 160 pr_debug("enabling watchdog timer\n");
c283cf2c
MC
161 ar7_wdt_disable(1);
162 ar7_wdt_kick(1);
163}
164
165static void ar7_wdt_disable_wdt(void)
166{
27c766aa 167 pr_debug("disabling watchdog timer\n");
c283cf2c
MC
168 ar7_wdt_disable(0);
169}
170
171static int ar7_wdt_open(struct inode *inode, struct file *file)
172{
173 /* only allow one at a time */
670d59c0 174 if (test_and_set_bit(0, &wdt_is_open))
c283cf2c
MC
175 return -EBUSY;
176 ar7_wdt_enable_wdt();
177 expect_close = 0;
178
179 return nonseekable_open(inode, file);
180}
181
182static int ar7_wdt_release(struct inode *inode, struct file *file)
183{
184 if (!expect_close)
27c766aa 185 pr_warn("watchdog device closed unexpectedly, will not disable the watchdog timer\n");
c283cf2c
MC
186 else if (!nowayout)
187 ar7_wdt_disable_wdt();
670d59c0 188 clear_bit(0, &wdt_is_open);
c283cf2c
MC
189 return 0;
190}
191
c283cf2c
MC
192static ssize_t ar7_wdt_write(struct file *file, const char *data,
193 size_t len, loff_t *ppos)
194{
195 /* check for a magic close character */
196 if (len) {
197 size_t i;
198
670d59c0 199 spin_lock(&wdt_lock);
c283cf2c 200 ar7_wdt_kick(1);
670d59c0 201 spin_unlock(&wdt_lock);
c283cf2c
MC
202
203 expect_close = 0;
204 for (i = 0; i < len; ++i) {
205 char c;
7944d3a5 206 if (get_user(c, data + i))
c283cf2c
MC
207 return -EFAULT;
208 if (c == 'V')
209 expect_close = 1;
210 }
211
212 }
213 return len;
214}
215
670d59c0
AC
216static long ar7_wdt_ioctl(struct file *file,
217 unsigned int cmd, unsigned long arg)
c283cf2c 218{
42747d71 219 static const struct watchdog_info ident = {
c283cf2c
MC
220 .identity = LONGNAME,
221 .firmware_version = 1,
e73a7802
WVS
222 .options = (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
223 WDIOF_MAGICCLOSE),
c283cf2c
MC
224 };
225 int new_margin;
226
227 switch (cmd) {
c283cf2c
MC
228 case WDIOC_GETSUPPORT:
229 if (copy_to_user((struct watchdog_info *)arg, &ident,
230 sizeof(ident)))
231 return -EFAULT;
232 return 0;
233 case WDIOC_GETSTATUS:
234 case WDIOC_GETBOOTSTATUS:
235 if (put_user(0, (int *)arg))
236 return -EFAULT;
237 return 0;
238 case WDIOC_KEEPALIVE:
239 ar7_wdt_kick(1);
240 return 0;
241 case WDIOC_SETTIMEOUT:
242 if (get_user(new_margin, (int *)arg))
243 return -EFAULT;
244 if (new_margin < 1)
245 return -EINVAL;
246
670d59c0 247 spin_lock(&wdt_lock);
c283cf2c
MC
248 ar7_wdt_update_margin(new_margin);
249 ar7_wdt_kick(1);
670d59c0 250 spin_unlock(&wdt_lock);
c283cf2c
MC
251
252 case WDIOC_GETTIMEOUT:
253 if (put_user(margin, (int *)arg))
254 return -EFAULT;
255 return 0;
0c06090c
WVS
256 default:
257 return -ENOTTY;
c283cf2c
MC
258 }
259}
260
b47a166e 261static const struct file_operations ar7_wdt_fops = {
c283cf2c
MC
262 .owner = THIS_MODULE,
263 .write = ar7_wdt_write,
670d59c0 264 .unlocked_ioctl = ar7_wdt_ioctl,
c283cf2c
MC
265 .open = ar7_wdt_open,
266 .release = ar7_wdt_release,
6038f373 267 .llseek = no_llseek,
c283cf2c
MC
268};
269
270static struct miscdevice ar7_wdt_miscdev = {
271 .minor = WATCHDOG_MINOR,
272 .name = "watchdog",
273 .fops = &ar7_wdt_fops,
274};
275
2d991a16 276static int ar7_wdt_probe(struct platform_device *pdev)
c283cf2c
MC
277{
278 int rc;
279
64d4062a
FF
280 ar7_regs_wdt =
281 platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
4c271bb6
TR
282 ar7_wdt = devm_ioremap_resource(&pdev->dev, ar7_regs_wdt);
283 if (IS_ERR(ar7_wdt))
284 return PTR_ERR(ar7_wdt);
c283cf2c 285
780019dd
FF
286 vbus_clk = clk_get(NULL, "vbus");
287 if (IS_ERR(vbus_clk)) {
27c766aa 288 pr_err("could not get vbus clock\n");
ae21cc20 289 return PTR_ERR(vbus_clk);
780019dd
FF
290 }
291
c283cf2c
MC
292 ar7_wdt_disable_wdt();
293 ar7_wdt_prescale(prescale_value);
294 ar7_wdt_update_margin(margin);
295
c283cf2c
MC
296 rc = misc_register(&ar7_wdt_miscdev);
297 if (rc) {
27c766aa 298 pr_err("unable to register misc device\n");
ae21cc20 299 goto out;
c283cf2c 300 }
ae21cc20 301 return 0;
c283cf2c 302
c283cf2c 303out:
ae21cc20
JL
304 clk_put(vbus_clk);
305 vbus_clk = NULL;
c283cf2c
MC
306 return rc;
307}
308
4b12b896 309static int ar7_wdt_remove(struct platform_device *pdev)
c283cf2c
MC
310{
311 misc_deregister(&ar7_wdt_miscdev);
ae21cc20
JL
312 clk_put(vbus_clk);
313 vbus_clk = NULL;
64d4062a
FF
314 return 0;
315}
316
317static void ar7_wdt_shutdown(struct platform_device *pdev)
318{
319 if (!nowayout)
320 ar7_wdt_disable_wdt();
321}
322
323static struct platform_driver ar7_wdt_driver = {
324 .probe = ar7_wdt_probe,
82268714 325 .remove = ar7_wdt_remove,
64d4062a
FF
326 .shutdown = ar7_wdt_shutdown,
327 .driver = {
328 .owner = THIS_MODULE,
329 .name = "ar7_wdt",
330 },
331};
332
b8ec6118 333module_platform_driver(ar7_wdt_driver);