Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* tcx.c: TCX frame buffer driver |
2 | * | |
50312ce9 | 3 | * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net) |
1da177e4 LT |
4 | * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz) |
5 | * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx) | |
6 | * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) | |
7 | * | |
8 | * Driver layout based loosely on tgafb.c, see that file for credits. | |
9 | */ | |
10 | ||
11 | #include <linux/module.h> | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/errno.h> | |
14 | #include <linux/string.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/fb.h> | |
19 | #include <linux/mm.h> | |
6cd5a86b | 20 | #include <linux/of_device.h> |
1da177e4 LT |
21 | |
22 | #include <asm/io.h> | |
1da177e4 LT |
23 | #include <asm/fbio.h> |
24 | ||
25 | #include "sbuslib.h" | |
26 | ||
27 | /* | |
28 | * Local functions. | |
29 | */ | |
30 | ||
31 | static int tcx_setcolreg(unsigned, unsigned, unsigned, unsigned, | |
32 | unsigned, struct fb_info *); | |
33 | static int tcx_blank(int, struct fb_info *); | |
34 | ||
216d526c | 35 | static int tcx_mmap(struct fb_info *, struct vm_area_struct *); |
67a6680d | 36 | static int tcx_ioctl(struct fb_info *, unsigned int, unsigned long); |
6ee7c152 | 37 | static int tcx_pan_display(struct fb_var_screeninfo *, struct fb_info *); |
1da177e4 LT |
38 | |
39 | /* | |
40 | * Frame buffer operations | |
41 | */ | |
42 | ||
43 | static struct fb_ops tcx_ops = { | |
44 | .owner = THIS_MODULE, | |
45 | .fb_setcolreg = tcx_setcolreg, | |
46 | .fb_blank = tcx_blank, | |
6ee7c152 | 47 | .fb_pan_display = tcx_pan_display, |
1da177e4 LT |
48 | .fb_fillrect = cfb_fillrect, |
49 | .fb_copyarea = cfb_copyarea, | |
50 | .fb_imageblit = cfb_imageblit, | |
51 | .fb_mmap = tcx_mmap, | |
52 | .fb_ioctl = tcx_ioctl, | |
9ffb83bc CH |
53 | #ifdef CONFIG_COMPAT |
54 | .fb_compat_ioctl = sbusfb_compat_ioctl, | |
55 | #endif | |
1da177e4 LT |
56 | }; |
57 | ||
58 | /* THC definitions */ | |
59 | #define TCX_THC_MISC_REV_SHIFT 16 | |
60 | #define TCX_THC_MISC_REV_MASK 15 | |
61 | #define TCX_THC_MISC_VSYNC_DIS (1 << 25) | |
62 | #define TCX_THC_MISC_HSYNC_DIS (1 << 24) | |
63 | #define TCX_THC_MISC_RESET (1 << 12) | |
64 | #define TCX_THC_MISC_VIDEO (1 << 10) | |
65 | #define TCX_THC_MISC_SYNC (1 << 9) | |
66 | #define TCX_THC_MISC_VSYNC (1 << 8) | |
67 | #define TCX_THC_MISC_SYNC_ENAB (1 << 7) | |
68 | #define TCX_THC_MISC_CURS_RES (1 << 6) | |
69 | #define TCX_THC_MISC_INT_ENAB (1 << 5) | |
70 | #define TCX_THC_MISC_INT (1 << 4) | |
71 | #define TCX_THC_MISC_INIT 0x9f | |
72 | #define TCX_THC_REV_REV_SHIFT 20 | |
73 | #define TCX_THC_REV_REV_MASK 15 | |
74 | #define TCX_THC_REV_MINREV_SHIFT 28 | |
75 | #define TCX_THC_REV_MINREV_MASK 15 | |
76 | ||
77 | /* The contents are unknown */ | |
78 | struct tcx_tec { | |
50312ce9 DM |
79 | u32 tec_matrix; |
80 | u32 tec_clip; | |
81 | u32 tec_vdc; | |
1da177e4 LT |
82 | }; |
83 | ||
84 | struct tcx_thc { | |
50312ce9 | 85 | u32 thc_rev; |
5b81d689 | 86 | u32 thc_pad0[511]; |
50312ce9 DM |
87 | u32 thc_hs; /* hsync timing */ |
88 | u32 thc_hsdvs; | |
89 | u32 thc_hd; | |
90 | u32 thc_vs; /* vsync timing */ | |
91 | u32 thc_vd; | |
92 | u32 thc_refresh; | |
93 | u32 thc_misc; | |
1da177e4 | 94 | u32 thc_pad1[56]; |
50312ce9 DM |
95 | u32 thc_cursxy; /* cursor x,y position (16 bits each) */ |
96 | u32 thc_cursmask[32]; /* cursor mask bits */ | |
97 | u32 thc_cursbits[32]; /* what to show where mask enabled */ | |
1da177e4 LT |
98 | }; |
99 | ||
100 | struct bt_regs { | |
50312ce9 DM |
101 | u32 addr; |
102 | u32 color_map; | |
103 | u32 control; | |
104 | u32 cursor; | |
1da177e4 LT |
105 | }; |
106 | ||
107 | #define TCX_MMAP_ENTRIES 14 | |
108 | ||
109 | struct tcx_par { | |
110 | spinlock_t lock; | |
111 | struct bt_regs __iomem *bt; | |
112 | struct tcx_thc __iomem *thc; | |
113 | struct tcx_tec __iomem *tec; | |
50312ce9 | 114 | u32 __iomem *cplane; |
1da177e4 LT |
115 | |
116 | u32 flags; | |
117 | #define TCX_FLAG_BLANKED 0x00000001 | |
118 | ||
119 | unsigned long physbase; | |
50312ce9 | 120 | unsigned long which_io; |
1da177e4 LT |
121 | unsigned long fbsize; |
122 | ||
123 | struct sbus_mmap_map mmap_map[TCX_MMAP_ENTRIES]; | |
124 | int lowdepth; | |
1da177e4 LT |
125 | }; |
126 | ||
127 | /* Reset control plane so that WID is 8-bit plane. */ | |
5b81d689 | 128 | static void __tcx_set_control_plane(struct tcx_par *par) |
1da177e4 | 129 | { |
50312ce9 | 130 | u32 __iomem *p, *pend; |
5b81d689 | 131 | |
1da177e4 LT |
132 | if (par->lowdepth) |
133 | return; | |
134 | ||
135 | p = par->cplane; | |
136 | if (p == NULL) | |
137 | return; | |
138 | for (pend = p + par->fbsize; p < pend; p++) { | |
139 | u32 tmp = sbus_readl(p); | |
140 | ||
141 | tmp &= 0xffffff; | |
142 | sbus_writel(tmp, p); | |
143 | } | |
144 | } | |
5b81d689 RR |
145 | |
146 | static void tcx_reset(struct fb_info *info) | |
1da177e4 LT |
147 | { |
148 | struct tcx_par *par = (struct tcx_par *) info->par; | |
149 | unsigned long flags; | |
150 | ||
151 | spin_lock_irqsave(&par->lock, flags); | |
152 | __tcx_set_control_plane(par); | |
153 | spin_unlock_irqrestore(&par->lock, flags); | |
154 | } | |
155 | ||
6ee7c152 TC |
156 | static int tcx_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) |
157 | { | |
158 | tcx_reset(info); | |
159 | return 0; | |
160 | } | |
161 | ||
1da177e4 LT |
162 | /** |
163 | * tcx_setcolreg - Optional function. Sets a color register. | |
164 | * @regno: boolean, 0 copy local, 1 get_user() function | |
165 | * @red: frame buffer colormap structure | |
166 | * @green: The green value which can be up to 16 bits wide | |
167 | * @blue: The blue value which can be up to 16 bits wide. | |
168 | * @transp: If supported the alpha value which can be up to 16 bits wide. | |
169 | * @info: frame buffer info structure | |
170 | */ | |
171 | static int tcx_setcolreg(unsigned regno, | |
172 | unsigned red, unsigned green, unsigned blue, | |
173 | unsigned transp, struct fb_info *info) | |
174 | { | |
175 | struct tcx_par *par = (struct tcx_par *) info->par; | |
176 | struct bt_regs __iomem *bt = par->bt; | |
177 | unsigned long flags; | |
178 | ||
179 | if (regno >= 256) | |
180 | return 1; | |
181 | ||
182 | red >>= 8; | |
183 | green >>= 8; | |
184 | blue >>= 8; | |
185 | ||
186 | spin_lock_irqsave(&par->lock, flags); | |
187 | ||
188 | sbus_writel(regno << 24, &bt->addr); | |
189 | sbus_writel(red << 24, &bt->color_map); | |
190 | sbus_writel(green << 24, &bt->color_map); | |
191 | sbus_writel(blue << 24, &bt->color_map); | |
192 | ||
193 | spin_unlock_irqrestore(&par->lock, flags); | |
194 | ||
195 | return 0; | |
196 | } | |
197 | ||
198 | /** | |
199 | * tcx_blank - Optional function. Blanks the display. | |
200 | * @blank_mode: the blank mode we want. | |
201 | * @info: frame buffer structure that represents a single frame buffer | |
202 | */ | |
203 | static int | |
204 | tcx_blank(int blank, struct fb_info *info) | |
205 | { | |
206 | struct tcx_par *par = (struct tcx_par *) info->par; | |
207 | struct tcx_thc __iomem *thc = par->thc; | |
208 | unsigned long flags; | |
209 | u32 val; | |
210 | ||
211 | spin_lock_irqsave(&par->lock, flags); | |
212 | ||
213 | val = sbus_readl(&thc->thc_misc); | |
214 | ||
215 | switch (blank) { | |
216 | case FB_BLANK_UNBLANK: /* Unblanking */ | |
217 | val &= ~(TCX_THC_MISC_VSYNC_DIS | | |
218 | TCX_THC_MISC_HSYNC_DIS); | |
219 | val |= TCX_THC_MISC_VIDEO; | |
220 | par->flags &= ~TCX_FLAG_BLANKED; | |
221 | break; | |
222 | ||
223 | case FB_BLANK_NORMAL: /* Normal blanking */ | |
224 | val &= ~TCX_THC_MISC_VIDEO; | |
225 | par->flags |= TCX_FLAG_BLANKED; | |
226 | break; | |
227 | ||
228 | case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */ | |
229 | val |= TCX_THC_MISC_VSYNC_DIS; | |
230 | break; | |
231 | case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */ | |
232 | val |= TCX_THC_MISC_HSYNC_DIS; | |
233 | break; | |
234 | ||
235 | case FB_BLANK_POWERDOWN: /* Poweroff */ | |
236 | break; | |
237 | }; | |
238 | ||
239 | sbus_writel(val, &thc->thc_misc); | |
240 | ||
241 | spin_unlock_irqrestore(&par->lock, flags); | |
242 | ||
243 | return 0; | |
244 | } | |
245 | ||
246 | static struct sbus_mmap_map __tcx_mmap_map[TCX_MMAP_ENTRIES] = { | |
247 | { | |
248 | .voff = TCX_RAM8BIT, | |
249 | .size = SBUS_MMAP_FBSIZE(1) | |
250 | }, | |
251 | { | |
252 | .voff = TCX_RAM24BIT, | |
253 | .size = SBUS_MMAP_FBSIZE(4) | |
254 | }, | |
255 | { | |
256 | .voff = TCX_UNK3, | |
257 | .size = SBUS_MMAP_FBSIZE(8) | |
258 | }, | |
259 | { | |
260 | .voff = TCX_UNK4, | |
261 | .size = SBUS_MMAP_FBSIZE(8) | |
262 | }, | |
263 | { | |
264 | .voff = TCX_CONTROLPLANE, | |
265 | .size = SBUS_MMAP_FBSIZE(4) | |
266 | }, | |
267 | { | |
268 | .voff = TCX_UNK6, | |
269 | .size = SBUS_MMAP_FBSIZE(8) | |
270 | }, | |
271 | { | |
272 | .voff = TCX_UNK7, | |
273 | .size = SBUS_MMAP_FBSIZE(8) | |
274 | }, | |
275 | { | |
276 | .voff = TCX_TEC, | |
277 | .size = PAGE_SIZE | |
278 | }, | |
279 | { | |
280 | .voff = TCX_BTREGS, | |
281 | .size = PAGE_SIZE | |
282 | }, | |
283 | { | |
284 | .voff = TCX_THC, | |
285 | .size = PAGE_SIZE | |
286 | }, | |
287 | { | |
288 | .voff = TCX_DHC, | |
289 | .size = PAGE_SIZE | |
290 | }, | |
291 | { | |
292 | .voff = TCX_ALT, | |
293 | .size = PAGE_SIZE | |
294 | }, | |
295 | { | |
296 | .voff = TCX_UNK2, | |
297 | .size = 0x20000 | |
298 | }, | |
299 | { .size = 0 } | |
300 | }; | |
301 | ||
216d526c | 302 | static int tcx_mmap(struct fb_info *info, struct vm_area_struct *vma) |
1da177e4 LT |
303 | { |
304 | struct tcx_par *par = (struct tcx_par *)info->par; | |
305 | ||
306 | return sbusfb_mmap_helper(par->mmap_map, | |
307 | par->physbase, par->fbsize, | |
50312ce9 | 308 | par->which_io, vma); |
1da177e4 LT |
309 | } |
310 | ||
67a6680d CH |
311 | static int tcx_ioctl(struct fb_info *info, unsigned int cmd, |
312 | unsigned long arg) | |
1da177e4 LT |
313 | { |
314 | struct tcx_par *par = (struct tcx_par *) info->par; | |
315 | ||
316 | return sbusfb_ioctl_helper(cmd, arg, info, | |
317 | FBTYPE_TCXCOLOR, | |
318 | (par->lowdepth ? 8 : 24), | |
319 | par->fbsize); | |
320 | } | |
321 | ||
322 | /* | |
323 | * Initialisation | |
324 | */ | |
325 | ||
326 | static void | |
327 | tcx_init_fix(struct fb_info *info, int linebytes) | |
328 | { | |
329 | struct tcx_par *par = (struct tcx_par *)info->par; | |
330 | const char *tcx_name; | |
331 | ||
332 | if (par->lowdepth) | |
333 | tcx_name = "TCX8"; | |
334 | else | |
335 | tcx_name = "TCX24"; | |
336 | ||
337 | strlcpy(info->fix.id, tcx_name, sizeof(info->fix.id)); | |
338 | ||
339 | info->fix.type = FB_TYPE_PACKED_PIXELS; | |
340 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; | |
341 | ||
342 | info->fix.line_length = linebytes; | |
343 | ||
344 | info->fix.accel = FB_ACCEL_SUN_TCX; | |
345 | } | |
346 | ||
c7f439b9 DM |
347 | static void tcx_unmap_regs(struct of_device *op, struct fb_info *info, |
348 | struct tcx_par *par) | |
1da177e4 | 349 | { |
c7f439b9 | 350 | if (par->tec) |
e3a411a3 | 351 | of_iounmap(&op->resource[7], |
c7f439b9 DM |
352 | par->tec, sizeof(struct tcx_tec)); |
353 | if (par->thc) | |
e3a411a3 | 354 | of_iounmap(&op->resource[9], |
c7f439b9 DM |
355 | par->thc, sizeof(struct tcx_thc)); |
356 | if (par->bt) | |
e3a411a3 | 357 | of_iounmap(&op->resource[8], |
c7f439b9 DM |
358 | par->bt, sizeof(struct bt_regs)); |
359 | if (par->cplane) | |
e3a411a3 | 360 | of_iounmap(&op->resource[4], |
c7f439b9 DM |
361 | par->cplane, par->fbsize * sizeof(u32)); |
362 | if (info->screen_base) | |
e3a411a3 | 363 | of_iounmap(&op->resource[0], |
c7f439b9 | 364 | info->screen_base, par->fbsize); |
50312ce9 | 365 | } |
1da177e4 | 366 | |
5b81d689 RR |
367 | static int __devinit tcx_probe(struct of_device *op, |
368 | const struct of_device_id *match) | |
50312ce9 DM |
369 | { |
370 | struct device_node *dp = op->node; | |
c7f439b9 DM |
371 | struct fb_info *info; |
372 | struct tcx_par *par; | |
50312ce9 | 373 | int linebytes, i, err; |
1da177e4 | 374 | |
c7f439b9 | 375 | info = framebuffer_alloc(sizeof(struct tcx_par), &op->dev); |
1da177e4 | 376 | |
c7f439b9 DM |
377 | err = -ENOMEM; |
378 | if (!info) | |
379 | goto out_err; | |
380 | par = info->par; | |
1da177e4 | 381 | |
c7f439b9 DM |
382 | spin_lock_init(&par->lock); |
383 | ||
384 | par->lowdepth = | |
50312ce9 | 385 | (of_find_property(dp, "tcx-8-bit", NULL) != NULL); |
1da177e4 | 386 | |
6cd5a86b | 387 | sbusfb_fill_var(&info->var, dp, 8); |
c7f439b9 DM |
388 | info->var.red.length = 8; |
389 | info->var.green.length = 8; | |
390 | info->var.blue.length = 8; | |
1da177e4 | 391 | |
50312ce9 | 392 | linebytes = of_getintprop_default(dp, "linebytes", |
c7f439b9 DM |
393 | info->var.xres); |
394 | par->fbsize = PAGE_ALIGN(linebytes * info->var.yres); | |
1da177e4 | 395 | |
c7f439b9 | 396 | par->tec = of_ioremap(&op->resource[7], 0, |
50312ce9 | 397 | sizeof(struct tcx_tec), "tcx tec"); |
c7f439b9 | 398 | par->thc = of_ioremap(&op->resource[9], 0, |
50312ce9 | 399 | sizeof(struct tcx_thc), "tcx thc"); |
c7f439b9 | 400 | par->bt = of_ioremap(&op->resource[8], 0, |
50312ce9 | 401 | sizeof(struct bt_regs), "tcx dac"); |
c7f439b9 DM |
402 | info->screen_base = of_ioremap(&op->resource[0], 0, |
403 | par->fbsize, "tcx ram"); | |
404 | if (!par->tec || !par->thc || | |
405 | !par->bt || !info->screen_base) | |
406 | goto out_unmap_regs; | |
407 | ||
408 | memcpy(&par->mmap_map, &__tcx_mmap_map, sizeof(par->mmap_map)); | |
409 | if (!par->lowdepth) { | |
410 | par->cplane = of_ioremap(&op->resource[4], 0, | |
411 | par->fbsize * sizeof(u32), | |
50312ce9 | 412 | "tcx cplane"); |
c7f439b9 DM |
413 | if (!par->cplane) |
414 | goto out_unmap_regs; | |
1da177e4 | 415 | } else { |
c7f439b9 DM |
416 | par->mmap_map[1].size = SBUS_MMAP_EMPTY; |
417 | par->mmap_map[4].size = SBUS_MMAP_EMPTY; | |
418 | par->mmap_map[5].size = SBUS_MMAP_EMPTY; | |
419 | par->mmap_map[6].size = SBUS_MMAP_EMPTY; | |
1da177e4 LT |
420 | } |
421 | ||
403ae52a | 422 | par->physbase = op->resource[0].start; |
c7f439b9 | 423 | par->which_io = op->resource[0].flags & IORESOURCE_BITS; |
50312ce9 | 424 | |
1da177e4 LT |
425 | for (i = 0; i < TCX_MMAP_ENTRIES; i++) { |
426 | int j; | |
427 | ||
428 | switch (i) { | |
429 | case 10: | |
430 | j = 12; | |
431 | break; | |
432 | ||
433 | case 11: case 12: | |
434 | j = i - 1; | |
435 | break; | |
436 | ||
437 | default: | |
438 | j = i; | |
439 | break; | |
440 | }; | |
c7f439b9 | 441 | par->mmap_map[i].poff = op->resource[j].start; |
1da177e4 LT |
442 | } |
443 | ||
c7f439b9 DM |
444 | info->flags = FBINFO_DEFAULT; |
445 | info->fbops = &tcx_ops; | |
1da177e4 LT |
446 | |
447 | /* Initialize brooktree DAC. */ | |
c7f439b9 DM |
448 | sbus_writel(0x04 << 24, &par->bt->addr); /* color planes */ |
449 | sbus_writel(0xff << 24, &par->bt->control); | |
450 | sbus_writel(0x05 << 24, &par->bt->addr); | |
451 | sbus_writel(0x00 << 24, &par->bt->control); | |
452 | sbus_writel(0x06 << 24, &par->bt->addr); /* overlay plane */ | |
453 | sbus_writel(0x73 << 24, &par->bt->control); | |
454 | sbus_writel(0x07 << 24, &par->bt->addr); | |
455 | sbus_writel(0x00 << 24, &par->bt->control); | |
456 | ||
457 | tcx_reset(info); | |
1da177e4 | 458 | |
c7f439b9 | 459 | tcx_blank(FB_BLANK_UNBLANK, info); |
1da177e4 | 460 | |
c7f439b9 DM |
461 | if (fb_alloc_cmap(&info->cmap, 256, 0)) |
462 | goto out_unmap_regs; | |
463 | ||
464 | fb_set_cmap(&info->cmap, info); | |
465 | tcx_init_fix(info, linebytes); | |
466 | ||
467 | err = register_framebuffer(info); | |
468 | if (err < 0) | |
469 | goto out_dealloc_cmap; | |
1da177e4 | 470 | |
c7f439b9 | 471 | dev_set_drvdata(&op->dev, info); |
1da177e4 | 472 | |
194f1a68 | 473 | printk(KERN_INFO "%s: TCX at %lx:%lx, %s\n", |
50312ce9 | 474 | dp->full_name, |
c7f439b9 | 475 | par->which_io, |
403ae52a | 476 | par->physbase, |
c7f439b9 | 477 | par->lowdepth ? "8-bit only" : "24-bit depth"); |
50312ce9 DM |
478 | |
479 | return 0; | |
c7f439b9 DM |
480 | |
481 | out_dealloc_cmap: | |
482 | fb_dealloc_cmap(&info->cmap); | |
483 | ||
484 | out_unmap_regs: | |
485 | tcx_unmap_regs(op, info, par); | |
486 | ||
487 | out_err: | |
488 | return err; | |
50312ce9 | 489 | } |
1da177e4 | 490 | |
e3a411a3 | 491 | static int __devexit tcx_remove(struct of_device *op) |
50312ce9 | 492 | { |
c7f439b9 DM |
493 | struct fb_info *info = dev_get_drvdata(&op->dev); |
494 | struct tcx_par *par = info->par; | |
50312ce9 | 495 | |
c7f439b9 DM |
496 | unregister_framebuffer(info); |
497 | fb_dealloc_cmap(&info->cmap); | |
50312ce9 | 498 | |
c7f439b9 | 499 | tcx_unmap_regs(op, info, par); |
50312ce9 | 500 | |
c7f439b9 | 501 | framebuffer_release(info); |
50312ce9 | 502 | |
e3a411a3 | 503 | dev_set_drvdata(&op->dev, NULL); |
1da177e4 LT |
504 | |
505 | return 0; | |
506 | } | |
507 | ||
fd098316 | 508 | static const struct of_device_id tcx_match[] = { |
50312ce9 DM |
509 | { |
510 | .name = "SUNW,tcx", | |
511 | }, | |
512 | {}, | |
513 | }; | |
514 | MODULE_DEVICE_TABLE(of, tcx_match); | |
1da177e4 | 515 | |
50312ce9 DM |
516 | static struct of_platform_driver tcx_driver = { |
517 | .name = "tcx", | |
518 | .match_table = tcx_match, | |
519 | .probe = tcx_probe, | |
520 | .remove = __devexit_p(tcx_remove), | |
521 | }; | |
1da177e4 | 522 | |
f36861d5 | 523 | static int __init tcx_init(void) |
50312ce9 DM |
524 | { |
525 | if (fb_get_options("tcxfb", NULL)) | |
526 | return -ENODEV; | |
527 | ||
528 | return of_register_driver(&tcx_driver, &of_bus_type); | |
1da177e4 LT |
529 | } |
530 | ||
f36861d5 | 531 | static void __exit tcx_exit(void) |
1da177e4 | 532 | { |
50312ce9 | 533 | of_unregister_driver(&tcx_driver); |
1da177e4 LT |
534 | } |
535 | ||
536 | module_init(tcx_init); | |
1da177e4 | 537 | module_exit(tcx_exit); |
1da177e4 LT |
538 | |
539 | MODULE_DESCRIPTION("framebuffer driver for TCX chipsets"); | |
50312ce9 DM |
540 | MODULE_AUTHOR("David S. Miller <davem@davemloft.net>"); |
541 | MODULE_VERSION("2.0"); | |
1da177e4 | 542 | MODULE_LICENSE("GPL"); |