Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-block.git] / drivers / video / sh_mobile_lcdcfb.c
CommitLineData
cfb4f5d1
MD
1/*
2 * SuperH Mobile LCDC Framebuffer
3 *
4 * Copyright (c) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
f1f60b5f
LP
11#include <linux/atomic.h>
12#include <linux/backlight.h>
cfb4f5d1 13#include <linux/clk.h>
f1f60b5f 14#include <linux/console.h>
cfb4f5d1 15#include <linux/dma-mapping.h>
f1f60b5f
LP
16#include <linux/delay.h>
17#include <linux/gpio.h>
18#include <linux/init.h>
8564557a 19#include <linux/interrupt.h>
40331b21 20#include <linux/ioctl.h>
f1f60b5f
LP
21#include <linux/kernel.h>
22#include <linux/mm.h>
355b200b 23#include <linux/module.h>
f1f60b5f
LP
24#include <linux/platform_device.h>
25#include <linux/pm_runtime.h>
26#include <linux/slab.h>
27#include <linux/videodev2.h>
28#include <linux/vmalloc.h>
29
225c9a8d 30#include <video/sh_mobile_lcdc.h>
8a20974f 31#include <video/sh_mobile_meram.h>
cfb4f5d1 32
6de9edd5
GL
33#include "sh_mobile_lcdcfb.h"
34
a6f15ade
PE
35#define SIDE_B_OFFSET 0x1000
36#define MIRROR_OFFSET 0x2000
cfb4f5d1 37
d2ecbab5
GL
38#define MAX_XRES 1920
39#define MAX_YRES 1080
cfb4f5d1 40
f1f60b5f
LP
41struct sh_mobile_lcdc_priv {
42 void __iomem *base;
43 int irq;
44 atomic_t hw_usecnt;
45 struct device *dev;
46 struct clk *dot_clk;
47 unsigned long lddckr;
48 struct sh_mobile_lcdc_chan ch[2];
49 struct notifier_block notifier;
50 int started;
51 int forced_fourcc; /* 2 channel LCDC must share fourcc setting */
52 struct sh_mobile_meram_info *meram_dev;
53};
54
55/* -----------------------------------------------------------------------------
56 * Registers access
57 */
58
0246c471 59static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
cfb4f5d1
MD
60 [LDDCKPAT1R] = 0x400,
61 [LDDCKPAT2R] = 0x404,
62 [LDMT1R] = 0x418,
63 [LDMT2R] = 0x41c,
64 [LDMT3R] = 0x420,
65 [LDDFR] = 0x424,
66 [LDSM1R] = 0x428,
8564557a 67 [LDSM2R] = 0x42c,
cfb4f5d1 68 [LDSA1R] = 0x430,
53b50314 69 [LDSA2R] = 0x434,
cfb4f5d1
MD
70 [LDMLSR] = 0x438,
71 [LDHCNR] = 0x448,
72 [LDHSYNR] = 0x44c,
73 [LDVLNR] = 0x450,
74 [LDVSYNR] = 0x454,
75 [LDPMR] = 0x460,
6011bdea 76 [LDHAJR] = 0x4a0,
cfb4f5d1
MD
77};
78
0246c471 79static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
cfb4f5d1
MD
80 [LDDCKPAT1R] = 0x408,
81 [LDDCKPAT2R] = 0x40c,
82 [LDMT1R] = 0x600,
83 [LDMT2R] = 0x604,
84 [LDMT3R] = 0x608,
85 [LDDFR] = 0x60c,
86 [LDSM1R] = 0x610,
8564557a 87 [LDSM2R] = 0x614,
cfb4f5d1
MD
88 [LDSA1R] = 0x618,
89 [LDMLSR] = 0x620,
90 [LDHCNR] = 0x624,
91 [LDHSYNR] = 0x628,
92 [LDVLNR] = 0x62c,
93 [LDVSYNR] = 0x630,
94 [LDPMR] = 0x63c,
95};
96
a6f15ade
PE
97static bool banked(int reg_nr)
98{
99 switch (reg_nr) {
100 case LDMT1R:
101 case LDMT2R:
102 case LDMT3R:
103 case LDDFR:
104 case LDSM1R:
105 case LDSA1R:
53b50314 106 case LDSA2R:
a6f15ade
PE
107 case LDMLSR:
108 case LDHCNR:
109 case LDHSYNR:
110 case LDVLNR:
111 case LDVSYNR:
112 return true;
113 }
114 return false;
115}
116
f1f60b5f
LP
117static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
118{
b5ef967d 119 return chan->cfg->chan == LCDC_CHAN_SUBLCD;
f1f60b5f
LP
120}
121
cfb4f5d1
MD
122static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
123 int reg_nr, unsigned long data)
124{
125 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
a6f15ade
PE
126 if (banked(reg_nr))
127 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
128 SIDE_B_OFFSET);
129}
130
131static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
132 int reg_nr, unsigned long data)
133{
134 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
135 MIRROR_OFFSET);
cfb4f5d1
MD
136}
137
138static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
139 int reg_nr)
140{
141 return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
142}
143
144static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
145 unsigned long reg_offs, unsigned long data)
146{
147 iowrite32(data, priv->base + reg_offs);
148}
149
150static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
151 unsigned long reg_offs)
152{
153 return ioread32(priv->base + reg_offs);
154}
155
156static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
157 unsigned long reg_offs,
158 unsigned long mask, unsigned long until)
159{
160 while ((lcdc_read(priv, reg_offs) & mask) != until)
161 cpu_relax();
162}
163
f1f60b5f
LP
164/* -----------------------------------------------------------------------------
165 * Clock management
166 */
167
168static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
cfb4f5d1 169{
f1f60b5f
LP
170 if (atomic_inc_and_test(&priv->hw_usecnt)) {
171 if (priv->dot_clk)
172 clk_enable(priv->dot_clk);
173 pm_runtime_get_sync(priv->dev);
174 if (priv->meram_dev && priv->meram_dev->pdev)
175 pm_runtime_get_sync(&priv->meram_dev->pdev->dev);
176 }
cfb4f5d1
MD
177}
178
f1f60b5f
LP
179static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
180{
181 if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
182 if (priv->meram_dev && priv->meram_dev->pdev)
183 pm_runtime_put_sync(&priv->meram_dev->pdev->dev);
184 pm_runtime_put(priv->dev);
185 if (priv->dot_clk)
186 clk_disable(priv->dot_clk);
187 }
188}
189
0a7f17aa
LP
190static int sh_mobile_lcdc_setup_clocks(struct sh_mobile_lcdc_priv *priv,
191 int clock_source)
f1f60b5f 192{
4774c12a 193 struct clk *clk;
f1f60b5f
LP
194 char *str;
195
196 switch (clock_source) {
197 case LCDC_CLK_BUS:
198 str = "bus_clk";
199 priv->lddckr = LDDCKR_ICKSEL_BUS;
200 break;
201 case LCDC_CLK_PERIPHERAL:
202 str = "peripheral_clk";
203 priv->lddckr = LDDCKR_ICKSEL_MIPI;
204 break;
205 case LCDC_CLK_EXTERNAL:
206 str = NULL;
207 priv->lddckr = LDDCKR_ICKSEL_HDMI;
208 break;
209 default:
210 return -EINVAL;
211 }
212
4774c12a
LP
213 if (str == NULL)
214 return 0;
215
0a7f17aa 216 clk = clk_get(priv->dev, str);
4774c12a 217 if (IS_ERR(clk)) {
0a7f17aa 218 dev_err(priv->dev, "cannot get dot clock %s\n", str);
4774c12a 219 return PTR_ERR(clk);
f1f60b5f
LP
220 }
221
4774c12a 222 priv->dot_clk = clk;
f1f60b5f
LP
223 return 0;
224}
225
226/* -----------------------------------------------------------------------------
37c5dcc2 227 * Display, panel and deferred I/O
f1f60b5f
LP
228 */
229
cfb4f5d1
MD
230static void lcdc_sys_write_index(void *handle, unsigned long data)
231{
232 struct sh_mobile_lcdc_chan *ch = handle;
233
ce1c0b08
LP
234 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT);
235 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
236 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
237 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
238 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1
MD
239}
240
241static void lcdc_sys_write_data(void *handle, unsigned long data)
242{
243 struct sh_mobile_lcdc_chan *ch = handle;
244
ce1c0b08
LP
245 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT | LDDWDxR_RSW);
246 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
247 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
248 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
249 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1
MD
250}
251
252static unsigned long lcdc_sys_read_data(void *handle)
253{
254 struct sh_mobile_lcdc_chan *ch = handle;
255
ce1c0b08
LP
256 lcdc_write(ch->lcdc, _LDDRDR, LDDRDR_RSR);
257 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
258 lcdc_write(ch->lcdc, _LDDRAR, LDDRAR_RA |
259 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
cfb4f5d1 260 udelay(1);
ce1c0b08 261 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1 262
ce1c0b08 263 return lcdc_read(ch->lcdc, _LDDRDR) & LDDRDR_DRD_MASK;
cfb4f5d1
MD
264}
265
266struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
267 lcdc_sys_write_index,
268 lcdc_sys_write_data,
269 lcdc_sys_read_data,
270};
271
1c6a307a
PM
272static int sh_mobile_lcdc_sginit(struct fb_info *info,
273 struct list_head *pagelist)
274{
275 struct sh_mobile_lcdc_chan *ch = info->par;
58f03d99 276 unsigned int nr_pages_max = ch->fb_size >> PAGE_SHIFT;
1c6a307a
PM
277 struct page *page;
278 int nr_pages = 0;
279
280 sg_init_table(ch->sglist, nr_pages_max);
281
282 list_for_each_entry(page, pagelist, lru)
283 sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0);
284
285 return nr_pages;
286}
287
8564557a
MD
288static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
289 struct list_head *pagelist)
290{
291 struct sh_mobile_lcdc_chan *ch = info->par;
b5ef967d 292 const struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg->panel_cfg;
8564557a
MD
293
294 /* enable clocks before accessing hardware */
295 sh_mobile_lcdc_clk_on(ch->lcdc);
296
5c1a56b5
PM
297 /*
298 * It's possible to get here without anything on the pagelist via
299 * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync()
300 * invocation. In the former case, the acceleration routines are
301 * stepped in to when using the framebuffer console causing the
302 * workqueue to be scheduled without any dirty pages on the list.
303 *
304 * Despite this, a panel update is still needed given that the
305 * acceleration routines have their own methods for writing in
306 * that still need to be updated.
307 *
308 * The fsync() and empty pagelist case could be optimized for,
309 * but we don't bother, as any application exhibiting such
310 * behaviour is fundamentally broken anyways.
311 */
312 if (!list_empty(pagelist)) {
313 unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist);
314
315 /* trigger panel update */
e8363140 316 dma_map_sg(ch->lcdc->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
afaad83b
LP
317 if (panel->start_transfer)
318 panel->start_transfer(ch, &sh_mobile_lcdc_sys_bus_ops);
ce1c0b08 319 lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
e8363140
LP
320 dma_unmap_sg(ch->lcdc->dev, ch->sglist, nr_pages,
321 DMA_TO_DEVICE);
ef61aae4 322 } else {
afaad83b
LP
323 if (panel->start_transfer)
324 panel->start_transfer(ch, &sh_mobile_lcdc_sys_bus_ops);
ce1c0b08 325 lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
ef61aae4 326 }
8564557a
MD
327}
328
329static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
330{
331 struct fb_deferred_io *fbdefio = info->fbdefio;
332
333 if (fbdefio)
334 schedule_delayed_work(&info->deferred_work, fbdefio->delay);
335}
336
37c5dcc2
LP
337static void sh_mobile_lcdc_display_on(struct sh_mobile_lcdc_chan *ch)
338{
b5ef967d 339 const struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg->panel_cfg;
37c5dcc2 340
9a2985e7 341 if (ch->tx_dev) {
458981c3
LP
342 int ret;
343
344 ret = ch->tx_dev->ops->display_on(ch->tx_dev);
345 if (ret < 0)
9a2985e7 346 return;
458981c3
LP
347
348 if (ret == SH_MOBILE_LCDC_DISPLAY_DISCONNECTED)
349 ch->info->state = FBINFO_STATE_SUSPENDED;
9a2985e7
LP
350 }
351
37c5dcc2 352 /* HDMI must be enabled before LCDC configuration */
afaad83b
LP
353 if (panel->display_on)
354 panel->display_on();
37c5dcc2
LP
355}
356
357static void sh_mobile_lcdc_display_off(struct sh_mobile_lcdc_chan *ch)
358{
b5ef967d 359 const struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg->panel_cfg;
37c5dcc2 360
afaad83b
LP
361 if (panel->display_off)
362 panel->display_off();
9a2985e7
LP
363
364 if (ch->tx_dev)
365 ch->tx_dev->ops->display_off(ch->tx_dev);
37c5dcc2
LP
366}
367
ecd29947
LP
368static bool
369sh_mobile_lcdc_must_reconfigure(struct sh_mobile_lcdc_chan *ch,
e0c8601a 370 const struct fb_videomode *new_mode)
ecd29947 371{
ecd29947 372 dev_dbg(ch->info->dev, "Old %ux%u, new %ux%u\n",
2d04559d
LP
373 ch->display.mode.xres, ch->display.mode.yres,
374 new_mode->xres, new_mode->yres);
ecd29947 375
e0c8601a 376 /* It can be a different monitor with an equal video-mode */
2d04559d 377 if (fb_mode_is_equal(&ch->display.mode, new_mode))
ecd29947 378 return false;
ecd29947
LP
379
380 dev_dbg(ch->info->dev, "Switching %u -> %u lines\n",
2d04559d
LP
381 ch->display.mode.yres, new_mode->yres);
382 ch->display.mode = *new_mode;
ecd29947
LP
383
384 return true;
385}
386
387static int sh_mobile_check_var(struct fb_var_screeninfo *var,
388 struct fb_info *info);
389
390static int sh_mobile_lcdc_display_notify(struct sh_mobile_lcdc_chan *ch,
391 enum sh_mobile_lcdc_entity_event event,
e0c8601a
LP
392 const struct fb_videomode *mode,
393 const struct fb_monspecs *monspec)
ecd29947
LP
394{
395 struct fb_info *info = ch->info;
e0c8601a 396 struct fb_var_screeninfo var;
ecd29947
LP
397 int ret = 0;
398
399 switch (event) {
400 case SH_MOBILE_LCDC_EVENT_DISPLAY_CONNECT:
401 /* HDMI plug in */
402 if (lock_fb_info(info)) {
403 console_lock();
404
2d04559d
LP
405 ch->display.width = monspec->max_x * 10;
406 ch->display.height = monspec->max_y * 10;
e0c8601a
LP
407
408 if (!sh_mobile_lcdc_must_reconfigure(ch, mode) &&
ecd29947
LP
409 info->state == FBINFO_STATE_RUNNING) {
410 /* First activation with the default monitor.
411 * Just turn on, if we run a resume here, the
412 * logo disappears.
413 */
e0c8601a
LP
414 info->var.width = monspec->max_x * 10;
415 info->var.height = monspec->max_y * 10;
ecd29947
LP
416 sh_mobile_lcdc_display_on(ch);
417 } else {
418 /* New monitor or have to wake up */
419 fb_set_suspend(info, 0);
420 }
421
422 console_unlock();
423 unlock_fb_info(info);
424 }
425 break;
426
427 case SH_MOBILE_LCDC_EVENT_DISPLAY_DISCONNECT:
428 /* HDMI disconnect */
429 if (lock_fb_info(info)) {
430 console_lock();
431 fb_set_suspend(info, 1);
432 console_unlock();
433 unlock_fb_info(info);
434 }
435 break;
436
437 case SH_MOBILE_LCDC_EVENT_DISPLAY_MODE:
438 /* Validate a proposed new mode */
e0c8601a
LP
439 fb_videomode_to_var(&var, mode);
440 var.bits_per_pixel = info->var.bits_per_pixel;
441 var.grayscale = info->var.grayscale;
442 ret = sh_mobile_check_var(&var, info);
ecd29947
LP
443 break;
444 }
445
446 return ret;
447}
448
f1f60b5f
LP
449/* -----------------------------------------------------------------------------
450 * Format helpers
451 */
452
105784bb
LP
453struct sh_mobile_lcdc_format_info {
454 u32 fourcc;
455 unsigned int bpp;
456 bool yuv;
457 u32 lddfr;
458};
459
460static const struct sh_mobile_lcdc_format_info sh_mobile_format_infos[] = {
461 {
462 .fourcc = V4L2_PIX_FMT_RGB565,
463 .bpp = 16,
464 .yuv = false,
465 .lddfr = LDDFR_PKF_RGB16,
466 }, {
467 .fourcc = V4L2_PIX_FMT_BGR24,
468 .bpp = 24,
469 .yuv = false,
470 .lddfr = LDDFR_PKF_RGB24,
471 }, {
472 .fourcc = V4L2_PIX_FMT_BGR32,
473 .bpp = 32,
474 .yuv = false,
475 .lddfr = LDDFR_PKF_ARGB32,
476 }, {
477 .fourcc = V4L2_PIX_FMT_NV12,
478 .bpp = 12,
479 .yuv = true,
480 .lddfr = LDDFR_CC | LDDFR_YF_420,
481 }, {
482 .fourcc = V4L2_PIX_FMT_NV21,
483 .bpp = 12,
484 .yuv = true,
485 .lddfr = LDDFR_CC | LDDFR_YF_420,
486 }, {
487 .fourcc = V4L2_PIX_FMT_NV16,
488 .bpp = 16,
489 .yuv = true,
490 .lddfr = LDDFR_CC | LDDFR_YF_422,
491 }, {
492 .fourcc = V4L2_PIX_FMT_NV61,
493 .bpp = 16,
494 .yuv = true,
495 .lddfr = LDDFR_CC | LDDFR_YF_422,
496 }, {
497 .fourcc = V4L2_PIX_FMT_NV24,
498 .bpp = 24,
499 .yuv = true,
500 .lddfr = LDDFR_CC | LDDFR_YF_444,
501 }, {
502 .fourcc = V4L2_PIX_FMT_NV42,
503 .bpp = 24,
504 .yuv = true,
505 .lddfr = LDDFR_CC | LDDFR_YF_444,
506 },
507};
508
509static const struct sh_mobile_lcdc_format_info *
510sh_mobile_format_info(u32 fourcc)
511{
512 unsigned int i;
513
514 for (i = 0; i < ARRAY_SIZE(sh_mobile_format_infos); ++i) {
515 if (sh_mobile_format_infos[i].fourcc == fourcc)
516 return &sh_mobile_format_infos[i];
517 }
518
519 return NULL;
520}
521
f1f60b5f
LP
522static int sh_mobile_format_fourcc(const struct fb_var_screeninfo *var)
523{
524 if (var->grayscale > 1)
525 return var->grayscale;
526
527 switch (var->bits_per_pixel) {
528 case 16:
529 return V4L2_PIX_FMT_RGB565;
530 case 24:
531 return V4L2_PIX_FMT_BGR24;
532 case 32:
533 return V4L2_PIX_FMT_BGR32;
534 default:
535 return 0;
536 }
537}
538
539static int sh_mobile_format_is_fourcc(const struct fb_var_screeninfo *var)
540{
541 return var->grayscale > 1;
542}
543
f1f60b5f
LP
544/* -----------------------------------------------------------------------------
545 * Start, stop and IRQ
546 */
547
8564557a
MD
548static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
549{
550 struct sh_mobile_lcdc_priv *priv = data;
2feb075a 551 struct sh_mobile_lcdc_chan *ch;
9dd38819 552 unsigned long ldintr;
2feb075a
MD
553 int is_sub;
554 int k;
8564557a 555
dc48665f
LP
556 /* Acknowledge interrupts and disable further VSYNC End IRQs. */
557 ldintr = lcdc_read(priv, _LDINTR);
558 lcdc_write(priv, _LDINTR, (ldintr ^ LDINTR_STATUS_MASK) & ~LDINTR_VEE);
8564557a 559
2feb075a 560 /* figure out if this interrupt is for main or sub lcd */
ce1c0b08 561 is_sub = (lcdc_read(priv, _LDSR) & LDSR_MSS) ? 1 : 0;
2feb075a 562
9dd38819 563 /* wake up channel and disable clocks */
2feb075a
MD
564 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
565 ch = &priv->ch[k];
566
567 if (!ch->enabled)
568 continue;
569
dc48665f 570 /* Frame End */
9dd38819
PE
571 if (ldintr & LDINTR_FS) {
572 if (is_sub == lcdc_chan_is_sublcd(ch)) {
573 ch->frame_end = 1;
574 wake_up(&ch->frame_end_wait);
2feb075a 575
9dd38819
PE
576 sh_mobile_lcdc_clk_off(priv);
577 }
578 }
579
580 /* VSYNC End */
40331b21
PE
581 if (ldintr & LDINTR_VES)
582 complete(&ch->vsync_completion);
2feb075a
MD
583 }
584
8564557a
MD
585 return IRQ_HANDLED;
586}
587
4976677f
LP
588static int sh_mobile_wait_for_vsync(struct sh_mobile_lcdc_chan *ch)
589{
590 unsigned long ldintr;
591 int ret;
592
593 /* Enable VSync End interrupt and be careful not to acknowledge any
594 * pending interrupt.
595 */
596 ldintr = lcdc_read(ch->lcdc, _LDINTR);
597 ldintr |= LDINTR_VEE | LDINTR_STATUS_MASK;
598 lcdc_write(ch->lcdc, _LDINTR, ldintr);
599
600 ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion,
601 msecs_to_jiffies(100));
602 if (!ret)
603 return -ETIMEDOUT;
604
605 return 0;
606}
607
cfb4f5d1
MD
608static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
609 int start)
610{
611 unsigned long tmp = lcdc_read(priv, _LDCNT2R);
612 int k;
613
614 /* start or stop the lcdc */
615 if (start)
ce1c0b08 616 lcdc_write(priv, _LDCNT2R, tmp | LDCNT2R_DO);
cfb4f5d1 617 else
ce1c0b08 618 lcdc_write(priv, _LDCNT2R, tmp & ~LDCNT2R_DO);
cfb4f5d1
MD
619
620 /* wait until power is applied/stopped on all channels */
621 for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
622 if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
623 while (1) {
ce1c0b08
LP
624 tmp = lcdc_read_chan(&priv->ch[k], LDPMR)
625 & LDPMR_LPS;
626 if (start && tmp == LDPMR_LPS)
cfb4f5d1
MD
627 break;
628 if (!start && tmp == 0)
629 break;
630 cpu_relax();
631 }
632
633 if (!start)
634 lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
635}
636
6011bdea
GL
637static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch)
638{
2d04559d
LP
639 const struct fb_var_screeninfo *var = &ch->info->var;
640 const struct fb_videomode *mode = &ch->display.mode;
1c120deb 641 unsigned long h_total, hsync_pos, display_h_total;
6011bdea
GL
642 u32 tmp;
643
644 tmp = ch->ldmt1r_value;
ce1c0b08
LP
645 tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : LDMT1R_VPOL;
646 tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : LDMT1R_HPOL;
b5ef967d
LP
647 tmp |= (ch->cfg->flags & LCDC_FLAGS_DWPOL) ? LDMT1R_DWPOL : 0;
648 tmp |= (ch->cfg->flags & LCDC_FLAGS_DIPOL) ? LDMT1R_DIPOL : 0;
649 tmp |= (ch->cfg->flags & LCDC_FLAGS_DAPOL) ? LDMT1R_DAPOL : 0;
650 tmp |= (ch->cfg->flags & LCDC_FLAGS_HSCNT) ? LDMT1R_HSCNT : 0;
651 tmp |= (ch->cfg->flags & LCDC_FLAGS_DWCNT) ? LDMT1R_DWCNT : 0;
6011bdea
GL
652 lcdc_write_chan(ch, LDMT1R, tmp);
653
654 /* setup SYS bus */
b5ef967d
LP
655 lcdc_write_chan(ch, LDMT2R, ch->cfg->sys_bus_cfg.ldmt2r);
656 lcdc_write_chan(ch, LDMT3R, ch->cfg->sys_bus_cfg.ldmt3r);
6011bdea
GL
657
658 /* horizontal configuration */
2d04559d
LP
659 h_total = mode->xres + mode->hsync_len + mode->left_margin
660 + mode->right_margin;
6011bdea 661 tmp = h_total / 8; /* HTCN */
58f03d99 662 tmp |= (min(mode->xres, ch->xres) / 8) << 16; /* HDCN */
6011bdea
GL
663 lcdc_write_chan(ch, LDHCNR, tmp);
664
2d04559d 665 hsync_pos = mode->xres + mode->right_margin;
6011bdea 666 tmp = hsync_pos / 8; /* HSYNP */
2d04559d 667 tmp |= (mode->hsync_len / 8) << 16; /* HSYNW */
6011bdea
GL
668 lcdc_write_chan(ch, LDHSYNR, tmp);
669
670 /* vertical configuration */
2d04559d
LP
671 tmp = mode->yres + mode->vsync_len + mode->upper_margin
672 + mode->lower_margin; /* VTLN */
58f03d99 673 tmp |= min(mode->yres, ch->yres) << 16; /* VDLN */
6011bdea
GL
674 lcdc_write_chan(ch, LDVLNR, tmp);
675
2d04559d
LP
676 tmp = mode->yres + mode->lower_margin; /* VSYNP */
677 tmp |= mode->vsync_len << 16; /* VSYNW */
6011bdea
GL
678 lcdc_write_chan(ch, LDVSYNR, tmp);
679
680 /* Adjust horizontal synchronisation for HDMI */
2d04559d
LP
681 display_h_total = mode->xres + mode->hsync_len + mode->left_margin
682 + mode->right_margin;
683 tmp = ((mode->xres & 7) << 24) | ((display_h_total & 7) << 16)
684 | ((mode->hsync_len & 7) << 8) | (hsync_pos & 7);
6011bdea
GL
685 lcdc_write_chan(ch, LDHAJR, tmp);
686}
687
9a217e34
LP
688/*
689 * __sh_mobile_lcdc_start - Configure and tart the LCDC
690 * @priv: LCDC device
691 *
692 * Configure all enabled channels and start the LCDC device. All external
693 * devices (clocks, MERAM, panels, ...) are not touched by this function.
694 */
695static void __sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
cfb4f5d1
MD
696{
697 struct sh_mobile_lcdc_chan *ch;
cfb4f5d1 698 unsigned long tmp;
9a217e34 699 int k, m;
8564557a 700
9a217e34
LP
701 /* Enable LCDC channels. Read data from external memory, avoid using the
702 * BEU for now.
703 */
704 lcdc_write(priv, _LDCNT2R, priv->ch[0].enabled | priv->ch[1].enabled);
cfb4f5d1 705
9a217e34 706 /* Stop the LCDC first and disable all interrupts. */
cfb4f5d1 707 sh_mobile_lcdc_start_stop(priv, 0);
9a217e34 708 lcdc_write(priv, _LDINTR, 0);
cfb4f5d1 709
9a217e34 710 /* Configure power supply, dot clocks and start them. */
cfb4f5d1
MD
711 tmp = priv->lddckr;
712 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
713 ch = &priv->ch[k];
9a217e34 714 if (!ch->enabled)
cfb4f5d1
MD
715 continue;
716
9a217e34
LP
717 /* Power supply */
718 lcdc_write_chan(ch, LDPMR, 0);
719
b5ef967d 720 m = ch->cfg->clock_divider;
cfb4f5d1
MD
721 if (!m)
722 continue;
723
505c7de5
LP
724 /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider
725 * denominator.
726 */
727 lcdc_write_chan(ch, LDDCKPAT1R, 0);
728 lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
729
cfb4f5d1 730 if (m == 1)
ce1c0b08 731 m = LDDCKR_MOSEL;
cfb4f5d1 732 tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);
cfb4f5d1
MD
733 }
734
735 lcdc_write(priv, _LDDCKR, tmp);
cfb4f5d1
MD
736 lcdc_write(priv, _LDDCKSTPR, 0);
737 lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
738
9a217e34 739 /* Setup geometry, format, frame buffer memory and operation mode. */
cfb4f5d1
MD
740 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
741 ch = &priv->ch[k];
cfb4f5d1
MD
742 if (!ch->enabled)
743 continue;
744
6011bdea 745 sh_mobile_lcdc_geometry(ch);
cfb4f5d1 746
fc9e78e6 747 tmp = ch->format->lddfr;
edd153a3 748
fc9e78e6 749 if (ch->format->yuv) {
58f03d99 750 switch (ch->colorspace) {
edd153a3
LP
751 case V4L2_COLORSPACE_REC709:
752 tmp |= LDDFR_CF1;
53b50314 753 break;
edd153a3
LP
754 case V4L2_COLORSPACE_JPEG:
755 tmp |= LDDFR_CF0;
53b50314
DHG
756 break;
757 }
417d4827 758 }
7caa4342 759
9a217e34
LP
760 lcdc_write_chan(ch, LDDFR, tmp);
761 lcdc_write_chan(ch, LDMLSR, ch->pitch);
762 lcdc_write_chan(ch, LDSA1R, ch->base_addr_y);
fc9e78e6 763 if (ch->format->yuv)
9a217e34 764 lcdc_write_chan(ch, LDSA2R, ch->base_addr_c);
7caa4342 765
9a217e34
LP
766 /* When using deferred I/O mode, configure the LCDC for one-shot
767 * operation and enable the frame end interrupt. Otherwise use
768 * continuous read mode.
769 */
770 if (ch->ldmt1r_value & LDMT1R_IFM &&
b5ef967d 771 ch->cfg->sys_bus_cfg.deferred_io_msec) {
9a217e34
LP
772 lcdc_write_chan(ch, LDSM1R, LDSM1R_OS);
773 lcdc_write(priv, _LDINTR, LDINTR_FE);
774 } else {
775 lcdc_write_chan(ch, LDSM1R, 0);
776 }
777 }
7caa4342 778
9a217e34 779 /* Word and long word swap. */
fc9e78e6 780 switch (priv->ch[0].format->fourcc) {
edd153a3
LP
781 case V4L2_PIX_FMT_RGB565:
782 case V4L2_PIX_FMT_NV21:
783 case V4L2_PIX_FMT_NV61:
784 case V4L2_PIX_FMT_NV42:
785 tmp = LDDDSR_LS | LDDDSR_WS;
786 break;
787 case V4L2_PIX_FMT_BGR24:
788 case V4L2_PIX_FMT_NV12:
789 case V4L2_PIX_FMT_NV16:
790 case V4L2_PIX_FMT_NV24:
9a217e34 791 tmp = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS;
edd153a3
LP
792 break;
793 case V4L2_PIX_FMT_BGR32:
794 default:
795 tmp = LDDDSR_LS;
796 break;
9a217e34
LP
797 }
798 lcdc_write(priv, _LDDDSR, tmp);
7caa4342 799
9a217e34
LP
800 /* Enable the display output. */
801 lcdc_write(priv, _LDCNT1R, LDCNT1R_DE);
802 sh_mobile_lcdc_start_stop(priv, 1);
803 priv->started = 1;
804}
cfb4f5d1 805
9a217e34
LP
806static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
807{
808 struct sh_mobile_meram_info *mdev = priv->meram_dev;
9a217e34
LP
809 struct sh_mobile_lcdc_chan *ch;
810 unsigned long tmp;
811 int ret;
812 int k;
cfb4f5d1 813
9a217e34
LP
814 /* enable clocks before accessing the hardware */
815 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
816 if (priv->ch[k].enabled)
817 sh_mobile_lcdc_clk_on(priv);
818 }
8564557a 819
9a217e34
LP
820 /* reset */
821 lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LDCNT2R_BR);
822 lcdc_wait_bit(priv, _LDCNT2R, LDCNT2R_BR, 0);
8564557a 823
9a217e34 824 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
b5ef967d 825 const struct sh_mobile_lcdc_panel_cfg *panel;
8564557a 826
37c5dcc2 827 ch = &priv->ch[k];
9a217e34
LP
828 if (!ch->enabled)
829 continue;
830
b5ef967d 831 panel = &ch->cfg->panel_cfg;
afaad83b
LP
832 if (panel->setup_sys) {
833 ret = panel->setup_sys(ch, &sh_mobile_lcdc_sys_bus_ops);
9a217e34
LP
834 if (ret)
835 return ret;
8564557a 836 }
cfb4f5d1
MD
837 }
838
9a217e34
LP
839 /* Compute frame buffer base address and pitch for each channel. */
840 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
9a217e34 841 int pixelformat;
48110050 842 void *meram;
cfb4f5d1 843
9a217e34
LP
844 ch = &priv->ch[k];
845 if (!ch->enabled)
846 continue;
cfb4f5d1 847
58f03d99
LP
848 ch->base_addr_y = ch->dma_handle;
849 ch->base_addr_c = ch->base_addr_y + ch->xres * ch->yres_virtual;
9a217e34
LP
850
851 /* Enable MERAM if possible. */
b5ef967d
LP
852 if (mdev == NULL || mdev->ops == NULL ||
853 ch->cfg->meram_cfg == NULL)
9a217e34
LP
854 continue;
855
856 /* we need to de-init configured ICBs before we can
857 * re-initialize them.
858 */
48110050
LP
859 if (ch->meram) {
860 mdev->ops->meram_unregister(mdev, ch->meram);
861 ch->meram = NULL;
9a217e34
LP
862 }
863
fc9e78e6 864 switch (ch->format->fourcc) {
edd153a3
LP
865 case V4L2_PIX_FMT_NV12:
866 case V4L2_PIX_FMT_NV21:
867 case V4L2_PIX_FMT_NV16:
868 case V4L2_PIX_FMT_NV61:
9a217e34 869 pixelformat = SH_MOBILE_MERAM_PF_NV;
edd153a3
LP
870 break;
871 case V4L2_PIX_FMT_NV24:
872 case V4L2_PIX_FMT_NV42:
873 pixelformat = SH_MOBILE_MERAM_PF_NV24;
874 break;
875 case V4L2_PIX_FMT_RGB565:
876 case V4L2_PIX_FMT_BGR24:
877 case V4L2_PIX_FMT_BGR32:
878 default:
879 pixelformat = SH_MOBILE_MERAM_PF_RGB;
880 break;
881 }
9a217e34 882
b5ef967d
LP
883 meram = mdev->ops->meram_register(mdev, ch->cfg->meram_cfg,
884 ch->pitch, ch->yres, pixelformat,
9a217e34 885 &ch->pitch);
97d16fe6
LP
886 if (!IS_ERR(meram)) {
887 mdev->ops->meram_update(mdev, meram,
888 ch->base_addr_y, ch->base_addr_c,
889 &ch->base_addr_y, &ch->base_addr_c);
48110050 890 ch->meram = meram;
97d16fe6 891 }
9a217e34
LP
892 }
893
894 /* Start the LCDC. */
895 __sh_mobile_lcdc_start(priv);
896
897 /* Setup deferred I/O, tell the board code to enable the panels, and
898 * turn backlight on.
899 */
cfb4f5d1
MD
900 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
901 ch = &priv->ch[k];
21bc1f02
MD
902 if (!ch->enabled)
903 continue;
904
b5ef967d 905 tmp = ch->cfg->sys_bus_cfg.deferred_io_msec;
9a217e34
LP
906 if (ch->ldmt1r_value & LDMT1R_IFM && tmp) {
907 ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
908 ch->defio.delay = msecs_to_jiffies(tmp);
909 ch->info->fbdefio = &ch->defio;
910 fb_deferred_io_init(ch->info);
911 }
912
37c5dcc2 913 sh_mobile_lcdc_display_on(ch);
3b0fd9d7
AC
914
915 if (ch->bl) {
916 ch->bl->props.power = FB_BLANK_UNBLANK;
917 backlight_update_status(ch->bl);
918 }
cfb4f5d1
MD
919 }
920
921 return 0;
922}
923
924static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
925{
926 struct sh_mobile_lcdc_chan *ch;
cfb4f5d1
MD
927 int k;
928
2feb075a 929 /* clean up deferred io and ask board code to disable panel */
cfb4f5d1
MD
930 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
931 ch = &priv->ch[k];
21bc1f02
MD
932 if (!ch->enabled)
933 continue;
8564557a 934
2feb075a
MD
935 /* deferred io mode:
936 * flush frame, and wait for frame end interrupt
937 * clean up deferred io and enable clock
938 */
5ef6b505 939 if (ch->info && ch->info->fbdefio) {
2feb075a 940 ch->frame_end = 0;
e33afddc 941 schedule_delayed_work(&ch->info->deferred_work, 0);
2feb075a 942 wait_event(ch->frame_end_wait, ch->frame_end);
e33afddc
PM
943 fb_deferred_io_cleanup(ch->info);
944 ch->info->fbdefio = NULL;
2feb075a 945 sh_mobile_lcdc_clk_on(priv);
8564557a 946 }
2feb075a 947
3b0fd9d7
AC
948 if (ch->bl) {
949 ch->bl->props.power = FB_BLANK_POWERDOWN;
950 backlight_update_status(ch->bl);
951 }
952
37c5dcc2 953 sh_mobile_lcdc_display_off(ch);
7caa4342
D
954
955 /* disable the meram */
48110050 956 if (ch->meram) {
7caa4342 957 struct sh_mobile_meram_info *mdev;
7caa4342 958 mdev = priv->meram_dev;
48110050
LP
959 mdev->ops->meram_unregister(mdev, ch->meram);
960 ch->meram = 0;
7caa4342
D
961 }
962
cfb4f5d1
MD
963 }
964
965 /* stop the lcdc */
8e9bb19e
MD
966 if (priv->started) {
967 sh_mobile_lcdc_start_stop(priv, 0);
968 priv->started = 0;
969 }
b51339ff 970
8564557a
MD
971 /* stop clocks */
972 for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
973 if (priv->ch[k].enabled)
974 sh_mobile_lcdc_clk_off(priv);
cfb4f5d1
MD
975}
976
f1f60b5f
LP
977/* -----------------------------------------------------------------------------
978 * Frame buffer operations
979 */
cfb4f5d1
MD
980
981static int sh_mobile_lcdc_setcolreg(u_int regno,
982 u_int red, u_int green, u_int blue,
983 u_int transp, struct fb_info *info)
984{
985 u32 *palette = info->pseudo_palette;
986
987 if (regno >= PALETTE_NR)
988 return -EINVAL;
989
990 /* only FB_VISUAL_TRUECOLOR supported */
991
992 red >>= 16 - info->var.red.length;
993 green >>= 16 - info->var.green.length;
994 blue >>= 16 - info->var.blue.length;
995 transp >>= 16 - info->var.transp.length;
996
997 palette[regno] = (red << info->var.red.offset) |
998 (green << info->var.green.offset) |
999 (blue << info->var.blue.offset) |
1000 (transp << info->var.transp.offset);
1001
1002 return 0;
1003}
1004
1005static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
1006 .id = "SH Mobile LCDC",
1007 .type = FB_TYPE_PACKED_PIXELS,
1008 .visual = FB_VISUAL_TRUECOLOR,
1009 .accel = FB_ACCEL_NONE,
9dd38819
PE
1010 .xpanstep = 0,
1011 .ypanstep = 1,
1012 .ywrapstep = 0,
edd153a3 1013 .capabilities = FB_CAP_FOURCC,
cfb4f5d1
MD
1014};
1015
8564557a
MD
1016static void sh_mobile_lcdc_fillrect(struct fb_info *info,
1017 const struct fb_fillrect *rect)
1018{
1019 sys_fillrect(info, rect);
1020 sh_mobile_lcdc_deferred_io_touch(info);
1021}
1022
1023static void sh_mobile_lcdc_copyarea(struct fb_info *info,
1024 const struct fb_copyarea *area)
1025{
1026 sys_copyarea(info, area);
1027 sh_mobile_lcdc_deferred_io_touch(info);
1028}
1029
1030static void sh_mobile_lcdc_imageblit(struct fb_info *info,
1031 const struct fb_image *image)
1032{
1033 sys_imageblit(info, image);
1034 sh_mobile_lcdc_deferred_io_touch(info);
1035}
1036
9dd38819
PE
1037static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
1038 struct fb_info *info)
1039{
1040 struct sh_mobile_lcdc_chan *ch = info->par;
92e1f9a7
PE
1041 struct sh_mobile_lcdc_priv *priv = ch->lcdc;
1042 unsigned long ldrcntr;
1043 unsigned long new_pan_offset;
53b50314
DHG
1044 unsigned long base_addr_y, base_addr_c;
1045 unsigned long c_offset;
92e1f9a7 1046
58f03d99
LP
1047 if (!ch->format->yuv)
1048 new_pan_offset = var->yoffset * ch->pitch
1049 + var->xoffset * (ch->format->bpp / 8);
53b50314 1050 else
58f03d99 1051 new_pan_offset = var->yoffset * ch->pitch + var->xoffset;
9dd38819 1052
92e1f9a7 1053 if (new_pan_offset == ch->pan_offset)
9dd38819
PE
1054 return 0; /* No change, do nothing */
1055
92e1f9a7 1056 ldrcntr = lcdc_read(priv, _LDRCNTR);
9dd38819 1057
92e1f9a7 1058 /* Set the source address for the next refresh */
53b50314 1059 base_addr_y = ch->dma_handle + new_pan_offset;
58f03d99 1060 if (ch->format->yuv) {
53b50314 1061 /* Set y offset */
58f03d99
LP
1062 c_offset = var->yoffset * ch->pitch
1063 * (ch->format->bpp - 8) / 8;
1064 base_addr_c = ch->dma_handle + ch->xres * ch->yres_virtual
dc1d5ada 1065 + c_offset;
53b50314 1066 /* Set x offset */
fc9e78e6 1067 if (ch->format->fourcc == V4L2_PIX_FMT_NV24)
53b50314
DHG
1068 base_addr_c += 2 * var->xoffset;
1069 else
1070 base_addr_c += var->xoffset;
49d79ba2 1071 }
53b50314 1072
48110050 1073 if (ch->meram) {
7caa4342 1074 struct sh_mobile_meram_info *mdev;
7caa4342 1075
7caa4342 1076 mdev = priv->meram_dev;
cdf88b90 1077 mdev->ops->meram_update(mdev, ch->meram,
7caa4342 1078 base_addr_y, base_addr_c,
49d79ba2 1079 &base_addr_y, &base_addr_c);
49d79ba2 1080 }
7caa4342 1081
49d79ba2
LP
1082 ch->base_addr_y = base_addr_y;
1083 ch->base_addr_c = base_addr_c;
7caa4342 1084
49d79ba2 1085 lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y);
58f03d99 1086 if (ch->format->yuv)
49d79ba2 1087 lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c);
53b50314 1088
92e1f9a7
PE
1089 if (lcdc_chan_is_sublcd(ch))
1090 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
1091 else
1092 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);
1093
1094 ch->pan_offset = new_pan_offset;
1095
1096 sh_mobile_lcdc_deferred_io_touch(info);
9dd38819
PE
1097
1098 return 0;
1099}
1100
40331b21
PE
1101static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd,
1102 unsigned long arg)
1103{
1104 int retval;
1105
1106 switch (cmd) {
1107 case FBIO_WAITFORVSYNC:
4976677f 1108 retval = sh_mobile_wait_for_vsync(info->par);
40331b21
PE
1109 break;
1110
1111 default:
1112 retval = -ENOIOCTLCMD;
1113 break;
1114 }
1115 return retval;
1116}
1117
dd210503
GL
1118static void sh_mobile_fb_reconfig(struct fb_info *info)
1119{
1120 struct sh_mobile_lcdc_chan *ch = info->par;
2d04559d
LP
1121 struct fb_var_screeninfo var;
1122 struct fb_videomode mode;
dd210503
GL
1123 struct fb_event event;
1124 int evnt = FB_EVENT_MODE_CHANGE_ALL;
1125
1126 if (ch->use_count > 1 || (ch->use_count == 1 && !info->fbcon_par))
1127 /* More framebuffer users are active */
1128 return;
1129
2d04559d 1130 fb_var_to_videomode(&mode, &info->var);
dd210503 1131
2d04559d 1132 if (fb_mode_is_equal(&ch->display.mode, &mode))
dd210503
GL
1133 return;
1134
1135 /* Display has been re-plugged, framebuffer is free now, reconfigure */
2d04559d
LP
1136 var = info->var;
1137 fb_videomode_to_var(&var, &ch->display.mode);
1138 var.width = ch->display.width;
1139 var.height = ch->display.height;
1140 var.activate = FB_ACTIVATE_NOW;
1141
1142 if (fb_set_var(info, &var) < 0)
dd210503
GL
1143 /* Couldn't reconfigure, hopefully, can continue as before */
1144 return;
1145
dd210503
GL
1146 /*
1147 * fb_set_var() calls the notifier change internally, only if
1148 * FBINFO_MISC_USEREVENT flag is set. Since we do not want to fake a
1149 * user event, we have to call the chain ourselves.
1150 */
1151 event.info = info;
2d04559d 1152 event.data = &ch->display.mode;
dd210503
GL
1153 fb_notifier_call_chain(evnt, &event);
1154}
1155
1156/*
1157 * Locking: both .fb_release() and .fb_open() are called with info->lock held if
1158 * user == 1, or with console sem held, if user == 0.
1159 */
1160static int sh_mobile_release(struct fb_info *info, int user)
1161{
1162 struct sh_mobile_lcdc_chan *ch = info->par;
1163
1164 mutex_lock(&ch->open_lock);
1165 dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
1166
1167 ch->use_count--;
1168
1169 /* Nothing to reconfigure, when called from fbcon */
1170 if (user) {
ac751efa 1171 console_lock();
dd210503 1172 sh_mobile_fb_reconfig(info);
ac751efa 1173 console_unlock();
dd210503
GL
1174 }
1175
1176 mutex_unlock(&ch->open_lock);
1177
1178 return 0;
1179}
1180
1181static int sh_mobile_open(struct fb_info *info, int user)
1182{
1183 struct sh_mobile_lcdc_chan *ch = info->par;
1184
1185 mutex_lock(&ch->open_lock);
1186 ch->use_count++;
1187
1188 dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
1189 mutex_unlock(&ch->open_lock);
1190
1191 return 0;
1192}
1193
1194static int sh_mobile_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
1195{
1196 struct sh_mobile_lcdc_chan *ch = info->par;
417d4827 1197 struct sh_mobile_lcdc_priv *p = ch->lcdc;
03862194
LP
1198 unsigned int best_dist = (unsigned int)-1;
1199 unsigned int best_xres = 0;
1200 unsigned int best_yres = 0;
1201 unsigned int i;
dd210503 1202
03862194 1203 if (var->xres > MAX_XRES || var->yres > MAX_YRES)
dd210503 1204 return -EINVAL;
03862194
LP
1205
1206 /* If board code provides us with a list of available modes, make sure
1207 * we use one of them. Find the mode closest to the requested one. The
1208 * distance between two modes is defined as the size of the
1209 * non-overlapping parts of the two rectangles.
1210 */
b5ef967d
LP
1211 for (i = 0; i < ch->cfg->num_modes; ++i) {
1212 const struct fb_videomode *mode = &ch->cfg->lcd_modes[i];
03862194
LP
1213 unsigned int dist;
1214
1215 /* We can only round up. */
1216 if (var->xres > mode->xres || var->yres > mode->yres)
1217 continue;
1218
1219 dist = var->xres * var->yres + mode->xres * mode->yres
1220 - 2 * min(var->xres, mode->xres)
1221 * min(var->yres, mode->yres);
1222
1223 if (dist < best_dist) {
1224 best_xres = mode->xres;
1225 best_yres = mode->yres;
1226 best_dist = dist;
1227 }
dd210503 1228 }
417d4827 1229
03862194 1230 /* If no available mode can be used, return an error. */
b5ef967d 1231 if (ch->cfg->num_modes != 0) {
03862194
LP
1232 if (best_dist == (unsigned int)-1)
1233 return -EINVAL;
1234
1235 var->xres = best_xres;
1236 var->yres = best_yres;
1237 }
1238
1239 /* Make sure the virtual resolution is at least as big as the visible
1240 * resolution.
1241 */
1242 if (var->xres_virtual < var->xres)
1243 var->xres_virtual = var->xres;
1244 if (var->yres_virtual < var->yres)
1245 var->yres_virtual = var->yres;
1246
edd153a3 1247 if (sh_mobile_format_is_fourcc(var)) {
105784bb
LP
1248 const struct sh_mobile_lcdc_format_info *format;
1249
1250 format = sh_mobile_format_info(var->grayscale);
1251 if (format == NULL)
edd153a3 1252 return -EINVAL;
105784bb 1253 var->bits_per_pixel = format->bpp;
edd153a3
LP
1254
1255 /* Default to RGB and JPEG color-spaces for RGB and YUV formats
1256 * respectively.
1257 */
105784bb 1258 if (!format->yuv)
edd153a3
LP
1259 var->colorspace = V4L2_COLORSPACE_SRGB;
1260 else if (var->colorspace != V4L2_COLORSPACE_REC709)
1261 var->colorspace = V4L2_COLORSPACE_JPEG;
1262 } else {
1263 if (var->bits_per_pixel <= 16) { /* RGB 565 */
1264 var->bits_per_pixel = 16;
1265 var->red.offset = 11;
1266 var->red.length = 5;
1267 var->green.offset = 5;
1268 var->green.length = 6;
1269 var->blue.offset = 0;
1270 var->blue.length = 5;
1271 var->transp.offset = 0;
1272 var->transp.length = 0;
1273 } else if (var->bits_per_pixel <= 24) { /* RGB 888 */
1274 var->bits_per_pixel = 24;
1275 var->red.offset = 16;
1276 var->red.length = 8;
1277 var->green.offset = 8;
1278 var->green.length = 8;
1279 var->blue.offset = 0;
1280 var->blue.length = 8;
1281 var->transp.offset = 0;
1282 var->transp.length = 0;
1283 } else if (var->bits_per_pixel <= 32) { /* RGBA 888 */
1284 var->bits_per_pixel = 32;
1285 var->red.offset = 16;
1286 var->red.length = 8;
1287 var->green.offset = 8;
1288 var->green.length = 8;
1289 var->blue.offset = 0;
1290 var->blue.length = 8;
1291 var->transp.offset = 24;
1292 var->transp.length = 8;
1293 } else
1294 return -EINVAL;
417d4827 1295
edd153a3
LP
1296 var->red.msb_right = 0;
1297 var->green.msb_right = 0;
1298 var->blue.msb_right = 0;
1299 var->transp.msb_right = 0;
1300 }
03862194
LP
1301
1302 /* Make sure we don't exceed our allocated memory. */
1303 if (var->xres_virtual * var->yres_virtual * var->bits_per_pixel / 8 >
1304 info->fix.smem_len)
1305 return -EINVAL;
1306
edd153a3
LP
1307 /* only accept the forced_fourcc for dual channel configurations */
1308 if (p->forced_fourcc &&
1309 p->forced_fourcc != sh_mobile_format_fourcc(var))
417d4827 1310 return -EINVAL;
417d4827 1311
dd210503
GL
1312 return 0;
1313}
40331b21 1314
ed5bebf2
LP
1315static int sh_mobile_set_par(struct fb_info *info)
1316{
1317 struct sh_mobile_lcdc_chan *ch = info->par;
1318 int ret;
1319
1320 sh_mobile_lcdc_stop(ch->lcdc);
91fba48d 1321
fc9e78e6 1322 ch->format = sh_mobile_format_info(sh_mobile_format_fourcc(&info->var));
58f03d99
LP
1323 ch->colorspace = info->var.colorspace;
1324
1325 ch->xres = info->var.xres;
1326 ch->xres_virtual = info->var.xres_virtual;
1327 ch->yres = info->var.yres;
1328 ch->yres_virtual = info->var.yres_virtual;
1329
1330 if (ch->format->yuv)
1331 ch->pitch = info->var.xres;
1332 else
1333 ch->pitch = info->var.xres * ch->format->bpp / 8;
fc9e78e6 1334
ed5bebf2 1335 ret = sh_mobile_lcdc_start(ch->lcdc);
58f03d99 1336 if (ret < 0)
ed5bebf2 1337 dev_err(info->dev, "%s: unable to restart LCDC\n", __func__);
58f03d99
LP
1338
1339 info->fix.line_length = ch->pitch;
ed5bebf2 1340
edd153a3
LP
1341 if (sh_mobile_format_is_fourcc(&info->var)) {
1342 info->fix.type = FB_TYPE_FOURCC;
1343 info->fix.visual = FB_VISUAL_FOURCC;
1344 } else {
1345 info->fix.type = FB_TYPE_PACKED_PIXELS;
1346 info->fix.visual = FB_VISUAL_TRUECOLOR;
1347 }
1348
ed5bebf2
LP
1349 return ret;
1350}
1351
8857b9aa
AC
1352/*
1353 * Screen blanking. Behavior is as follows:
1354 * FB_BLANK_UNBLANK: screen unblanked, clocks enabled
1355 * FB_BLANK_NORMAL: screen blanked, clocks enabled
1356 * FB_BLANK_VSYNC,
1357 * FB_BLANK_HSYNC,
1358 * FB_BLANK_POWEROFF: screen blanked, clocks disabled
1359 */
1360static int sh_mobile_lcdc_blank(int blank, struct fb_info *info)
1361{
1362 struct sh_mobile_lcdc_chan *ch = info->par;
1363 struct sh_mobile_lcdc_priv *p = ch->lcdc;
1364
1365 /* blank the screen? */
1366 if (blank > FB_BLANK_UNBLANK && ch->blank_status == FB_BLANK_UNBLANK) {
1367 struct fb_fillrect rect = {
58f03d99
LP
1368 .width = ch->xres,
1369 .height = ch->yres,
8857b9aa
AC
1370 };
1371 sh_mobile_lcdc_fillrect(info, &rect);
1372 }
1373 /* turn clocks on? */
1374 if (blank <= FB_BLANK_NORMAL && ch->blank_status > FB_BLANK_NORMAL) {
1375 sh_mobile_lcdc_clk_on(p);
1376 }
1377 /* turn clocks off? */
1378 if (blank > FB_BLANK_NORMAL && ch->blank_status <= FB_BLANK_NORMAL) {
1379 /* make sure the screen is updated with the black fill before
1380 * switching the clocks off. one vsync is not enough since
1381 * blanking may occur in the middle of a refresh. deferred io
1382 * mode will reenable the clocks and update the screen in time,
1383 * so it does not need this. */
1384 if (!info->fbdefio) {
4976677f
LP
1385 sh_mobile_wait_for_vsync(ch);
1386 sh_mobile_wait_for_vsync(ch);
8857b9aa
AC
1387 }
1388 sh_mobile_lcdc_clk_off(p);
1389 }
1390
1391 ch->blank_status = blank;
1392 return 0;
1393}
1394
cfb4f5d1 1395static struct fb_ops sh_mobile_lcdc_ops = {
9dd38819 1396 .owner = THIS_MODULE,
cfb4f5d1 1397 .fb_setcolreg = sh_mobile_lcdc_setcolreg,
2540c111
MD
1398 .fb_read = fb_sys_read,
1399 .fb_write = fb_sys_write,
8564557a
MD
1400 .fb_fillrect = sh_mobile_lcdc_fillrect,
1401 .fb_copyarea = sh_mobile_lcdc_copyarea,
1402 .fb_imageblit = sh_mobile_lcdc_imageblit,
8857b9aa 1403 .fb_blank = sh_mobile_lcdc_blank,
9dd38819 1404 .fb_pan_display = sh_mobile_fb_pan_display,
40331b21 1405 .fb_ioctl = sh_mobile_ioctl,
dd210503
GL
1406 .fb_open = sh_mobile_open,
1407 .fb_release = sh_mobile_release,
1408 .fb_check_var = sh_mobile_check_var,
ed5bebf2 1409 .fb_set_par = sh_mobile_set_par,
cfb4f5d1
MD
1410};
1411
a67f379d
LP
1412static void
1413sh_mobile_lcdc_channel_fb_unregister(struct sh_mobile_lcdc_chan *ch)
1414{
1415 if (ch->info && ch->info->dev)
1416 unregister_framebuffer(ch->info);
1417}
1418
1419static int __devinit
1420sh_mobile_lcdc_channel_fb_register(struct sh_mobile_lcdc_chan *ch)
1421{
1422 struct fb_info *info = ch->info;
1423 int ret;
1424
1425 if (info->fbdefio) {
1426 ch->sglist = vmalloc(sizeof(struct scatterlist) *
1427 ch->fb_size >> PAGE_SHIFT);
1428 if (!ch->sglist) {
1429 dev_err(ch->lcdc->dev, "cannot allocate sglist\n");
1430 return -ENOMEM;
1431 }
1432 }
1433
1434 info->bl_dev = ch->bl;
1435
1436 ret = register_framebuffer(info);
1437 if (ret < 0)
1438 return ret;
1439
1440 dev_info(ch->lcdc->dev, "registered %s/%s as %dx%d %dbpp.\n",
b5ef967d 1441 dev_name(ch->lcdc->dev), (ch->cfg->chan == LCDC_CHAN_MAINLCD) ?
a67f379d
LP
1442 "mainlcd" : "sublcd", info->var.xres, info->var.yres,
1443 info->var.bits_per_pixel);
1444
1445 /* deferred io mode: disable clock to save power */
1446 if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED)
1447 sh_mobile_lcdc_clk_off(ch->lcdc);
1448
1449 return ret;
1450}
1451
1452static void
1453sh_mobile_lcdc_channel_fb_cleanup(struct sh_mobile_lcdc_chan *ch)
1454{
1455 struct fb_info *info = ch->info;
1456
1457 if (!info || !info->device)
1458 return;
1459
1460 if (ch->sglist)
1461 vfree(ch->sglist);
1462
1463 fb_dealloc_cmap(&info->cmap);
1464 framebuffer_release(info);
1465}
1466
1467static int __devinit
1468sh_mobile_lcdc_channel_fb_init(struct sh_mobile_lcdc_chan *ch,
1469 const struct fb_videomode *mode,
1470 unsigned int num_modes)
1471{
1472 struct sh_mobile_lcdc_priv *priv = ch->lcdc;
1473 struct fb_var_screeninfo *var;
1474 struct fb_info *info;
1475 int ret;
1476
1477 /* Allocate and initialize the frame buffer device. Create the modes
1478 * list and allocate the color map.
1479 */
1480 info = framebuffer_alloc(0, priv->dev);
1481 if (info == NULL) {
1482 dev_err(priv->dev, "unable to allocate fb_info\n");
1483 return -ENOMEM;
1484 }
1485
1486 ch->info = info;
1487
1488 info->flags = FBINFO_FLAG_DEFAULT;
1489 info->fbops = &sh_mobile_lcdc_ops;
1490 info->device = priv->dev;
1491 info->screen_base = ch->fb_mem;
1492 info->pseudo_palette = &ch->pseudo_palette;
1493 info->par = ch;
1494
1495 fb_videomode_to_modelist(mode, num_modes, &info->modelist);
1496
1497 ret = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
1498 if (ret < 0) {
1499 dev_err(priv->dev, "unable to allocate cmap\n");
1500 return ret;
1501 }
1502
1503 /* Initialize fixed screen information. Restrict pan to 2 lines steps
1504 * for NV12 and NV21.
1505 */
1506 info->fix = sh_mobile_lcdc_fix;
1507 info->fix.smem_start = ch->dma_handle;
1508 info->fix.smem_len = ch->fb_size;
58f03d99
LP
1509 info->fix.line_length = ch->pitch;
1510
1511 if (ch->format->yuv)
1512 info->fix.visual = FB_VISUAL_FOURCC;
1513 else
1514 info->fix.visual = FB_VISUAL_TRUECOLOR;
1515
a67f379d
LP
1516 if (ch->format->fourcc == V4L2_PIX_FMT_NV12 ||
1517 ch->format->fourcc == V4L2_PIX_FMT_NV21)
1518 info->fix.ypanstep = 2;
1519
1520 /* Initialize variable screen information using the first mode as
1521 * default. The default Y virtual resolution is twice the panel size to
1522 * allow for double-buffering.
1523 */
1524 var = &info->var;
1525 fb_videomode_to_var(var, mode);
b5ef967d
LP
1526 var->width = ch->cfg->panel_cfg.width;
1527 var->height = ch->cfg->panel_cfg.height;
a67f379d
LP
1528 var->yres_virtual = var->yres * 2;
1529 var->activate = FB_ACTIVATE_NOW;
1530
1531 /* Use the legacy API by default for RGB formats, and the FOURCC API
1532 * for YUV formats.
1533 */
1534 if (!ch->format->yuv)
1535 var->bits_per_pixel = ch->format->bpp;
1536 else
1537 var->grayscale = ch->format->fourcc;
1538
1539 ret = sh_mobile_check_var(var, info);
1540 if (ret)
1541 return ret;
1542
a67f379d
LP
1543 return 0;
1544}
1545
f1f60b5f
LP
1546/* -----------------------------------------------------------------------------
1547 * Backlight
1548 */
1549
3b0fd9d7
AC
1550static int sh_mobile_lcdc_update_bl(struct backlight_device *bdev)
1551{
1552 struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
3b0fd9d7
AC
1553 int brightness = bdev->props.brightness;
1554
1555 if (bdev->props.power != FB_BLANK_UNBLANK ||
1556 bdev->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
1557 brightness = 0;
1558
b5ef967d 1559 return ch->cfg->bl_info.set_brightness(brightness);
3b0fd9d7
AC
1560}
1561
1562static int sh_mobile_lcdc_get_brightness(struct backlight_device *bdev)
1563{
1564 struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
3b0fd9d7 1565
b5ef967d 1566 return ch->cfg->bl_info.get_brightness();
3b0fd9d7
AC
1567}
1568
1569static int sh_mobile_lcdc_check_fb(struct backlight_device *bdev,
1570 struct fb_info *info)
1571{
1572 return (info->bl_dev == bdev);
1573}
1574
1575static struct backlight_ops sh_mobile_lcdc_bl_ops = {
1576 .options = BL_CORE_SUSPENDRESUME,
1577 .update_status = sh_mobile_lcdc_update_bl,
1578 .get_brightness = sh_mobile_lcdc_get_brightness,
1579 .check_fb = sh_mobile_lcdc_check_fb,
1580};
1581
1582static struct backlight_device *sh_mobile_lcdc_bl_probe(struct device *parent,
1583 struct sh_mobile_lcdc_chan *ch)
1584{
1585 struct backlight_device *bl;
1586
b5ef967d 1587 bl = backlight_device_register(ch->cfg->bl_info.name, parent, ch,
3b0fd9d7 1588 &sh_mobile_lcdc_bl_ops, NULL);
beee1f20
DC
1589 if (IS_ERR(bl)) {
1590 dev_err(parent, "unable to register backlight device: %ld\n",
1591 PTR_ERR(bl));
3b0fd9d7
AC
1592 return NULL;
1593 }
1594
b5ef967d 1595 bl->props.max_brightness = ch->cfg->bl_info.max_brightness;
3b0fd9d7
AC
1596 bl->props.brightness = bl->props.max_brightness;
1597 backlight_update_status(bl);
1598
1599 return bl;
1600}
1601
1602static void sh_mobile_lcdc_bl_remove(struct backlight_device *bdev)
1603{
1604 backlight_device_unregister(bdev);
1605}
1606
f1f60b5f
LP
1607/* -----------------------------------------------------------------------------
1608 * Power management
1609 */
1610
2feb075a
MD
1611static int sh_mobile_lcdc_suspend(struct device *dev)
1612{
1613 struct platform_device *pdev = to_platform_device(dev);
1614
1615 sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
1616 return 0;
1617}
1618
1619static int sh_mobile_lcdc_resume(struct device *dev)
1620{
1621 struct platform_device *pdev = to_platform_device(dev);
1622
1623 return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
1624}
1625
0246c471
MD
1626static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
1627{
1628 struct platform_device *pdev = to_platform_device(dev);
2427bb24 1629 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
0246c471
MD
1630
1631 /* turn off LCDC hardware */
2427bb24
LP
1632 lcdc_write(priv, _LDCNT1R, 0);
1633
0246c471
MD
1634 return 0;
1635}
1636
1637static int sh_mobile_lcdc_runtime_resume(struct device *dev)
1638{
1639 struct platform_device *pdev = to_platform_device(dev);
2427bb24 1640 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
0246c471 1641
2427bb24 1642 __sh_mobile_lcdc_start(priv);
0246c471
MD
1643
1644 return 0;
1645}
1646
47145210 1647static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
2feb075a
MD
1648 .suspend = sh_mobile_lcdc_suspend,
1649 .resume = sh_mobile_lcdc_resume,
0246c471
MD
1650 .runtime_suspend = sh_mobile_lcdc_runtime_suspend,
1651 .runtime_resume = sh_mobile_lcdc_runtime_resume,
2feb075a
MD
1652};
1653
f1f60b5f
LP
1654/* -----------------------------------------------------------------------------
1655 * Framebuffer notifier
1656 */
1657
6de9edd5 1658/* locking: called with info->lock held */
6011bdea
GL
1659static int sh_mobile_lcdc_notify(struct notifier_block *nb,
1660 unsigned long action, void *data)
1661{
1662 struct fb_event *event = data;
1663 struct fb_info *info = event->info;
1664 struct sh_mobile_lcdc_chan *ch = info->par;
6011bdea
GL
1665
1666 if (&ch->lcdc->notifier != nb)
baf16374 1667 return NOTIFY_DONE;
6011bdea
GL
1668
1669 dev_dbg(info->dev, "%s(): action = %lu, data = %p\n",
1670 __func__, action, event->data);
1671
1672 switch(action) {
1673 case FB_EVENT_SUSPEND:
37c5dcc2 1674 sh_mobile_lcdc_display_off(ch);
afe417c0 1675 sh_mobile_lcdc_stop(ch->lcdc);
6011bdea
GL
1676 break;
1677 case FB_EVENT_RESUME:
dd210503
GL
1678 mutex_lock(&ch->open_lock);
1679 sh_mobile_fb_reconfig(info);
1680 mutex_unlock(&ch->open_lock);
6011bdea 1681
37c5dcc2 1682 sh_mobile_lcdc_display_on(ch);
ebe5e12d 1683 sh_mobile_lcdc_start(ch->lcdc);
6011bdea
GL
1684 }
1685
baf16374 1686 return NOTIFY_OK;
6011bdea
GL
1687}
1688
f1f60b5f
LP
1689/* -----------------------------------------------------------------------------
1690 * Probe/remove and driver init/exit
1691 */
1692
217e9c43 1693static const struct fb_videomode default_720p __devinitconst = {
f1f60b5f
LP
1694 .name = "HDMI 720p",
1695 .xres = 1280,
1696 .yres = 720,
1697
1698 .left_margin = 220,
1699 .right_margin = 110,
1700 .hsync_len = 40,
1701
1702 .upper_margin = 20,
1703 .lower_margin = 5,
1704 .vsync_len = 5,
1705
1706 .pixclock = 13468,
1707 .refresh = 60,
1708 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
1709};
1710
b4bee692
LP
1711static int sh_mobile_lcdc_remove(struct platform_device *pdev)
1712{
1713 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
b4bee692
LP
1714 int i;
1715
1716 fb_unregister_client(&priv->notifier);
1717
1718 for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
a67f379d 1719 sh_mobile_lcdc_channel_fb_unregister(&priv->ch[i]);
b4bee692
LP
1720
1721 sh_mobile_lcdc_stop(priv);
1722
1723 for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
9a2985e7 1724 struct sh_mobile_lcdc_chan *ch = &priv->ch[i];
b4bee692 1725
e34d0bbb
LP
1726 if (ch->tx_dev) {
1727 ch->tx_dev->lcdc = NULL;
b5ef967d 1728 module_put(ch->cfg->tx_dev->dev.driver->owner);
e34d0bbb 1729 }
9a2985e7 1730
a67f379d 1731 sh_mobile_lcdc_channel_fb_cleanup(ch);
b4bee692 1732
a67f379d
LP
1733 if (ch->fb_mem)
1734 dma_free_coherent(&pdev->dev, ch->fb_size,
1735 ch->fb_mem, ch->dma_handle);
b4bee692
LP
1736 }
1737
1738 for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
1739 if (priv->ch[i].bl)
1740 sh_mobile_lcdc_bl_remove(priv->ch[i].bl);
1741 }
1742
4774c12a
LP
1743 if (priv->dot_clk) {
1744 pm_runtime_disable(&pdev->dev);
b4bee692 1745 clk_put(priv->dot_clk);
4774c12a 1746 }
b4bee692
LP
1747
1748 if (priv->base)
1749 iounmap(priv->base);
1750
1751 if (priv->irq)
1752 free_irq(priv->irq, priv);
1753 kfree(priv);
1754 return 0;
1755}
cfb4f5d1 1756
217e9c43 1757static int __devinit sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
f1f60b5f 1758{
b5ef967d 1759 int interface_type = ch->cfg->interface_type;
f1f60b5f
LP
1760
1761 switch (interface_type) {
1762 case RGB8:
1763 case RGB9:
1764 case RGB12A:
1765 case RGB12B:
1766 case RGB16:
1767 case RGB18:
1768 case RGB24:
1769 case SYS8A:
1770 case SYS8B:
1771 case SYS8C:
1772 case SYS8D:
1773 case SYS9:
1774 case SYS12:
1775 case SYS16A:
1776 case SYS16B:
1777 case SYS16C:
1778 case SYS18:
1779 case SYS24:
1780 break;
1781 default:
1782 return -EINVAL;
1783 }
1784
1785 /* SUBLCD only supports SYS interface */
1786 if (lcdc_chan_is_sublcd(ch)) {
1787 if (!(interface_type & LDMT1R_IFM))
1788 return -EINVAL;
1789
1790 interface_type &= ~LDMT1R_IFM;
1791 }
1792
1793 ch->ldmt1r_value = interface_type;
1794 return 0;
1795}
1796
0a7f17aa
LP
1797static int __devinit
1798sh_mobile_lcdc_channel_init(struct sh_mobile_lcdc_priv *priv,
1799 struct sh_mobile_lcdc_chan *ch)
cfb4f5d1 1800{
105784bb 1801 const struct sh_mobile_lcdc_format_info *format;
b5ef967d 1802 const struct sh_mobile_lcdc_chan_cfg *cfg = ch->cfg;
3ce05599
LP
1803 const struct fb_videomode *max_mode;
1804 const struct fb_videomode *mode;
a67f379d 1805 unsigned int num_modes;
3ce05599 1806 unsigned int max_size;
a67f379d 1807 unsigned int i;
3ce05599 1808
a67472ad 1809 mutex_init(&ch->open_lock);
ecd29947 1810 ch->notify = sh_mobile_lcdc_display_notify;
a67472ad 1811
105784bb
LP
1812 /* Validate the format. */
1813 format = sh_mobile_format_info(cfg->fourcc);
1814 if (format == NULL) {
1815 dev_err(priv->dev, "Invalid FOURCC %08x.\n", cfg->fourcc);
1816 return -EINVAL;
1817 }
1818
3ce05599
LP
1819 /* Iterate through the modes to validate them and find the highest
1820 * resolution.
1821 */
1822 max_mode = NULL;
1823 max_size = 0;
1824
93ff2598 1825 for (i = 0, mode = cfg->lcd_modes; i < cfg->num_modes; i++, mode++) {
3ce05599
LP
1826 unsigned int size = mode->yres * mode->xres;
1827
edd153a3
LP
1828 /* NV12/NV21 buffers must have even number of lines */
1829 if ((cfg->fourcc == V4L2_PIX_FMT_NV12 ||
1830 cfg->fourcc == V4L2_PIX_FMT_NV21) && (mode->yres & 0x1)) {
0a7f17aa
LP
1831 dev_err(priv->dev, "yres must be multiple of 2 for "
1832 "YCbCr420 mode.\n");
3ce05599
LP
1833 return -EINVAL;
1834 }
1835
1836 if (size > max_size) {
1837 max_mode = mode;
1838 max_size = size;
1839 }
1840 }
1841
1842 if (!max_size)
1843 max_size = MAX_XRES * MAX_YRES;
1844 else
0a7f17aa 1845 dev_dbg(priv->dev, "Found largest videomode %ux%u\n",
3ce05599
LP
1846 max_mode->xres, max_mode->yres);
1847
93ff2598 1848 if (cfg->lcd_modes == NULL) {
3ce05599 1849 mode = &default_720p;
93ff2598 1850 num_modes = 1;
3ce05599 1851 } else {
93ff2598
LP
1852 mode = cfg->lcd_modes;
1853 num_modes = cfg->num_modes;
3ce05599
LP
1854 }
1855
58f03d99
LP
1856 /* Use the first mode as default. */
1857 ch->format = format;
1858 ch->xres = mode->xres;
1859 ch->xres_virtual = mode->xres;
1860 ch->yres = mode->yres;
1861 ch->yres_virtual = mode->yres * 2;
1862
1863 if (!format->yuv) {
1864 ch->colorspace = V4L2_COLORSPACE_SRGB;
1865 ch->pitch = ch->xres * format->bpp / 8;
1866 } else {
1867 ch->colorspace = V4L2_COLORSPACE_REC709;
1868 ch->pitch = ch->xres;
1869 }
1870
a67f379d
LP
1871 ch->display.width = cfg->panel_cfg.width;
1872 ch->display.height = cfg->panel_cfg.height;
1873 ch->display.mode = *mode;
1874
1875 /* Allocate frame buffer memory. */
1876 ch->fb_size = max_size * format->bpp / 8 * 2;
1877 ch->fb_mem = dma_alloc_coherent(priv->dev, ch->fb_size, &ch->dma_handle,
1878 GFP_KERNEL);
1879 if (ch->fb_mem == NULL) {
1880 dev_err(priv->dev, "unable to allocate buffer\n");
1881 return -ENOMEM;
1882 }
3ce05599 1883
13f80eea
LP
1884 /* Initialize the transmitter device if present. */
1885 if (cfg->tx_dev) {
1886 if (!cfg->tx_dev->dev.driver ||
1887 !try_module_get(cfg->tx_dev->dev.driver->owner)) {
1888 dev_warn(priv->dev,
1889 "unable to get transmitter device\n");
1890 return -EINVAL;
1891 }
1892 ch->tx_dev = platform_get_drvdata(cfg->tx_dev);
1893 ch->tx_dev->lcdc = ch;
1894 ch->tx_dev->def_mode = *mode;
1895 }
1896
a67f379d 1897 return sh_mobile_lcdc_channel_fb_init(ch, mode, num_modes);
3ce05599
LP
1898}
1899
1900static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
1901{
01ac25b5 1902 struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data;
3ce05599 1903 struct sh_mobile_lcdc_priv *priv;
cfb4f5d1 1904 struct resource *res;
3ce05599 1905 int num_channels;
cfb4f5d1 1906 int error;
3ce05599 1907 int i;
cfb4f5d1 1908
01ac25b5 1909 if (!pdata) {
cfb4f5d1 1910 dev_err(&pdev->dev, "no platform data defined\n");
8bed9055 1911 return -EINVAL;
cfb4f5d1
MD
1912 }
1913
1914 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
8564557a
MD
1915 i = platform_get_irq(pdev, 0);
1916 if (!res || i < 0) {
1917 dev_err(&pdev->dev, "cannot get platform resources\n");
8bed9055 1918 return -ENOENT;
cfb4f5d1
MD
1919 }
1920
1921 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1922 if (!priv) {
1923 dev_err(&pdev->dev, "cannot allocate device data\n");
8bed9055 1924 return -ENOMEM;
cfb4f5d1
MD
1925 }
1926
4774c12a
LP
1927 priv->dev = &pdev->dev;
1928 priv->meram_dev = pdata->meram_dev;
8bed9055
GL
1929 platform_set_drvdata(pdev, priv);
1930
f8798ccb 1931 error = request_irq(i, sh_mobile_lcdc_irq, 0,
7ad33e74 1932 dev_name(&pdev->dev), priv);
8564557a
MD
1933 if (error) {
1934 dev_err(&pdev->dev, "unable to request irq\n");
1935 goto err1;
1936 }
1937
1938 priv->irq = i;
5ef6b505 1939 atomic_set(&priv->hw_usecnt, -1);
cfb4f5d1 1940
3ce05599
LP
1941 for (i = 0, num_channels = 0; i < ARRAY_SIZE(pdata->ch); i++) {
1942 struct sh_mobile_lcdc_chan *ch = priv->ch + num_channels;
cfb4f5d1 1943
01ac25b5 1944 ch->lcdc = priv;
b5ef967d 1945 ch->cfg = &pdata->ch[i];
cfb4f5d1 1946
01ac25b5 1947 error = sh_mobile_lcdc_check_interface(ch);
cfb4f5d1
MD
1948 if (error) {
1949 dev_err(&pdev->dev, "unsupported interface type\n");
1950 goto err1;
1951 }
01ac25b5
GL
1952 init_waitqueue_head(&ch->frame_end_wait);
1953 init_completion(&ch->vsync_completion);
1954 ch->pan_offset = 0;
cfb4f5d1 1955
3b0fd9d7 1956 /* probe the backlight is there is one defined */
b5ef967d 1957 if (ch->cfg->bl_info.max_brightness)
3b0fd9d7
AC
1958 ch->bl = sh_mobile_lcdc_bl_probe(&pdev->dev, ch);
1959
cfb4f5d1
MD
1960 switch (pdata->ch[i].chan) {
1961 case LCDC_CHAN_MAINLCD:
ce1c0b08 1962 ch->enabled = LDCNT2R_ME;
01ac25b5 1963 ch->reg_offs = lcdc_offs_mainlcd;
3ce05599 1964 num_channels++;
cfb4f5d1
MD
1965 break;
1966 case LCDC_CHAN_SUBLCD:
ce1c0b08 1967 ch->enabled = LDCNT2R_SE;
01ac25b5 1968 ch->reg_offs = lcdc_offs_sublcd;
3ce05599 1969 num_channels++;
cfb4f5d1
MD
1970 break;
1971 }
1972 }
1973
3ce05599 1974 if (!num_channels) {
cfb4f5d1
MD
1975 dev_err(&pdev->dev, "no channels defined\n");
1976 error = -EINVAL;
1977 goto err1;
1978 }
1979
edd153a3 1980 /* for dual channel LCDC (MAIN + SUB) force shared format setting */
3ce05599 1981 if (num_channels == 2)
edd153a3 1982 priv->forced_fourcc = pdata->ch[0].fourcc;
417d4827 1983
dba6f385
GL
1984 priv->base = ioremap_nocache(res->start, resource_size(res));
1985 if (!priv->base)
1986 goto err1;
1987
0a7f17aa 1988 error = sh_mobile_lcdc_setup_clocks(priv, pdata->clock_source);
cfb4f5d1
MD
1989 if (error) {
1990 dev_err(&pdev->dev, "unable to setup clocks\n");
1991 goto err1;
1992 }
1993
4774c12a
LP
1994 /* Enable runtime PM. */
1995 pm_runtime_enable(&pdev->dev);
7caa4342 1996
3ce05599 1997 for (i = 0; i < num_channels; i++) {
01ac25b5 1998 struct sh_mobile_lcdc_chan *ch = priv->ch + i;
c44f9f76 1999
0a7f17aa 2000 error = sh_mobile_lcdc_channel_init(priv, ch);
cfb4f5d1 2001 if (error)
3ce05599 2002 goto err1;
cfb4f5d1
MD
2003 }
2004
cfb4f5d1
MD
2005 error = sh_mobile_lcdc_start(priv);
2006 if (error) {
2007 dev_err(&pdev->dev, "unable to start hardware\n");
2008 goto err1;
2009 }
2010
3ce05599 2011 for (i = 0; i < num_channels; i++) {
1c6a307a 2012 struct sh_mobile_lcdc_chan *ch = priv->ch + i;
1c6a307a 2013
a67f379d
LP
2014 error = sh_mobile_lcdc_channel_fb_register(ch);
2015 if (error)
cfb4f5d1 2016 goto err1;
cfb4f5d1
MD
2017 }
2018
6011bdea
GL
2019 /* Failure ignored */
2020 priv->notifier.notifier_call = sh_mobile_lcdc_notify;
2021 fb_register_client(&priv->notifier);
2022
cfb4f5d1 2023 return 0;
8bed9055 2024err1:
cfb4f5d1 2025 sh_mobile_lcdc_remove(pdev);
8bed9055 2026
cfb4f5d1
MD
2027 return error;
2028}
2029
cfb4f5d1
MD
2030static struct platform_driver sh_mobile_lcdc_driver = {
2031 .driver = {
2032 .name = "sh_mobile_lcdc_fb",
2033 .owner = THIS_MODULE,
2feb075a 2034 .pm = &sh_mobile_lcdc_dev_pm_ops,
cfb4f5d1
MD
2035 },
2036 .probe = sh_mobile_lcdc_probe,
2037 .remove = sh_mobile_lcdc_remove,
2038};
2039
4277f2c4 2040module_platform_driver(sh_mobile_lcdc_driver);
cfb4f5d1
MD
2041
2042MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
2043MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
2044MODULE_LICENSE("GPL v2");