[linux-2.6-block.git] / drivers / video / omap2 / dss / sdi.c

/*
 * linux/drivers/video/omap2/dss/sdi.c
 *
 * Copyright (C) 2009 Nokia Corporation
 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published by
 * the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#define DSS_SUBSYS_NAME "SDI"

#include <linux/kernel.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/regulator/consumer.h>

#include <plat/display.h>
#include <plat/cpu.h>
#include "dss.h"

static struct {
	bool skip_init;
	bool update_enabled;
	struct regulator *vdds_sdi_reg;
} sdi;

static void sdi_basic_init(struct omap_dss_device *dssdev)

{
	dispc_set_parallel_interface_mode(dssdev->manager->id,
			OMAP_DSS_PARALLELMODE_BYPASS);

	dispc_set_lcd_display_type(dssdev->manager->id,
			OMAP_DSS_LCD_DISPLAY_TFT);

	dispc_set_tft_data_lines(dssdev->manager->id, 24);
	dispc_lcd_enable_signal_polarity(1);
}

int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
{
	struct omap_video_timings *t = &dssdev->panel.timings;
	struct dss_clock_info dss_cinfo;
	struct dispc_clock_info dispc_cinfo;
	u16 lck_div, pck_div;
	unsigned long fck;
	unsigned long pck;
	int r;

	r = omap_dss_start_device(dssdev);
	if (r) {
		DSSERR("failed to start device\n");
		goto err0;
	}

	r = regulator_enable(sdi.vdds_sdi_reg);
	if (r)
		goto err1;

	/* In case of skip_init sdi_init has already enabled the clocks */
	if (!sdi.skip_init)
		dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);

	sdi_basic_init(dssdev);

	/* 15.5.9.1.2 */
	dssdev->panel.config |= OMAP_DSS_LCD_RF | OMAP_DSS_LCD_ONOFF;

	dispc_set_pol_freq(dssdev->panel.config, dssdev->panel.acbi,
			dssdev->panel.acb);

	if (!sdi.skip_init) {
		r = dss_calc_clock_div(1, t->pixel_clock * 1000,
				&dss_cinfo, &dispc_cinfo);
	} else {
		r = dss_get_clock_div(&dss_cinfo);
		r = dispc_get_clock_div(&dispc_cinfo);
	}

	if (r)
		goto err2;

	fck = dss_cinfo.fck;
	lck_div = dispc_cinfo.lck_div;
	pck_div = dispc_cinfo.pck_div;

	pck = fck / lck_div / pck_div / 1000;

	if (pck != t->pixel_clock) {
		DSSWARN("Could not find exact pixel clock. Requested %d kHz, "
				"got %lu kHz\n",
				t->pixel_clock, pck);

		t->pixel_clock = pck;
	}


	dispc_set_lcd_timings(dssdev->manager->id, t);

	r = dss_set_clock_div(&dss_cinfo);
	if (r)
		goto err2;

	r = dispc_set_clock_div(&dispc_cinfo);
	if (r)
		goto err2;

	if (!sdi.skip_init) {
		dss_sdi_init(dssdev->phy.sdi.datapairs);
		r = dss_sdi_enable();
		if (r)
			goto err1;
		mdelay(2);
	}

	dssdev->manager->enable(dssdev->manager);

	sdi.skip_init = 0;

	return 0;
err2:
	dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
	regulator_disable(sdi.vdds_sdi_reg);
err1:
	omap_dss_stop_device(dssdev);
err0:
	return r;
}
EXPORT_SYMBOL(omapdss_sdi_display_enable);

void omapdss_sdi_display_disable(struct omap_dss_device *dssdev)
{
	dssdev->manager->disable(dssdev->manager);

	dss_sdi_disable();

	dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);

	regulator_disable(sdi.vdds_sdi_reg);

	omap_dss_stop_device(dssdev);
}
EXPORT_SYMBOL(omapdss_sdi_display_disable);

int sdi_init_display(struct omap_dss_device *dssdev)
{
	DSSDBG("SDI init\n");

	return 0;
}

int sdi_init(bool skip_init)
{
	/* we store this for first display enable, then clear it */
	sdi.skip_init = skip_init;

	sdi.vdds_sdi_reg = dss_get_vdds_sdi();
	if (IS_ERR(sdi.vdds_sdi_reg)) {
		DSSERR("can't get VDDS_SDI regulator\n");
		return PTR_ERR(sdi.vdds_sdi_reg);
	}
	/*
	 * Enable clocks already here, otherwise there would be a toggle
	 * of them until sdi_display_enable is called.
	 */
	if (skip_init)
		dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
	return 0;
}

void sdi_exit(void)
{
}
Commit	Line	Data
23c0a7a6 TV	1	/*
	2	* linux/drivers/video/omap2/dss/sdi.c
	3	*
	4	* Copyright (C) 2009 Nokia Corporation
	5	* Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify it
	8	* under the terms of the GNU General Public License version 2 as published by
	9	* the Free Software Foundation.
	10	*
	11	* This program is distributed in the hope that it will be useful, but WITHOUT
	12	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	13	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	14	* more details.
	15	*
	16	* You should have received a copy of the GNU General Public License along with
	17	* this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	#define DSS_SUBSYS_NAME "SDI"
	21
	22	#include <linux/kernel.h>
	23	#include <linux/clk.h>
	24	#include <linux/delay.h>
	25	#include <linux/err.h>
508886cf	26	#include <linux/regulator/consumer.h>
23c0a7a6 TV	27
23c0a7a6 TV	28	#include <plat/display.h>
508886cf	29	#include <plat/cpu.h>
23c0a7a6 TV	30	#include "dss.h"
	31
	32	static struct {
	33	bool skip_init;
	34	bool update_enabled;
508886cf	35	struct regulator *vdds_sdi_reg;
23c0a7a6 TV	36	} sdi;
23c0a7a6 TV	37
64ba4f74 SS	38	static void sdi_basic_init(struct omap_dss_device *dssdev)
64ba4f74 SS	39
23c0a7a6	40	{
64ba4f74 SS	41	dispc_set_parallel_interface_mode(dssdev->manager->id,
	42	OMAP_DSS_PARALLELMODE_BYPASS);
	43
	44	dispc_set_lcd_display_type(dssdev->manager->id,
	45	OMAP_DSS_LCD_DISPLAY_TFT);
23c0a7a6	46
64ba4f74	47	dispc_set_tft_data_lines(dssdev->manager->id, 24);
23c0a7a6 TV	48	dispc_lcd_enable_signal_polarity(1);
	49	}
	50
37ac60e4	51	int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
23c0a7a6 TV	52	{
	53	struct omap_video_timings *t = &dssdev->panel.timings;
	54	struct dss_clock_info dss_cinfo;
	55	struct dispc_clock_info dispc_cinfo;
	56	u16 lck_div, pck_div;
	57	unsigned long fck;
	58	unsigned long pck;
	59	int r;
	60
	61	r = omap_dss_start_device(dssdev);
	62	if (r) {
	63	DSSERR("failed to start device\n");
	64	goto err0;
	65	}
	66
508886cf RQ	67	r = regulator_enable(sdi.vdds_sdi_reg);
	68	if (r)
	69	goto err1;
	70
23c0a7a6 TV	71	/* In case of skip_init sdi_init has already enabled the clocks */
	72	if (!sdi.skip_init)
	73	dss_clk_enable(DSS_CLK_ICK \| DSS_CLK_FCK1);
	74
64ba4f74	75	sdi_basic_init(dssdev);
23c0a7a6 TV	76
	77	/* 15.5.9.1.2 */
	78	dssdev->panel.config \|= OMAP_DSS_LCD_RF \| OMAP_DSS_LCD_ONOFF;
	79
	80	dispc_set_pol_freq(dssdev->panel.config, dssdev->panel.acbi,
	81	dssdev->panel.acb);
	82
	83	if (!sdi.skip_init) {
	84	r = dss_calc_clock_div(1, t->pixel_clock * 1000,
	85	&dss_cinfo, &dispc_cinfo);
	86	} else {
	87	r = dss_get_clock_div(&dss_cinfo);
	88	r = dispc_get_clock_div(&dispc_cinfo);
	89	}
	90
	91	if (r)
	92	goto err2;
	93
	94	fck = dss_cinfo.fck;
	95	lck_div = dispc_cinfo.lck_div;
	96	pck_div = dispc_cinfo.pck_div;
	97
	98	pck = fck / lck_div / pck_div / 1000;
	99
	100	if (pck != t->pixel_clock) {
	101	DSSWARN("Could not find exact pixel clock. Requested %d kHz, "
	102	"got %lu kHz\n",
	103	t->pixel_clock, pck);
	104
	105	t->pixel_clock = pck;
	106	}
	107
	108
64ba4f74	109	dispc_set_lcd_timings(dssdev->manager->id, t);
23c0a7a6 TV	110
	111	r = dss_set_clock_div(&dss_cinfo);
	112	if (r)
	113	goto err2;
	114
	115	r = dispc_set_clock_div(&dispc_cinfo);
	116	if (r)
	117	goto err2;
	118
	119	if (!sdi.skip_init) {
	120	dss_sdi_init(dssdev->phy.sdi.datapairs);
	121	r = dss_sdi_enable();
	122	if (r)
	123	goto err1;
	124	mdelay(2);
	125	}
	126
a2faee84	127	dssdev->manager->enable(dssdev->manager);
23c0a7a6	128
23c0a7a6 TV	129	sdi.skip_init = 0;
	130
	131	return 0;
23c0a7a6 TV	132	err2:
23c0a7a6 TV	133	dss_clk_disable(DSS_CLK_ICK \| DSS_CLK_FCK1);
508886cf	134	regulator_disable(sdi.vdds_sdi_reg);
23c0a7a6 TV	135	err1:
	136	omap_dss_stop_device(dssdev);
	137	err0:
	138	return r;
	139	}
37ac60e4	140	EXPORT_SYMBOL(omapdss_sdi_display_enable);
23c0a7a6	141
37ac60e4	142	void omapdss_sdi_display_disable(struct omap_dss_device *dssdev)
23c0a7a6	143	{
a2faee84	144	dssdev->manager->disable(dssdev->manager);
23c0a7a6 TV	145
	146	dss_sdi_disable();
	147
	148	dss_clk_disable(DSS_CLK_ICK \| DSS_CLK_FCK1);
	149
508886cf RQ	150	regulator_disable(sdi.vdds_sdi_reg);
508886cf RQ	151
23c0a7a6 TV	152	omap_dss_stop_device(dssdev);
23c0a7a6 TV	153	}
37ac60e4	154	EXPORT_SYMBOL(omapdss_sdi_display_disable);
23c0a7a6	155
23c0a7a6 TV	156	int sdi_init_display(struct omap_dss_device *dssdev)
	157	{
	158	DSSDBG("SDI init\n");
	159
23c0a7a6 TV	160	return 0;
	161	}
	162
	163	int sdi_init(bool skip_init)
	164	{
	165	/* we store this for first display enable, then clear it */
	166	sdi.skip_init = skip_init;
	167
508886cf RQ	168	sdi.vdds_sdi_reg = dss_get_vdds_sdi();
	169	if (IS_ERR(sdi.vdds_sdi_reg)) {
	170	DSSERR("can't get VDDS_SDI regulator\n");
	171	return PTR_ERR(sdi.vdds_sdi_reg);
	172	}
23c0a7a6 TV	173	/*
	174	* Enable clocks already here, otherwise there would be a toggle
	175	* of them until sdi_display_enable is called.
	176	*/
	177	if (skip_init)
	178	dss_clk_enable(DSS_CLK_ICK \| DSS_CLK_FCK1);
	179	return 0;
	180	}
	181
	182	void sdi_exit(void)
	183	{
	184	}