[linux-2.6-block.git] / drivers / video / nvidia / nv_i2c.c

/*
 * linux/drivers/video/nvidia/nvidia-i2c.c - nVidia i2c
 *
 * Copyright 2004 Antonino A. Daplas <adaplas @pol.net>
 *
 * Based on rivafb-i2c.c
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/gfp.h>
#include <linux/pci.h>
#include <linux/fb.h>

#include <asm/io.h>

#include "nv_type.h"
#include "nv_local.h"
#include "nv_proto.h"

#include "../edid.h"

static void nvidia_gpio_setscl(void *data, int state)
{
	struct nvidia_i2c_chan *chan = data;
	struct nvidia_par *par = chan->par;
	u32 val;

	val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0;

	if (state)
		val |= 0x20;
	else
		val &= ~0x20;

	NVWriteCrtc(par, chan->ddc_base + 1, val | 0x01);
}

static void nvidia_gpio_setsda(void *data, int state)
{
	struct nvidia_i2c_chan *chan = data;
	struct nvidia_par *par = chan->par;
	u32 val;

	val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0;

	if (state)
		val |= 0x10;
	else
		val &= ~0x10;

	NVWriteCrtc(par, chan->ddc_base + 1, val | 0x01);
}

static int nvidia_gpio_getscl(void *data)
{
	struct nvidia_i2c_chan *chan = data;
	struct nvidia_par *par = chan->par;
	u32 val = 0;

	if (NVReadCrtc(par, chan->ddc_base) & 0x04)
		val = 1;

	return val;
}

static int nvidia_gpio_getsda(void *data)
{
	struct nvidia_i2c_chan *chan = data;
	struct nvidia_par *par = chan->par;
	u32 val = 0;

	if (NVReadCrtc(par, chan->ddc_base) & 0x08)
		val = 1;

	return val;
}

static int nvidia_setup_i2c_bus(struct nvidia_i2c_chan *chan, const char *name,
				unsigned int i2c_class)
{
	int rc;

	strcpy(chan->adapter.name, name);
	chan->adapter.owner = THIS_MODULE;
	chan->adapter.class = i2c_class;
	chan->adapter.algo_data = &chan->algo;
	chan->adapter.dev.parent = &chan->par->pci_dev->dev;
	chan->algo.setsda = nvidia_gpio_setsda;
	chan->algo.setscl = nvidia_gpio_setscl;
	chan->algo.getsda = nvidia_gpio_getsda;
	chan->algo.getscl = nvidia_gpio_getscl;
	chan->algo.udelay = 40;
	chan->algo.timeout = msecs_to_jiffies(2);
	chan->algo.data = chan;

	i2c_set_adapdata(&chan->adapter, chan);

	/* Raise SCL and SDA */
	nvidia_gpio_setsda(chan, 1);
	nvidia_gpio_setscl(chan, 1);
	udelay(20);

	rc = i2c_bit_add_bus(&chan->adapter);
	if (rc == 0)
		dev_dbg(&chan->par->pci_dev->dev,
			"I2C bus %s registered.\n", name);
	else {
		dev_warn(&chan->par->pci_dev->dev,
			 "Failed to register I2C bus %s.\n", name);
		chan->par = NULL;
	}

	return rc;
}

void nvidia_create_i2c_busses(struct nvidia_par *par)
{
	par->chan[0].par = par;
	par->chan[1].par = par;
	par->chan[2].par = par;

	par->chan[0].ddc_base = (par->reverse_i2c) ? 0x36 : 0x3e;
 	nvidia_setup_i2c_bus(&par->chan[0], "nvidia #0",
			     (par->reverse_i2c) ? I2C_CLASS_HWMON : 0);

	par->chan[1].ddc_base = (par->reverse_i2c) ? 0x3e : 0x36;
 	nvidia_setup_i2c_bus(&par->chan[1], "nvidia #1",
			     (par->reverse_i2c) ? 0 : I2C_CLASS_HWMON);

	par->chan[2].ddc_base = 0x50;
 	nvidia_setup_i2c_bus(&par->chan[2], "nvidia #2", 0);
}

void nvidia_delete_i2c_busses(struct nvidia_par *par)
{
	int i;

	for (i = 0; i < 3; i++) {
		if (!par->chan[i].par)
			continue;
		i2c_del_adapter(&par->chan[i].adapter);
		par->chan[i].par = NULL;
	}
}

int nvidia_probe_i2c_connector(struct fb_info *info, int conn, u8 **out_edid)
{
	struct nvidia_par *par = info->par;
	u8 *edid = NULL;

	if (par->chan[conn - 1].par)
		edid = fb_ddc_read(&par->chan[conn - 1].adapter);

	if (!edid && conn == 1) {
		/* try to get from firmware */
		const u8 *e = fb_firmware_edid(info->device);

		if (e != NULL)
			edid = kmemdup(e, EDID_LENGTH, GFP_KERNEL);
	}

	*out_edid = edid;

	return (edid) ? 0 : 1;
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/drivers/video/nvidia/nvidia-i2c.c - nVidia i2c
	3	*
	4	* Copyright 2004 Antonino A. Daplas <adaplas @pol.net>
	5	*
	6	* Based on rivafb-i2c.c
	7	*
	8	* This file is subject to the terms and conditions of the GNU General Public
	9	* License. See the file COPYING in the main directory of this archive
	10	* for more details.
	11	*/
	12
1da177e4 LT	13	#include <linux/module.h>
1da177e4 LT	14	#include <linux/kernel.h>
1da177e4	15	#include <linux/delay.h>
5a0e3ad6	16	#include <linux/gfp.h>
1da177e4 LT	17	#include <linux/pci.h>
	18	#include <linux/fb.h>
	19
	20	#include <asm/io.h>
	21
	22	#include "nv_type.h"
	23	#include "nv_local.h"
	24	#include "nv_proto.h"
	25
	26	#include "../edid.h"
	27
	28	static void nvidia_gpio_setscl(void *data, int state)
	29	{
	30	struct nvidia_i2c_chan *chan = data;
	31	struct nvidia_par *par = chan->par;
	32	u32 val;
	33
e296927b	34	val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0;
1da177e4 LT	35
	36	if (state)
	37	val \|= 0x20;
	38	else
	39	val &= ~0x20;
	40
e296927b	41	NVWriteCrtc(par, chan->ddc_base + 1, val \| 0x01);
1da177e4 LT	42	}
	43
	44	static void nvidia_gpio_setsda(void *data, int state)
	45	{
c439e345	46	struct nvidia_i2c_chan *chan = data;
1da177e4 LT	47	struct nvidia_par *par = chan->par;
	48	u32 val;
	49
e296927b	50	val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0;
1da177e4 LT	51
	52	if (state)
	53	val \|= 0x10;
	54	else
	55	val &= ~0x10;
	56
e296927b	57	NVWriteCrtc(par, chan->ddc_base + 1, val \| 0x01);
1da177e4 LT	58	}
	59
	60	static int nvidia_gpio_getscl(void *data)
	61	{
c439e345	62	struct nvidia_i2c_chan *chan = data;
1da177e4 LT	63	struct nvidia_par *par = chan->par;
	64	u32 val = 0;
	65
e296927b	66	if (NVReadCrtc(par, chan->ddc_base) & 0x04)
1da177e4 LT	67	val = 1;
1da177e4 LT	68
1da177e4 LT	69	return val;
	70	}
	71
	72	static int nvidia_gpio_getsda(void *data)
	73	{
c439e345	74	struct nvidia_i2c_chan *chan = data;
1da177e4 LT	75	struct nvidia_par *par = chan->par;
	76	u32 val = 0;
	77
e296927b	78	if (NVReadCrtc(par, chan->ddc_base) & 0x08)
1da177e4 LT	79	val = 1;
	80
	81	return val;
	82	}
	83
1e73db25 JD	84	static int nvidia_setup_i2c_bus(struct nvidia_i2c_chan chan, const char name,
1e73db25 JD	85	unsigned int i2c_class)
1da177e4 LT	86	{
	87	int rc;
	88
	89	strcpy(chan->adapter.name, name);
	90	chan->adapter.owner = THIS_MODULE;
1e73db25	91	chan->adapter.class = i2c_class;
1da177e4 LT	92	chan->adapter.algo_data = &chan->algo;
	93	chan->adapter.dev.parent = &chan->par->pci_dev->dev;
	94	chan->algo.setsda = nvidia_gpio_setsda;
	95	chan->algo.setscl = nvidia_gpio_setscl;
	96	chan->algo.getsda = nvidia_gpio_getsda;
	97	chan->algo.getscl = nvidia_gpio_getscl;
	98	chan->algo.udelay = 40;
	99	chan->algo.timeout = msecs_to_jiffies(2);
	100	chan->algo.data = chan;
	101
	102	i2c_set_adapdata(&chan->adapter, chan);
	103
	104	/* Raise SCL and SDA */
	105	nvidia_gpio_setsda(chan, 1);
	106	nvidia_gpio_setscl(chan, 1);
	107	udelay(20);
	108
	109	rc = i2c_bit_add_bus(&chan->adapter);
	110	if (rc == 0)
	111	dev_dbg(&chan->par->pci_dev->dev,
	112	"I2C bus %s registered.\n", name);
	113	else {
	114	dev_warn(&chan->par->pci_dev->dev,
	115	"Failed to register I2C bus %s.\n", name);
	116	chan->par = NULL;
	117	}
	118
	119	return rc;
	120	}
	121
	122	void nvidia_create_i2c_busses(struct nvidia_par *par)
	123	{
1da177e4 LT	124	par->chan[0].par = par;
	125	par->chan[1].par = par;
	126	par->chan[2].par = par;
	127
3c03ec20	128	par->chan[0].ddc_base = (par->reverse_i2c) ? 0x36 : 0x3e;
076a7dce AD	129	nvidia_setup_i2c_bus(&par->chan[0], "nvidia #0",
076a7dce AD	130	(par->reverse_i2c) ? I2C_CLASS_HWMON : 0);
1da177e4	131
3c03ec20	132	par->chan[1].ddc_base = (par->reverse_i2c) ? 0x3e : 0x36;
076a7dce AD	133	nvidia_setup_i2c_bus(&par->chan[1], "nvidia #1",
076a7dce AD	134	(par->reverse_i2c) ? 0 : I2C_CLASS_HWMON);
1da177e4 LT	135
1da177e4 LT	136	par->chan[2].ddc_base = 0x50;
1e73db25	137	nvidia_setup_i2c_bus(&par->chan[2], "nvidia #2", 0);
1da177e4 LT	138	}
	139
	140	void nvidia_delete_i2c_busses(struct nvidia_par *par)
	141	{
a65ff76a	142	int i;
1da177e4	143
a65ff76a JD	144	for (i = 0; i < 3; i++) {
	145	if (!par->chan[i].par)
	146	continue;
	147	i2c_del_adapter(&par->chan[i].adapter);
	148	par->chan[i].par = NULL;
	149	}
1da177e4 LT	150	}
1da177e4 LT	151
094bb659	152	int nvidia_probe_i2c_connector(struct fb_info info, int conn, u8 *out_edid)
1da177e4	153	{
094bb659	154	struct nvidia_par *par = info->par;
7e491092	155	u8 *edid = NULL;
7e491092	156
66fd1412 AD	157	if (par->chan[conn - 1].par)
66fd1412 AD	158	edid = fb_ddc_read(&par->chan[conn - 1].adapter);
094bb659 AD	159
	160	if (!edid && conn == 1) {
	161	/* try to get from firmware */
0ed8e048 AD	162	const u8 *e = fb_firmware_edid(info->device);
0ed8e048 AD	163
bfba7b37 AD	164	if (e != NULL)
bfba7b37 AD	165	edid = kmemdup(e, EDID_LENGTH, GFP_KERNEL);
094bb659 AD	166	}
094bb659 AD	167
3d5b191f	168	*out_edid = edid;
1da177e4	169
094bb659	170	return (edid) ? 0 : 1;
1da177e4	171	}