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9b53a9e2 YS |
1 | /* |
2 | * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. | |
3 | * | |
4 | * Freescale DIU Frame Buffer device driver | |
5 | * | |
6 | * Authors: Hongjun Chen <hong-jun.chen@freescale.com> | |
7 | * Paul Widmer <paul.widmer@freescale.com> | |
8 | * Srikanth Srinivasan <srikanth.srinivasan@freescale.com> | |
9 | * York Sun <yorksun@freescale.com> | |
10 | * | |
11 | * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or modify it | |
14 | * under the terms of the GNU General Public License as published by the | |
15 | * Free Software Foundation; either version 2 of the License, or (at your | |
16 | * option) any later version. | |
17 | * | |
18 | */ | |
19 | ||
20 | #include <linux/module.h> | |
21 | #include <linux/kernel.h> | |
22 | #include <linux/errno.h> | |
23 | #include <linux/string.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/fb.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/dma-mapping.h> | |
28 | #include <linux/platform_device.h> | |
29 | #include <linux/interrupt.h> | |
30 | #include <linux/clk.h> | |
31 | #include <linux/uaccess.h> | |
32 | #include <linux/vmalloc.h> | |
33 | ||
9b53a9e2 | 34 | #include <sysdev/fsl_soc.h> |
0814a979 | 35 | #include <linux/fsl-diu-fb.h> |
8b856f04 | 36 | #include "edid.h" |
9b53a9e2 YS |
37 | |
38 | /* | |
63cf8df4 TT |
39 | * List of supported video modes |
40 | * | |
41 | * The first entry is the default video mode | |
9b53a9e2 | 42 | */ |
9b53a9e2 YS |
43 | static struct fb_videomode __devinitdata fsl_diu_mode_db[] = { |
44 | { | |
45 | .name = "1024x768-60", | |
46 | .refresh = 60, | |
47 | .xres = 1024, | |
48 | .yres = 768, | |
49 | .pixclock = 15385, | |
50 | .left_margin = 160, | |
51 | .right_margin = 24, | |
52 | .upper_margin = 29, | |
53 | .lower_margin = 3, | |
54 | .hsync_len = 136, | |
55 | .vsync_len = 6, | |
56 | .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
57 | .vmode = FB_VMODE_NONINTERLACED | |
58 | }, | |
59 | { | |
60 | .name = "1024x768-70", | |
61 | .refresh = 70, | |
62 | .xres = 1024, | |
63 | .yres = 768, | |
64 | .pixclock = 16886, | |
65 | .left_margin = 3, | |
66 | .right_margin = 3, | |
67 | .upper_margin = 2, | |
68 | .lower_margin = 2, | |
69 | .hsync_len = 40, | |
70 | .vsync_len = 18, | |
71 | .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
72 | .vmode = FB_VMODE_NONINTERLACED | |
73 | }, | |
74 | { | |
75 | .name = "1024x768-75", | |
76 | .refresh = 75, | |
77 | .xres = 1024, | |
78 | .yres = 768, | |
79 | .pixclock = 15009, | |
80 | .left_margin = 3, | |
81 | .right_margin = 3, | |
82 | .upper_margin = 2, | |
83 | .lower_margin = 2, | |
84 | .hsync_len = 80, | |
85 | .vsync_len = 32, | |
86 | .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
87 | .vmode = FB_VMODE_NONINTERLACED | |
88 | }, | |
89 | { | |
90 | .name = "1280x1024-60", | |
91 | .refresh = 60, | |
92 | .xres = 1280, | |
93 | .yres = 1024, | |
94 | .pixclock = 9375, | |
95 | .left_margin = 38, | |
96 | .right_margin = 128, | |
97 | .upper_margin = 2, | |
98 | .lower_margin = 7, | |
99 | .hsync_len = 216, | |
100 | .vsync_len = 37, | |
101 | .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
102 | .vmode = FB_VMODE_NONINTERLACED | |
103 | }, | |
104 | { | |
105 | .name = "1280x1024-70", | |
106 | .refresh = 70, | |
107 | .xres = 1280, | |
108 | .yres = 1024, | |
109 | .pixclock = 9380, | |
110 | .left_margin = 6, | |
111 | .right_margin = 6, | |
112 | .upper_margin = 4, | |
113 | .lower_margin = 4, | |
114 | .hsync_len = 60, | |
115 | .vsync_len = 94, | |
116 | .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
117 | .vmode = FB_VMODE_NONINTERLACED | |
118 | }, | |
119 | { | |
120 | .name = "1280x1024-75", | |
121 | .refresh = 75, | |
122 | .xres = 1280, | |
123 | .yres = 1024, | |
124 | .pixclock = 9380, | |
125 | .left_margin = 6, | |
126 | .right_margin = 6, | |
127 | .upper_margin = 4, | |
128 | .lower_margin = 4, | |
129 | .hsync_len = 60, | |
130 | .vsync_len = 15, | |
131 | .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
132 | .vmode = FB_VMODE_NONINTERLACED | |
133 | }, | |
134 | { | |
135 | .name = "320x240", /* for AOI only */ | |
136 | .refresh = 60, | |
137 | .xres = 320, | |
138 | .yres = 240, | |
139 | .pixclock = 15385, | |
140 | .left_margin = 0, | |
141 | .right_margin = 0, | |
142 | .upper_margin = 0, | |
143 | .lower_margin = 0, | |
144 | .hsync_len = 0, | |
145 | .vsync_len = 0, | |
146 | .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
147 | .vmode = FB_VMODE_NONINTERLACED | |
148 | }, | |
149 | { | |
150 | .name = "1280x480-60", | |
151 | .refresh = 60, | |
152 | .xres = 1280, | |
153 | .yres = 480, | |
154 | .pixclock = 18939, | |
155 | .left_margin = 353, | |
156 | .right_margin = 47, | |
157 | .upper_margin = 39, | |
158 | .lower_margin = 4, | |
159 | .hsync_len = 8, | |
160 | .vsync_len = 2, | |
161 | .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
162 | .vmode = FB_VMODE_NONINTERLACED | |
163 | }, | |
164 | }; | |
165 | ||
166 | static char *fb_mode = "1024x768-32@60"; | |
167 | static unsigned long default_bpp = 32; | |
7653aaab TT |
168 | static enum fsl_diu_monitor_port monitor_port; |
169 | static char *monitor_string; | |
9b53a9e2 YS |
170 | |
171 | #if defined(CONFIG_NOT_COHERENT_CACHE) | |
172 | static u8 *coherence_data; | |
173 | static size_t coherence_data_size; | |
174 | static unsigned int d_cache_line_size; | |
175 | #endif | |
176 | ||
177 | static DEFINE_SPINLOCK(diu_lock); | |
178 | ||
179 | struct fsl_diu_data { | |
180 | struct fb_info *fsl_diu_info[FSL_AOI_NUM - 1]; | |
181 | /*FSL_AOI_NUM has one dummy AOI */ | |
182 | struct device_attribute dev_attr; | |
183 | struct diu_ad *dummy_ad; | |
184 | void *dummy_aoi_virt; | |
185 | unsigned int irq; | |
186 | int fb_enabled; | |
7653aaab | 187 | enum fsl_diu_monitor_port monitor_port; |
9b53a9e2 YS |
188 | }; |
189 | ||
190 | struct mfb_info { | |
191 | int index; | |
192 | int type; | |
193 | char *id; | |
194 | int registered; | |
195 | int blank; | |
196 | unsigned long pseudo_palette[16]; | |
197 | struct diu_ad *ad; | |
198 | int cursor_reset; | |
199 | unsigned char g_alpha; | |
200 | unsigned int count; | |
201 | int x_aoi_d; /* aoi display x offset to physical screen */ | |
202 | int y_aoi_d; /* aoi display y offset to physical screen */ | |
203 | struct fsl_diu_data *parent; | |
8b856f04 | 204 | u8 *edid_data; |
9b53a9e2 YS |
205 | }; |
206 | ||
207 | ||
208 | static struct mfb_info mfb_template[] = { | |
209 | { /* AOI 0 for plane 0 */ | |
4a85dc8b TT |
210 | .index = 0, |
211 | .type = MFB_TYPE_OUTPUT, | |
212 | .id = "Panel0", | |
213 | .registered = 0, | |
214 | .count = 0, | |
215 | .x_aoi_d = 0, | |
216 | .y_aoi_d = 0, | |
9b53a9e2 YS |
217 | }, |
218 | { /* AOI 0 for plane 1 */ | |
4a85dc8b TT |
219 | .index = 1, |
220 | .type = MFB_TYPE_OUTPUT, | |
221 | .id = "Panel1 AOI0", | |
222 | .registered = 0, | |
223 | .g_alpha = 0xff, | |
224 | .count = 0, | |
225 | .x_aoi_d = 0, | |
226 | .y_aoi_d = 0, | |
9b53a9e2 YS |
227 | }, |
228 | { /* AOI 1 for plane 1 */ | |
4a85dc8b TT |
229 | .index = 2, |
230 | .type = MFB_TYPE_OUTPUT, | |
231 | .id = "Panel1 AOI1", | |
232 | .registered = 0, | |
233 | .g_alpha = 0xff, | |
234 | .count = 0, | |
235 | .x_aoi_d = 0, | |
236 | .y_aoi_d = 480, | |
9b53a9e2 YS |
237 | }, |
238 | { /* AOI 0 for plane 2 */ | |
4a85dc8b TT |
239 | .index = 3, |
240 | .type = MFB_TYPE_OUTPUT, | |
241 | .id = "Panel2 AOI0", | |
242 | .registered = 0, | |
243 | .g_alpha = 0xff, | |
244 | .count = 0, | |
245 | .x_aoi_d = 640, | |
246 | .y_aoi_d = 0, | |
9b53a9e2 YS |
247 | }, |
248 | { /* AOI 1 for plane 2 */ | |
4a85dc8b TT |
249 | .index = 4, |
250 | .type = MFB_TYPE_OUTPUT, | |
251 | .id = "Panel2 AOI1", | |
252 | .registered = 0, | |
253 | .g_alpha = 0xff, | |
254 | .count = 0, | |
255 | .x_aoi_d = 640, | |
256 | .y_aoi_d = 480, | |
9b53a9e2 YS |
257 | }, |
258 | }; | |
259 | ||
260 | static struct diu_hw dr = { | |
261 | .mode = MFB_MODE1, | |
262 | .reg_lock = __SPIN_LOCK_UNLOCKED(diu_hw.reg_lock), | |
263 | }; | |
264 | ||
265 | static struct diu_pool pool; | |
266 | ||
7653aaab TT |
267 | /** |
268 | * fsl_diu_name_to_port - convert a port name to a monitor port enum | |
269 | * | |
270 | * Takes the name of a monitor port ("dvi", "lvds", or "dlvds") and returns | |
271 | * the enum fsl_diu_monitor_port that corresponds to that string. | |
272 | * | |
273 | * For compatibility with older versions, a number ("0", "1", or "2") is also | |
274 | * supported. | |
275 | * | |
276 | * If the string is unknown, DVI is assumed. | |
277 | * | |
278 | * If the particular port is not supported by the platform, another port | |
279 | * (platform-specific) is chosen instead. | |
280 | */ | |
281 | static enum fsl_diu_monitor_port fsl_diu_name_to_port(const char *s) | |
282 | { | |
283 | enum fsl_diu_monitor_port port = FSL_DIU_PORT_DVI; | |
284 | unsigned long val; | |
285 | ||
286 | if (s) { | |
287 | if (!strict_strtoul(s, 10, &val) && (val <= 2)) | |
288 | port = (enum fsl_diu_monitor_port) val; | |
289 | else if (strncmp(s, "lvds", 4) == 0) | |
290 | port = FSL_DIU_PORT_LVDS; | |
291 | else if (strncmp(s, "dlvds", 5) == 0) | |
292 | port = FSL_DIU_PORT_DLVDS; | |
293 | } | |
294 | ||
295 | return diu_ops.valid_monitor_port(port); | |
296 | } | |
297 | ||
6b51d51a TT |
298 | /** |
299 | * fsl_diu_alloc - allocate memory for the DIU | |
300 | * @size: number of bytes to allocate | |
301 | * @param: returned physical address of memory | |
302 | * | |
303 | * This function allocates a physically-contiguous block of memory. | |
9b53a9e2 | 304 | */ |
6b51d51a | 305 | static void *fsl_diu_alloc(size_t size, phys_addr_t *phys) |
9b53a9e2 YS |
306 | { |
307 | void *virt; | |
308 | ||
6b51d51a | 309 | virt = alloc_pages_exact(size, GFP_DMA | __GFP_ZERO); |
154152ae | 310 | if (virt) |
9b53a9e2 | 311 | *phys = virt_to_phys(virt); |
9b53a9e2 | 312 | |
9b53a9e2 YS |
313 | return virt; |
314 | } | |
315 | ||
6b51d51a TT |
316 | /** |
317 | * fsl_diu_free - release DIU memory | |
318 | * @virt: pointer returned by fsl_diu_alloc() | |
319 | * @size: number of bytes allocated by fsl_diu_alloc() | |
320 | * | |
321 | * This function releases memory allocated by fsl_diu_alloc(). | |
322 | */ | |
323 | static void fsl_diu_free(void *virt, size_t size) | |
9b53a9e2 | 324 | { |
6b51d51a TT |
325 | if (virt && size) |
326 | free_pages_exact(virt, size); | |
9b53a9e2 YS |
327 | } |
328 | ||
0d9dab39 AG |
329 | /* |
330 | * Workaround for failed writing desc register of planes. | |
331 | * Needed with MPC5121 DIU rev 2.0 silicon. | |
332 | */ | |
333 | void wr_reg_wa(u32 *reg, u32 val) | |
334 | { | |
335 | do { | |
336 | out_be32(reg, val); | |
337 | } while (in_be32(reg) != val); | |
338 | } | |
339 | ||
9b53a9e2 YS |
340 | static int fsl_diu_enable_panel(struct fb_info *info) |
341 | { | |
342 | struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par; | |
343 | struct diu *hw = dr.diu_reg; | |
344 | struct diu_ad *ad = mfbi->ad; | |
345 | struct fsl_diu_data *machine_data = mfbi->parent; | |
346 | int res = 0; | |
347 | ||
9b53a9e2 YS |
348 | if (mfbi->type != MFB_TYPE_OFF) { |
349 | switch (mfbi->index) { | |
350 | case 0: /* plane 0 */ | |
351 | if (hw->desc[0] != ad->paddr) | |
0d9dab39 | 352 | wr_reg_wa(&hw->desc[0], ad->paddr); |
9b53a9e2 YS |
353 | break; |
354 | case 1: /* plane 1 AOI 0 */ | |
355 | cmfbi = machine_data->fsl_diu_info[2]->par; | |
356 | if (hw->desc[1] != ad->paddr) { /* AOI0 closed */ | |
357 | if (cmfbi->count > 0) /* AOI1 open */ | |
358 | ad->next_ad = | |
359 | cpu_to_le32(cmfbi->ad->paddr); | |
360 | else | |
361 | ad->next_ad = 0; | |
0d9dab39 | 362 | wr_reg_wa(&hw->desc[1], ad->paddr); |
9b53a9e2 YS |
363 | } |
364 | break; | |
365 | case 3: /* plane 2 AOI 0 */ | |
366 | cmfbi = machine_data->fsl_diu_info[4]->par; | |
367 | if (hw->desc[2] != ad->paddr) { /* AOI0 closed */ | |
368 | if (cmfbi->count > 0) /* AOI1 open */ | |
369 | ad->next_ad = | |
370 | cpu_to_le32(cmfbi->ad->paddr); | |
371 | else | |
372 | ad->next_ad = 0; | |
0d9dab39 | 373 | wr_reg_wa(&hw->desc[2], ad->paddr); |
9b53a9e2 YS |
374 | } |
375 | break; | |
376 | case 2: /* plane 1 AOI 1 */ | |
377 | pmfbi = machine_data->fsl_diu_info[1]->par; | |
378 | ad->next_ad = 0; | |
379 | if (hw->desc[1] == machine_data->dummy_ad->paddr) | |
0d9dab39 | 380 | wr_reg_wa(&hw->desc[1], ad->paddr); |
9b53a9e2 YS |
381 | else /* AOI0 open */ |
382 | pmfbi->ad->next_ad = cpu_to_le32(ad->paddr); | |
383 | break; | |
384 | case 4: /* plane 2 AOI 1 */ | |
385 | pmfbi = machine_data->fsl_diu_info[3]->par; | |
386 | ad->next_ad = 0; | |
387 | if (hw->desc[2] == machine_data->dummy_ad->paddr) | |
0d9dab39 | 388 | wr_reg_wa(&hw->desc[2], ad->paddr); |
9b53a9e2 YS |
389 | else /* AOI0 was open */ |
390 | pmfbi->ad->next_ad = cpu_to_le32(ad->paddr); | |
391 | break; | |
392 | default: | |
393 | res = -EINVAL; | |
394 | break; | |
395 | } | |
396 | } else | |
397 | res = -EINVAL; | |
398 | return res; | |
399 | } | |
400 | ||
401 | static int fsl_diu_disable_panel(struct fb_info *info) | |
402 | { | |
403 | struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par; | |
404 | struct diu *hw = dr.diu_reg; | |
405 | struct diu_ad *ad = mfbi->ad; | |
406 | struct fsl_diu_data *machine_data = mfbi->parent; | |
407 | int res = 0; | |
408 | ||
409 | switch (mfbi->index) { | |
410 | case 0: /* plane 0 */ | |
411 | if (hw->desc[0] != machine_data->dummy_ad->paddr) | |
0d9dab39 | 412 | wr_reg_wa(&hw->desc[0], machine_data->dummy_ad->paddr); |
9b53a9e2 YS |
413 | break; |
414 | case 1: /* plane 1 AOI 0 */ | |
415 | cmfbi = machine_data->fsl_diu_info[2]->par; | |
416 | if (cmfbi->count > 0) /* AOI1 is open */ | |
0d9dab39 | 417 | wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr); |
9b53a9e2 YS |
418 | /* move AOI1 to the first */ |
419 | else /* AOI1 was closed */ | |
0d9dab39 | 420 | wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr); |
9b53a9e2 YS |
421 | /* close AOI 0 */ |
422 | break; | |
423 | case 3: /* plane 2 AOI 0 */ | |
424 | cmfbi = machine_data->fsl_diu_info[4]->par; | |
425 | if (cmfbi->count > 0) /* AOI1 is open */ | |
0d9dab39 | 426 | wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr); |
9b53a9e2 YS |
427 | /* move AOI1 to the first */ |
428 | else /* AOI1 was closed */ | |
0d9dab39 | 429 | wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr); |
9b53a9e2 YS |
430 | /* close AOI 0 */ |
431 | break; | |
432 | case 2: /* plane 1 AOI 1 */ | |
433 | pmfbi = machine_data->fsl_diu_info[1]->par; | |
434 | if (hw->desc[1] != ad->paddr) { | |
435 | /* AOI1 is not the first in the chain */ | |
436 | if (pmfbi->count > 0) | |
437 | /* AOI0 is open, must be the first */ | |
438 | pmfbi->ad->next_ad = 0; | |
439 | } else /* AOI1 is the first in the chain */ | |
0d9dab39 | 440 | wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr); |
9b53a9e2 YS |
441 | /* close AOI 1 */ |
442 | break; | |
443 | case 4: /* plane 2 AOI 1 */ | |
444 | pmfbi = machine_data->fsl_diu_info[3]->par; | |
445 | if (hw->desc[2] != ad->paddr) { | |
446 | /* AOI1 is not the first in the chain */ | |
447 | if (pmfbi->count > 0) | |
448 | /* AOI0 is open, must be the first */ | |
449 | pmfbi->ad->next_ad = 0; | |
450 | } else /* AOI1 is the first in the chain */ | |
0d9dab39 | 451 | wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr); |
9b53a9e2 YS |
452 | /* close AOI 1 */ |
453 | break; | |
454 | default: | |
455 | res = -EINVAL; | |
456 | break; | |
457 | } | |
458 | ||
459 | return res; | |
460 | } | |
461 | ||
462 | static void enable_lcdc(struct fb_info *info) | |
463 | { | |
464 | struct diu *hw = dr.diu_reg; | |
465 | struct mfb_info *mfbi = info->par; | |
466 | struct fsl_diu_data *machine_data = mfbi->parent; | |
467 | ||
468 | if (!machine_data->fb_enabled) { | |
469 | out_be32(&hw->diu_mode, dr.mode); | |
470 | machine_data->fb_enabled++; | |
471 | } | |
472 | } | |
473 | ||
474 | static void disable_lcdc(struct fb_info *info) | |
475 | { | |
476 | struct diu *hw = dr.diu_reg; | |
477 | struct mfb_info *mfbi = info->par; | |
478 | struct fsl_diu_data *machine_data = mfbi->parent; | |
479 | ||
480 | if (machine_data->fb_enabled) { | |
481 | out_be32(&hw->diu_mode, 0); | |
482 | machine_data->fb_enabled = 0; | |
483 | } | |
484 | } | |
485 | ||
486 | static void adjust_aoi_size_position(struct fb_var_screeninfo *var, | |
487 | struct fb_info *info) | |
488 | { | |
489 | struct mfb_info *lower_aoi_mfbi, *upper_aoi_mfbi, *mfbi = info->par; | |
490 | struct fsl_diu_data *machine_data = mfbi->parent; | |
491 | int available_height, upper_aoi_bottom, index = mfbi->index; | |
492 | int lower_aoi_is_open, upper_aoi_is_open; | |
493 | __u32 base_plane_width, base_plane_height, upper_aoi_height; | |
494 | ||
495 | base_plane_width = machine_data->fsl_diu_info[0]->var.xres; | |
496 | base_plane_height = machine_data->fsl_diu_info[0]->var.yres; | |
497 | ||
fdfaa483 YS |
498 | if (mfbi->x_aoi_d < 0) |
499 | mfbi->x_aoi_d = 0; | |
500 | if (mfbi->y_aoi_d < 0) | |
501 | mfbi->y_aoi_d = 0; | |
9b53a9e2 YS |
502 | switch (index) { |
503 | case 0: | |
504 | if (mfbi->x_aoi_d != 0) | |
505 | mfbi->x_aoi_d = 0; | |
506 | if (mfbi->y_aoi_d != 0) | |
507 | mfbi->y_aoi_d = 0; | |
508 | break; | |
509 | case 1: /* AOI 0 */ | |
510 | case 3: | |
511 | lower_aoi_mfbi = machine_data->fsl_diu_info[index+1]->par; | |
512 | lower_aoi_is_open = lower_aoi_mfbi->count > 0 ? 1 : 0; | |
513 | if (var->xres > base_plane_width) | |
514 | var->xres = base_plane_width; | |
515 | if ((mfbi->x_aoi_d + var->xres) > base_plane_width) | |
516 | mfbi->x_aoi_d = base_plane_width - var->xres; | |
517 | ||
518 | if (lower_aoi_is_open) | |
519 | available_height = lower_aoi_mfbi->y_aoi_d; | |
520 | else | |
521 | available_height = base_plane_height; | |
522 | if (var->yres > available_height) | |
523 | var->yres = available_height; | |
524 | if ((mfbi->y_aoi_d + var->yres) > available_height) | |
525 | mfbi->y_aoi_d = available_height - var->yres; | |
526 | break; | |
527 | case 2: /* AOI 1 */ | |
528 | case 4: | |
529 | upper_aoi_mfbi = machine_data->fsl_diu_info[index-1]->par; | |
530 | upper_aoi_height = | |
531 | machine_data->fsl_diu_info[index-1]->var.yres; | |
532 | upper_aoi_bottom = upper_aoi_mfbi->y_aoi_d + upper_aoi_height; | |
533 | upper_aoi_is_open = upper_aoi_mfbi->count > 0 ? 1 : 0; | |
534 | if (var->xres > base_plane_width) | |
535 | var->xres = base_plane_width; | |
536 | if ((mfbi->x_aoi_d + var->xres) > base_plane_width) | |
537 | mfbi->x_aoi_d = base_plane_width - var->xres; | |
538 | if (mfbi->y_aoi_d < 0) | |
539 | mfbi->y_aoi_d = 0; | |
540 | if (upper_aoi_is_open) { | |
541 | if (mfbi->y_aoi_d < upper_aoi_bottom) | |
542 | mfbi->y_aoi_d = upper_aoi_bottom; | |
543 | available_height = base_plane_height | |
544 | - upper_aoi_bottom; | |
545 | } else | |
546 | available_height = base_plane_height; | |
547 | if (var->yres > available_height) | |
548 | var->yres = available_height; | |
549 | if ((mfbi->y_aoi_d + var->yres) > base_plane_height) | |
550 | mfbi->y_aoi_d = base_plane_height - var->yres; | |
551 | break; | |
552 | } | |
553 | } | |
554 | /* | |
555 | * Checks to see if the hardware supports the state requested by var passed | |
556 | * in. This function does not alter the hardware state! If the var passed in | |
557 | * is slightly off by what the hardware can support then we alter the var | |
558 | * PASSED in to what we can do. If the hardware doesn't support mode change | |
559 | * a -EINVAL will be returned by the upper layers. | |
560 | */ | |
561 | static int fsl_diu_check_var(struct fb_var_screeninfo *var, | |
562 | struct fb_info *info) | |
563 | { | |
9b53a9e2 YS |
564 | if (var->xres_virtual < var->xres) |
565 | var->xres_virtual = var->xres; | |
566 | if (var->yres_virtual < var->yres) | |
567 | var->yres_virtual = var->yres; | |
568 | ||
569 | if (var->xoffset < 0) | |
570 | var->xoffset = 0; | |
571 | ||
572 | if (var->yoffset < 0) | |
573 | var->yoffset = 0; | |
574 | ||
575 | if (var->xoffset + info->var.xres > info->var.xres_virtual) | |
576 | var->xoffset = info->var.xres_virtual - info->var.xres; | |
577 | ||
578 | if (var->yoffset + info->var.yres > info->var.yres_virtual) | |
579 | var->yoffset = info->var.yres_virtual - info->var.yres; | |
580 | ||
581 | if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) && | |
582 | (var->bits_per_pixel != 16)) | |
583 | var->bits_per_pixel = default_bpp; | |
584 | ||
585 | switch (var->bits_per_pixel) { | |
586 | case 16: | |
587 | var->red.length = 5; | |
588 | var->red.offset = 11; | |
589 | var->red.msb_right = 0; | |
590 | ||
591 | var->green.length = 6; | |
592 | var->green.offset = 5; | |
593 | var->green.msb_right = 0; | |
594 | ||
595 | var->blue.length = 5; | |
596 | var->blue.offset = 0; | |
597 | var->blue.msb_right = 0; | |
598 | ||
599 | var->transp.length = 0; | |
600 | var->transp.offset = 0; | |
601 | var->transp.msb_right = 0; | |
602 | break; | |
603 | case 24: | |
604 | var->red.length = 8; | |
605 | var->red.offset = 0; | |
606 | var->red.msb_right = 0; | |
607 | ||
608 | var->green.length = 8; | |
609 | var->green.offset = 8; | |
610 | var->green.msb_right = 0; | |
611 | ||
612 | var->blue.length = 8; | |
613 | var->blue.offset = 16; | |
614 | var->blue.msb_right = 0; | |
615 | ||
616 | var->transp.length = 0; | |
617 | var->transp.offset = 0; | |
618 | var->transp.msb_right = 0; | |
619 | break; | |
620 | case 32: | |
621 | var->red.length = 8; | |
622 | var->red.offset = 16; | |
623 | var->red.msb_right = 0; | |
624 | ||
625 | var->green.length = 8; | |
626 | var->green.offset = 8; | |
627 | var->green.msb_right = 0; | |
628 | ||
629 | var->blue.length = 8; | |
630 | var->blue.offset = 0; | |
631 | var->blue.msb_right = 0; | |
632 | ||
633 | var->transp.length = 8; | |
634 | var->transp.offset = 24; | |
635 | var->transp.msb_right = 0; | |
636 | ||
637 | break; | |
638 | } | |
9b53a9e2 YS |
639 | |
640 | var->height = -1; | |
641 | var->width = -1; | |
642 | var->grayscale = 0; | |
643 | ||
644 | /* Copy nonstd field to/from sync for fbset usage */ | |
645 | var->sync |= var->nonstd; | |
646 | var->nonstd |= var->sync; | |
647 | ||
648 | adjust_aoi_size_position(var, info); | |
649 | return 0; | |
650 | } | |
651 | ||
652 | static void set_fix(struct fb_info *info) | |
653 | { | |
654 | struct fb_fix_screeninfo *fix = &info->fix; | |
655 | struct fb_var_screeninfo *var = &info->var; | |
656 | struct mfb_info *mfbi = info->par; | |
657 | ||
658 | strncpy(fix->id, mfbi->id, strlen(mfbi->id)); | |
659 | fix->line_length = var->xres_virtual * var->bits_per_pixel / 8; | |
660 | fix->type = FB_TYPE_PACKED_PIXELS; | |
661 | fix->accel = FB_ACCEL_NONE; | |
662 | fix->visual = FB_VISUAL_TRUECOLOR; | |
663 | fix->xpanstep = 1; | |
664 | fix->ypanstep = 1; | |
665 | } | |
666 | ||
667 | static void update_lcdc(struct fb_info *info) | |
668 | { | |
669 | struct fb_var_screeninfo *var = &info->var; | |
670 | struct mfb_info *mfbi = info->par; | |
671 | struct fsl_diu_data *machine_data = mfbi->parent; | |
672 | struct diu *hw; | |
673 | int i, j; | |
674 | char __iomem *cursor_base, *gamma_table_base; | |
675 | ||
676 | u32 temp; | |
677 | ||
678 | hw = dr.diu_reg; | |
679 | ||
680 | if (mfbi->type == MFB_TYPE_OFF) { | |
681 | fsl_diu_disable_panel(info); | |
682 | return; | |
683 | } | |
684 | ||
685 | diu_ops.set_monitor_port(machine_data->monitor_port); | |
686 | gamma_table_base = pool.gamma.vaddr; | |
687 | cursor_base = pool.cursor.vaddr; | |
688 | /* Prep for DIU init - gamma table, cursor table */ | |
689 | ||
690 | for (i = 0; i <= 2; i++) | |
4a85dc8b TT |
691 | for (j = 0; j <= 255; j++) |
692 | *gamma_table_base++ = j; | |
9b53a9e2 YS |
693 | |
694 | diu_ops.set_gamma_table(machine_data->monitor_port, pool.gamma.vaddr); | |
695 | ||
9b53a9e2 YS |
696 | disable_lcdc(info); |
697 | ||
698 | /* Program DIU registers */ | |
699 | ||
700 | out_be32(&hw->gamma, pool.gamma.paddr); | |
701 | out_be32(&hw->cursor, pool.cursor.paddr); | |
702 | ||
703 | out_be32(&hw->bgnd, 0x007F7F7F); /* BGND */ | |
704 | out_be32(&hw->bgnd_wb, 0); /* BGND_WB */ | |
705 | out_be32(&hw->disp_size, (var->yres << 16 | var->xres)); | |
706 | /* DISP SIZE */ | |
9b53a9e2 YS |
707 | out_be32(&hw->wb_size, 0); /* WB SIZE */ |
708 | out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */ | |
709 | ||
710 | /* Horizontal and vertical configuration register */ | |
711 | temp = var->left_margin << 22 | /* BP_H */ | |
712 | var->hsync_len << 11 | /* PW_H */ | |
713 | var->right_margin; /* FP_H */ | |
714 | ||
715 | out_be32(&hw->hsyn_para, temp); | |
716 | ||
717 | temp = var->upper_margin << 22 | /* BP_V */ | |
718 | var->vsync_len << 11 | /* PW_V */ | |
719 | var->lower_margin; /* FP_V */ | |
720 | ||
721 | out_be32(&hw->vsyn_para, temp); | |
722 | ||
9b53a9e2 YS |
723 | diu_ops.set_pixel_clock(var->pixclock); |
724 | ||
725 | out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */ | |
726 | out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */ | |
727 | out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */ | |
728 | out_be32(&hw->plut, 0x01F5F666); | |
729 | ||
730 | /* Enable the DIU */ | |
731 | enable_lcdc(info); | |
732 | } | |
733 | ||
734 | static int map_video_memory(struct fb_info *info) | |
735 | { | |
736 | phys_addr_t phys; | |
537a1bf0 | 737 | u32 smem_len = info->fix.line_length * info->var.yres_virtual; |
9b53a9e2 | 738 | |
537a1bf0 | 739 | info->screen_base = fsl_diu_alloc(smem_len, &phys); |
05946bce | 740 | if (info->screen_base == NULL) { |
154152ae | 741 | dev_err(info->dev, "unable to allocate fb memory\n"); |
9b53a9e2 YS |
742 | return -ENOMEM; |
743 | } | |
537a1bf0 | 744 | mutex_lock(&info->mm_lock); |
9b53a9e2 | 745 | info->fix.smem_start = (unsigned long) phys; |
537a1bf0 KH |
746 | info->fix.smem_len = smem_len; |
747 | mutex_unlock(&info->mm_lock); | |
9b53a9e2 YS |
748 | info->screen_size = info->fix.smem_len; |
749 | ||
9b53a9e2 YS |
750 | return 0; |
751 | } | |
752 | ||
753 | static void unmap_video_memory(struct fb_info *info) | |
754 | { | |
755 | fsl_diu_free(info->screen_base, info->fix.smem_len); | |
537a1bf0 | 756 | mutex_lock(&info->mm_lock); |
05946bce | 757 | info->screen_base = NULL; |
9b53a9e2 YS |
758 | info->fix.smem_start = 0; |
759 | info->fix.smem_len = 0; | |
537a1bf0 | 760 | mutex_unlock(&info->mm_lock); |
9b53a9e2 YS |
761 | } |
762 | ||
ae5591e3 YS |
763 | /* |
764 | * Using the fb_var_screeninfo in fb_info we set the aoi of this | |
765 | * particular framebuffer. It is a light version of fsl_diu_set_par. | |
766 | */ | |
767 | static int fsl_diu_set_aoi(struct fb_info *info) | |
768 | { | |
769 | struct fb_var_screeninfo *var = &info->var; | |
770 | struct mfb_info *mfbi = info->par; | |
771 | struct diu_ad *ad = mfbi->ad; | |
772 | ||
773 | /* AOI should not be greater than display size */ | |
774 | ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset); | |
775 | ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d); | |
776 | return 0; | |
777 | } | |
778 | ||
9b53a9e2 YS |
779 | /* |
780 | * Using the fb_var_screeninfo in fb_info we set the resolution of this | |
781 | * particular framebuffer. This function alters the fb_fix_screeninfo stored | |
782 | * in fb_info. It does not alter var in fb_info since we are using that | |
783 | * data. This means we depend on the data in var inside fb_info to be | |
784 | * supported by the hardware. fsl_diu_check_var is always called before | |
785 | * fsl_diu_set_par to ensure this. | |
786 | */ | |
787 | static int fsl_diu_set_par(struct fb_info *info) | |
788 | { | |
789 | unsigned long len; | |
790 | struct fb_var_screeninfo *var = &info->var; | |
791 | struct mfb_info *mfbi = info->par; | |
792 | struct fsl_diu_data *machine_data = mfbi->parent; | |
793 | struct diu_ad *ad = mfbi->ad; | |
794 | struct diu *hw; | |
795 | ||
796 | hw = dr.diu_reg; | |
797 | ||
798 | set_fix(info); | |
799 | mfbi->cursor_reset = 1; | |
800 | ||
801 | len = info->var.yres_virtual * info->fix.line_length; | |
802 | /* Alloc & dealloc each time resolution/bpp change */ | |
803 | if (len != info->fix.smem_len) { | |
804 | if (info->fix.smem_start) | |
805 | unmap_video_memory(info); | |
9b53a9e2 YS |
806 | |
807 | /* Memory allocation for framebuffer */ | |
808 | if (map_video_memory(info)) { | |
154152ae | 809 | dev_err(info->dev, "unable to allocate fb memory 1\n"); |
9b53a9e2 YS |
810 | return -ENOMEM; |
811 | } | |
812 | } | |
813 | ||
7653aaab TT |
814 | ad->pix_fmt = diu_ops.get_pixel_format(machine_data->monitor_port, |
815 | var->bits_per_pixel); | |
9b53a9e2 | 816 | ad->addr = cpu_to_le32(info->fix.smem_start); |
ae5591e3 YS |
817 | ad->src_size_g_alpha = cpu_to_le32((var->yres_virtual << 12) | |
818 | var->xres_virtual) | mfbi->g_alpha; | |
819 | /* AOI should not be greater than display size */ | |
9b53a9e2 | 820 | ad->aoi_size = cpu_to_le32((var->yres << 16) | var->xres); |
ae5591e3 | 821 | ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset); |
9b53a9e2 YS |
822 | ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d); |
823 | ||
824 | /* Disable chroma keying function */ | |
825 | ad->ckmax_r = 0; | |
826 | ad->ckmax_g = 0; | |
827 | ad->ckmax_b = 0; | |
828 | ||
829 | ad->ckmin_r = 255; | |
830 | ad->ckmin_g = 255; | |
831 | ad->ckmin_b = 255; | |
832 | ||
833 | if (mfbi->index == 0) | |
834 | update_lcdc(info); | |
835 | return 0; | |
836 | } | |
837 | ||
838 | static inline __u32 CNVT_TOHW(__u32 val, __u32 width) | |
839 | { | |
4a85dc8b | 840 | return ((val << width) + 0x7FFF - val) >> 16; |
9b53a9e2 YS |
841 | } |
842 | ||
843 | /* | |
844 | * Set a single color register. The values supplied have a 16 bit magnitude | |
845 | * which needs to be scaled in this function for the hardware. Things to take | |
846 | * into consideration are how many color registers, if any, are supported with | |
847 | * the current color visual. With truecolor mode no color palettes are | |
25985edc | 848 | * supported. Here a pseudo palette is created which we store the value in |
9b53a9e2 YS |
849 | * pseudo_palette in struct fb_info. For pseudocolor mode we have a limited |
850 | * color palette. | |
851 | */ | |
4a85dc8b TT |
852 | static int fsl_diu_setcolreg(unsigned int regno, unsigned int red, |
853 | unsigned int green, unsigned int blue, | |
854 | unsigned int transp, struct fb_info *info) | |
9b53a9e2 YS |
855 | { |
856 | int ret = 1; | |
857 | ||
858 | /* | |
859 | * If greyscale is true, then we convert the RGB value | |
860 | * to greyscale no matter what visual we are using. | |
861 | */ | |
862 | if (info->var.grayscale) | |
863 | red = green = blue = (19595 * red + 38470 * green + | |
864 | 7471 * blue) >> 16; | |
865 | switch (info->fix.visual) { | |
866 | case FB_VISUAL_TRUECOLOR: | |
867 | /* | |
868 | * 16-bit True Colour. We encode the RGB value | |
869 | * according to the RGB bitfield information. | |
870 | */ | |
871 | if (regno < 16) { | |
872 | u32 *pal = info->pseudo_palette; | |
873 | u32 v; | |
874 | ||
875 | red = CNVT_TOHW(red, info->var.red.length); | |
876 | green = CNVT_TOHW(green, info->var.green.length); | |
877 | blue = CNVT_TOHW(blue, info->var.blue.length); | |
878 | transp = CNVT_TOHW(transp, info->var.transp.length); | |
879 | ||
880 | v = (red << info->var.red.offset) | | |
881 | (green << info->var.green.offset) | | |
882 | (blue << info->var.blue.offset) | | |
883 | (transp << info->var.transp.offset); | |
884 | ||
885 | pal[regno] = v; | |
886 | ret = 0; | |
887 | } | |
888 | break; | |
9b53a9e2 YS |
889 | } |
890 | ||
891 | return ret; | |
892 | } | |
893 | ||
894 | /* | |
895 | * Pan (or wrap, depending on the `vmode' field) the display using the | |
896 | * 'xoffset' and 'yoffset' fields of the 'var' structure. If the values | |
897 | * don't fit, return -EINVAL. | |
898 | */ | |
899 | static int fsl_diu_pan_display(struct fb_var_screeninfo *var, | |
900 | struct fb_info *info) | |
901 | { | |
902 | if ((info->var.xoffset == var->xoffset) && | |
903 | (info->var.yoffset == var->yoffset)) | |
904 | return 0; /* No change, do nothing */ | |
905 | ||
906 | if (var->xoffset < 0 || var->yoffset < 0 | |
907 | || var->xoffset + info->var.xres > info->var.xres_virtual | |
908 | || var->yoffset + info->var.yres > info->var.yres_virtual) | |
909 | return -EINVAL; | |
910 | ||
911 | info->var.xoffset = var->xoffset; | |
912 | info->var.yoffset = var->yoffset; | |
913 | ||
914 | if (var->vmode & FB_VMODE_YWRAP) | |
915 | info->var.vmode |= FB_VMODE_YWRAP; | |
916 | else | |
917 | info->var.vmode &= ~FB_VMODE_YWRAP; | |
918 | ||
ae5591e3 YS |
919 | fsl_diu_set_aoi(info); |
920 | ||
9b53a9e2 YS |
921 | return 0; |
922 | } | |
923 | ||
924 | /* | |
925 | * Blank the screen if blank_mode != 0, else unblank. Return 0 if blanking | |
926 | * succeeded, != 0 if un-/blanking failed. | |
927 | * blank_mode == 2: suspend vsync | |
928 | * blank_mode == 3: suspend hsync | |
929 | * blank_mode == 4: powerdown | |
930 | */ | |
931 | static int fsl_diu_blank(int blank_mode, struct fb_info *info) | |
932 | { | |
933 | struct mfb_info *mfbi = info->par; | |
934 | ||
935 | mfbi->blank = blank_mode; | |
936 | ||
937 | switch (blank_mode) { | |
938 | case FB_BLANK_VSYNC_SUSPEND: | |
939 | case FB_BLANK_HSYNC_SUSPEND: | |
940 | /* FIXME: fixes to enable_panel and enable lcdc needed */ | |
941 | case FB_BLANK_NORMAL: | |
942 | /* fsl_diu_disable_panel(info);*/ | |
943 | break; | |
944 | case FB_BLANK_POWERDOWN: | |
945 | /* disable_lcdc(info); */ | |
946 | break; | |
947 | case FB_BLANK_UNBLANK: | |
948 | /* fsl_diu_enable_panel(info);*/ | |
949 | break; | |
950 | } | |
951 | ||
952 | return 0; | |
953 | } | |
954 | ||
955 | static int fsl_diu_ioctl(struct fb_info *info, unsigned int cmd, | |
956 | unsigned long arg) | |
957 | { | |
958 | struct mfb_info *mfbi = info->par; | |
959 | struct diu_ad *ad = mfbi->ad; | |
960 | struct mfb_chroma_key ck; | |
961 | unsigned char global_alpha; | |
962 | struct aoi_display_offset aoi_d; | |
963 | __u32 pix_fmt; | |
964 | void __user *buf = (void __user *)arg; | |
965 | ||
966 | if (!arg) | |
967 | return -EINVAL; | |
968 | switch (cmd) { | |
969 | case MFB_SET_PIXFMT: | |
970 | if (copy_from_user(&pix_fmt, buf, sizeof(pix_fmt))) | |
971 | return -EFAULT; | |
972 | ad->pix_fmt = pix_fmt; | |
9b53a9e2 YS |
973 | break; |
974 | case MFB_GET_PIXFMT: | |
975 | pix_fmt = ad->pix_fmt; | |
976 | if (copy_to_user(buf, &pix_fmt, sizeof(pix_fmt))) | |
977 | return -EFAULT; | |
9b53a9e2 YS |
978 | break; |
979 | case MFB_SET_AOID: | |
980 | if (copy_from_user(&aoi_d, buf, sizeof(aoi_d))) | |
981 | return -EFAULT; | |
982 | mfbi->x_aoi_d = aoi_d.x_aoi_d; | |
983 | mfbi->y_aoi_d = aoi_d.y_aoi_d; | |
9b53a9e2 | 984 | fsl_diu_check_var(&info->var, info); |
ae5591e3 | 985 | fsl_diu_set_aoi(info); |
9b53a9e2 YS |
986 | break; |
987 | case MFB_GET_AOID: | |
988 | aoi_d.x_aoi_d = mfbi->x_aoi_d; | |
989 | aoi_d.y_aoi_d = mfbi->y_aoi_d; | |
990 | if (copy_to_user(buf, &aoi_d, sizeof(aoi_d))) | |
991 | return -EFAULT; | |
9b53a9e2 YS |
992 | break; |
993 | case MFB_GET_ALPHA: | |
994 | global_alpha = mfbi->g_alpha; | |
995 | if (copy_to_user(buf, &global_alpha, sizeof(global_alpha))) | |
996 | return -EFAULT; | |
9b53a9e2 YS |
997 | break; |
998 | case MFB_SET_ALPHA: | |
999 | /* set panel information */ | |
1000 | if (copy_from_user(&global_alpha, buf, sizeof(global_alpha))) | |
1001 | return -EFAULT; | |
1002 | ad->src_size_g_alpha = (ad->src_size_g_alpha & (~0xff)) | | |
1003 | (global_alpha & 0xff); | |
1004 | mfbi->g_alpha = global_alpha; | |
9b53a9e2 YS |
1005 | break; |
1006 | case MFB_SET_CHROMA_KEY: | |
1007 | /* set panel winformation */ | |
1008 | if (copy_from_user(&ck, buf, sizeof(ck))) | |
1009 | return -EFAULT; | |
1010 | ||
1011 | if (ck.enable && | |
1012 | (ck.red_max < ck.red_min || | |
1013 | ck.green_max < ck.green_min || | |
1014 | ck.blue_max < ck.blue_min)) | |
1015 | return -EINVAL; | |
1016 | ||
1017 | if (!ck.enable) { | |
1018 | ad->ckmax_r = 0; | |
1019 | ad->ckmax_g = 0; | |
1020 | ad->ckmax_b = 0; | |
1021 | ad->ckmin_r = 255; | |
1022 | ad->ckmin_g = 255; | |
1023 | ad->ckmin_b = 255; | |
1024 | } else { | |
1025 | ad->ckmax_r = ck.red_max; | |
1026 | ad->ckmax_g = ck.green_max; | |
1027 | ad->ckmax_b = ck.blue_max; | |
1028 | ad->ckmin_r = ck.red_min; | |
1029 | ad->ckmin_g = ck.green_min; | |
1030 | ad->ckmin_b = ck.blue_min; | |
1031 | } | |
9b53a9e2 YS |
1032 | break; |
1033 | case FBIOGET_GWINFO: | |
1034 | if (mfbi->type == MFB_TYPE_OFF) | |
1035 | return -ENODEV; | |
1036 | /* get graphic window information */ | |
1037 | if (copy_to_user(buf, ad, sizeof(*ad))) | |
1038 | return -EFAULT; | |
1039 | break; | |
9b53a9e2 YS |
1040 | |
1041 | default: | |
154152ae | 1042 | dev_err(info->dev, "unknown ioctl command (0x%08X)\n", cmd); |
9b53a9e2 YS |
1043 | return -ENOIOCTLCMD; |
1044 | } | |
1045 | ||
1046 | return 0; | |
1047 | } | |
1048 | ||
1049 | /* turn on fb if count == 1 | |
1050 | */ | |
1051 | static int fsl_diu_open(struct fb_info *info, int user) | |
1052 | { | |
1053 | struct mfb_info *mfbi = info->par; | |
1054 | int res = 0; | |
1055 | ||
4b5006ec AG |
1056 | /* free boot splash memory on first /dev/fb0 open */ |
1057 | if (!mfbi->index && diu_ops.release_bootmem) | |
1058 | diu_ops.release_bootmem(); | |
1059 | ||
9b53a9e2 YS |
1060 | spin_lock(&diu_lock); |
1061 | mfbi->count++; | |
1062 | if (mfbi->count == 1) { | |
9b53a9e2 YS |
1063 | fsl_diu_check_var(&info->var, info); |
1064 | res = fsl_diu_set_par(info); | |
1065 | if (res < 0) | |
1066 | mfbi->count--; | |
1067 | else { | |
1068 | res = fsl_diu_enable_panel(info); | |
1069 | if (res < 0) | |
1070 | mfbi->count--; | |
1071 | } | |
1072 | } | |
1073 | ||
1074 | spin_unlock(&diu_lock); | |
1075 | return res; | |
1076 | } | |
1077 | ||
1078 | /* turn off fb if count == 0 | |
1079 | */ | |
1080 | static int fsl_diu_release(struct fb_info *info, int user) | |
1081 | { | |
1082 | struct mfb_info *mfbi = info->par; | |
1083 | int res = 0; | |
1084 | ||
1085 | spin_lock(&diu_lock); | |
1086 | mfbi->count--; | |
1087 | if (mfbi->count == 0) { | |
9b53a9e2 YS |
1088 | res = fsl_diu_disable_panel(info); |
1089 | if (res < 0) | |
1090 | mfbi->count++; | |
1091 | } | |
1092 | spin_unlock(&diu_lock); | |
1093 | return res; | |
1094 | } | |
1095 | ||
1096 | static struct fb_ops fsl_diu_ops = { | |
1097 | .owner = THIS_MODULE, | |
1098 | .fb_check_var = fsl_diu_check_var, | |
1099 | .fb_set_par = fsl_diu_set_par, | |
1100 | .fb_setcolreg = fsl_diu_setcolreg, | |
1101 | .fb_blank = fsl_diu_blank, | |
1102 | .fb_pan_display = fsl_diu_pan_display, | |
1103 | .fb_fillrect = cfb_fillrect, | |
1104 | .fb_copyarea = cfb_copyarea, | |
1105 | .fb_imageblit = cfb_imageblit, | |
1106 | .fb_ioctl = fsl_diu_ioctl, | |
1107 | .fb_open = fsl_diu_open, | |
1108 | .fb_release = fsl_diu_release, | |
1109 | }; | |
1110 | ||
1111 | static int init_fbinfo(struct fb_info *info) | |
1112 | { | |
1113 | struct mfb_info *mfbi = info->par; | |
1114 | ||
1115 | info->device = NULL; | |
1116 | info->var.activate = FB_ACTIVATE_NOW; | |
1117 | info->fbops = &fsl_diu_ops; | |
1118 | info->flags = FBINFO_FLAG_DEFAULT; | |
1119 | info->pseudo_palette = &mfbi->pseudo_palette; | |
1120 | ||
1121 | /* Allocate colormap */ | |
1122 | fb_alloc_cmap(&info->cmap, 16, 0); | |
1123 | return 0; | |
1124 | } | |
1125 | ||
05946bce | 1126 | static int __devinit install_fb(struct fb_info *info) |
9b53a9e2 YS |
1127 | { |
1128 | int rc; | |
1129 | struct mfb_info *mfbi = info->par; | |
1130 | const char *aoi_mode, *init_aoi_mode = "320x240"; | |
8b856f04 AG |
1131 | struct fb_videomode *db = fsl_diu_mode_db; |
1132 | unsigned int dbsize = ARRAY_SIZE(fsl_diu_mode_db); | |
1133 | int has_default_mode = 1; | |
9b53a9e2 YS |
1134 | |
1135 | if (init_fbinfo(info)) | |
1136 | return -EINVAL; | |
1137 | ||
8b856f04 AG |
1138 | if (mfbi->index == 0) { /* plane 0 */ |
1139 | if (mfbi->edid_data) { | |
1140 | /* Now build modedb from EDID */ | |
1141 | fb_edid_to_monspecs(mfbi->edid_data, &info->monspecs); | |
1142 | fb_videomode_to_modelist(info->monspecs.modedb, | |
1143 | info->monspecs.modedb_len, | |
1144 | &info->modelist); | |
1145 | db = info->monspecs.modedb; | |
1146 | dbsize = info->monspecs.modedb_len; | |
1147 | } | |
9b53a9e2 | 1148 | aoi_mode = fb_mode; |
8b856f04 | 1149 | } else { |
9b53a9e2 | 1150 | aoi_mode = init_aoi_mode; |
8b856f04 | 1151 | } |
63cf8df4 TT |
1152 | rc = fb_find_mode(&info->var, info, aoi_mode, db, dbsize, NULL, |
1153 | default_bpp); | |
154152ae | 1154 | if (!rc) { |
8b856f04 AG |
1155 | /* |
1156 | * For plane 0 we continue and look into | |
1157 | * driver's internal modedb. | |
1158 | */ | |
1159 | if (mfbi->index == 0 && mfbi->edid_data) | |
1160 | has_default_mode = 0; | |
1161 | else | |
1162 | return -EINVAL; | |
9b53a9e2 YS |
1163 | } |
1164 | ||
8b856f04 AG |
1165 | if (!has_default_mode) { |
1166 | rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db, | |
63cf8df4 TT |
1167 | ARRAY_SIZE(fsl_diu_mode_db), NULL, default_bpp); |
1168 | if (rc) | |
8b856f04 AG |
1169 | has_default_mode = 1; |
1170 | } | |
1171 | ||
1172 | /* Still not found, use preferred mode from database if any */ | |
1173 | if (!has_default_mode && info->monspecs.modedb) { | |
1174 | struct fb_monspecs *specs = &info->monspecs; | |
1175 | struct fb_videomode *modedb = &specs->modedb[0]; | |
1176 | ||
1177 | /* | |
1178 | * Get preferred timing. If not found, | |
1179 | * first mode in database will be used. | |
1180 | */ | |
1181 | if (specs->misc & FB_MISC_1ST_DETAIL) { | |
1182 | int i; | |
1183 | ||
1184 | for (i = 0; i < specs->modedb_len; i++) { | |
1185 | if (specs->modedb[i].flag & FB_MODE_IS_FIRST) { | |
1186 | modedb = &specs->modedb[i]; | |
1187 | break; | |
1188 | } | |
1189 | } | |
1190 | } | |
1191 | ||
1192 | info->var.bits_per_pixel = default_bpp; | |
1193 | fb_videomode_to_var(&info->var, modedb); | |
1194 | } | |
1195 | ||
9b53a9e2 YS |
1196 | if (mfbi->type == MFB_TYPE_OFF) |
1197 | mfbi->blank = FB_BLANK_NORMAL; | |
1198 | else | |
1199 | mfbi->blank = FB_BLANK_UNBLANK; | |
1200 | ||
1201 | if (fsl_diu_check_var(&info->var, info)) { | |
154152ae | 1202 | dev_err(info->dev, "fsl_diu_check_var failed\n"); |
9b53a9e2 YS |
1203 | fb_dealloc_cmap(&info->cmap); |
1204 | return -EINVAL; | |
1205 | } | |
1206 | ||
9b53a9e2 | 1207 | if (register_framebuffer(info) < 0) { |
154152ae | 1208 | dev_err(info->dev, "register_framebuffer failed\n"); |
9b53a9e2 YS |
1209 | unmap_video_memory(info); |
1210 | fb_dealloc_cmap(&info->cmap); | |
1211 | return -EINVAL; | |
1212 | } | |
1213 | ||
1214 | mfbi->registered = 1; | |
154152ae | 1215 | dev_info(info->dev, "%s registered successfully\n", mfbi->id); |
9b53a9e2 YS |
1216 | |
1217 | return 0; | |
1218 | } | |
1219 | ||
05946bce | 1220 | static void uninstall_fb(struct fb_info *info) |
9b53a9e2 YS |
1221 | { |
1222 | struct mfb_info *mfbi = info->par; | |
1223 | ||
1224 | if (!mfbi->registered) | |
1225 | return; | |
1226 | ||
8b856f04 AG |
1227 | if (mfbi->index == 0) |
1228 | kfree(mfbi->edid_data); | |
1229 | ||
9b53a9e2 YS |
1230 | unregister_framebuffer(info); |
1231 | unmap_video_memory(info); | |
1232 | if (&info->cmap) | |
1233 | fb_dealloc_cmap(&info->cmap); | |
1234 | ||
1235 | mfbi->registered = 0; | |
1236 | } | |
1237 | ||
1238 | static irqreturn_t fsl_diu_isr(int irq, void *dev_id) | |
1239 | { | |
1240 | struct diu *hw = dr.diu_reg; | |
1241 | unsigned int status = in_be32(&hw->int_status); | |
1242 | ||
1243 | if (status) { | |
1244 | /* This is the workaround for underrun */ | |
1245 | if (status & INT_UNDRUN) { | |
1246 | out_be32(&hw->diu_mode, 0); | |
9b53a9e2 YS |
1247 | udelay(1); |
1248 | out_be32(&hw->diu_mode, 1); | |
1249 | } | |
1250 | #if defined(CONFIG_NOT_COHERENT_CACHE) | |
1251 | else if (status & INT_VSYNC) { | |
1252 | unsigned int i; | |
4a85dc8b | 1253 | |
9b53a9e2 YS |
1254 | for (i = 0; i < coherence_data_size; |
1255 | i += d_cache_line_size) | |
1256 | __asm__ __volatile__ ( | |
1257 | "dcbz 0, %[input]" | |
1258 | ::[input]"r"(&coherence_data[i])); | |
1259 | } | |
1260 | #endif | |
1261 | return IRQ_HANDLED; | |
1262 | } | |
1263 | return IRQ_NONE; | |
1264 | } | |
1265 | ||
1266 | static int request_irq_local(int irq) | |
1267 | { | |
bada04fc | 1268 | u32 ints; |
9b53a9e2 YS |
1269 | struct diu *hw; |
1270 | int ret; | |
1271 | ||
1272 | hw = dr.diu_reg; | |
1273 | ||
1274 | /* Read to clear the status */ | |
bada04fc | 1275 | in_be32(&hw->int_status); |
9b53a9e2 | 1276 | |
05946bce | 1277 | ret = request_irq(irq, fsl_diu_isr, 0, "diu", NULL); |
154152ae | 1278 | if (!ret) { |
9b53a9e2 YS |
1279 | ints = INT_PARERR | INT_LS_BF_VS; |
1280 | #if !defined(CONFIG_NOT_COHERENT_CACHE) | |
1281 | ints |= INT_VSYNC; | |
1282 | #endif | |
4a85dc8b | 1283 | |
9b53a9e2 YS |
1284 | if (dr.mode == MFB_MODE2 || dr.mode == MFB_MODE3) |
1285 | ints |= INT_VSYNC_WB; | |
1286 | ||
1287 | /* Read to clear the status */ | |
bada04fc | 1288 | in_be32(&hw->int_status); |
9b53a9e2 YS |
1289 | out_be32(&hw->int_mask, ints); |
1290 | } | |
4a85dc8b | 1291 | |
9b53a9e2 YS |
1292 | return ret; |
1293 | } | |
1294 | ||
1295 | static void free_irq_local(int irq) | |
1296 | { | |
1297 | struct diu *hw = dr.diu_reg; | |
1298 | ||
1299 | /* Disable all LCDC interrupt */ | |
1300 | out_be32(&hw->int_mask, 0x1f); | |
1301 | ||
05946bce | 1302 | free_irq(irq, NULL); |
9b53a9e2 YS |
1303 | } |
1304 | ||
1305 | #ifdef CONFIG_PM | |
1306 | /* | |
1307 | * Power management hooks. Note that we won't be called from IRQ context, | |
1308 | * unlike the blank functions above, so we may sleep. | |
1309 | */ | |
2dc11581 | 1310 | static int fsl_diu_suspend(struct platform_device *ofdev, pm_message_t state) |
9b53a9e2 YS |
1311 | { |
1312 | struct fsl_diu_data *machine_data; | |
1313 | ||
48948a3e | 1314 | machine_data = dev_get_drvdata(&ofdev->dev); |
9b53a9e2 YS |
1315 | disable_lcdc(machine_data->fsl_diu_info[0]); |
1316 | ||
1317 | return 0; | |
1318 | } | |
1319 | ||
2dc11581 | 1320 | static int fsl_diu_resume(struct platform_device *ofdev) |
9b53a9e2 YS |
1321 | { |
1322 | struct fsl_diu_data *machine_data; | |
1323 | ||
48948a3e | 1324 | machine_data = dev_get_drvdata(&ofdev->dev); |
9b53a9e2 YS |
1325 | enable_lcdc(machine_data->fsl_diu_info[0]); |
1326 | ||
1327 | return 0; | |
1328 | } | |
1329 | ||
1330 | #else | |
1331 | #define fsl_diu_suspend NULL | |
1332 | #define fsl_diu_resume NULL | |
1333 | #endif /* CONFIG_PM */ | |
1334 | ||
1335 | /* Align to 64-bit(8-byte), 32-byte, etc. */ | |
f3791889 AV |
1336 | static int allocate_buf(struct device *dev, struct diu_addr *buf, u32 size, |
1337 | u32 bytes_align) | |
9b53a9e2 | 1338 | { |
bada04fc TT |
1339 | u32 offset; |
1340 | dma_addr_t mask; | |
9b53a9e2 | 1341 | |
bada04fc TT |
1342 | buf->vaddr = |
1343 | dma_alloc_coherent(dev, size + bytes_align, &buf->paddr, | |
1344 | GFP_DMA | __GFP_ZERO); | |
9b53a9e2 YS |
1345 | if (!buf->vaddr) |
1346 | return -ENOMEM; | |
1347 | ||
9b53a9e2 | 1348 | mask = bytes_align - 1; |
bada04fc | 1349 | offset = buf->paddr & mask; |
9b53a9e2 YS |
1350 | if (offset) { |
1351 | buf->offset = bytes_align - offset; | |
bada04fc | 1352 | buf->paddr = buf->paddr + offset; |
9b53a9e2 YS |
1353 | } else |
1354 | buf->offset = 0; | |
4a85dc8b | 1355 | |
9b53a9e2 YS |
1356 | return 0; |
1357 | } | |
1358 | ||
f3791889 AV |
1359 | static void free_buf(struct device *dev, struct diu_addr *buf, u32 size, |
1360 | u32 bytes_align) | |
9b53a9e2 | 1361 | { |
4a85dc8b TT |
1362 | dma_free_coherent(dev, size + bytes_align, buf->vaddr, |
1363 | buf->paddr - buf->offset); | |
9b53a9e2 YS |
1364 | } |
1365 | ||
1366 | static ssize_t store_monitor(struct device *device, | |
1367 | struct device_attribute *attr, const char *buf, size_t count) | |
1368 | { | |
7653aaab | 1369 | enum fsl_diu_monitor_port old_monitor_port; |
9b53a9e2 YS |
1370 | struct fsl_diu_data *machine_data = |
1371 | container_of(attr, struct fsl_diu_data, dev_attr); | |
1372 | ||
9b53a9e2 | 1373 | old_monitor_port = machine_data->monitor_port; |
7653aaab | 1374 | machine_data->monitor_port = fsl_diu_name_to_port(buf); |
9b53a9e2 YS |
1375 | |
1376 | if (old_monitor_port != machine_data->monitor_port) { | |
1377 | /* All AOIs need adjust pixel format | |
1378 | * fsl_diu_set_par only change the pixsel format here | |
1379 | * unlikely to fail. */ | |
1380 | fsl_diu_set_par(machine_data->fsl_diu_info[0]); | |
1381 | fsl_diu_set_par(machine_data->fsl_diu_info[1]); | |
1382 | fsl_diu_set_par(machine_data->fsl_diu_info[2]); | |
1383 | fsl_diu_set_par(machine_data->fsl_diu_info[3]); | |
1384 | fsl_diu_set_par(machine_data->fsl_diu_info[4]); | |
1385 | } | |
1386 | return count; | |
1387 | } | |
1388 | ||
1389 | static ssize_t show_monitor(struct device *device, | |
1390 | struct device_attribute *attr, char *buf) | |
1391 | { | |
1392 | struct fsl_diu_data *machine_data = | |
1393 | container_of(attr, struct fsl_diu_data, dev_attr); | |
7653aaab TT |
1394 | |
1395 | switch (machine_data->monitor_port) { | |
1396 | case FSL_DIU_PORT_DVI: | |
1397 | return sprintf(buf, "DVI\n"); | |
1398 | case FSL_DIU_PORT_LVDS: | |
1399 | return sprintf(buf, "Single-link LVDS\n"); | |
1400 | case FSL_DIU_PORT_DLVDS: | |
1401 | return sprintf(buf, "Dual-link LVDS\n"); | |
1402 | } | |
1403 | ||
1404 | return 0; | |
9b53a9e2 YS |
1405 | } |
1406 | ||
9e52ba61 | 1407 | static int __devinit fsl_diu_probe(struct platform_device *pdev) |
9b53a9e2 | 1408 | { |
9e52ba61 | 1409 | struct device_node *np = pdev->dev.of_node; |
9b53a9e2 | 1410 | struct mfb_info *mfbi; |
89f08e3e | 1411 | phys_addr_t dummy_ad_addr = 0; |
9b53a9e2 | 1412 | int ret, i, error = 0; |
9b53a9e2 | 1413 | struct fsl_diu_data *machine_data; |
4b5006ec | 1414 | int diu_mode; |
9b53a9e2 YS |
1415 | |
1416 | machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL); | |
1417 | if (!machine_data) | |
1418 | return -ENOMEM; | |
1419 | ||
1420 | for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) { | |
1421 | machine_data->fsl_diu_info[i] = | |
9e52ba61 | 1422 | framebuffer_alloc(sizeof(struct mfb_info), &pdev->dev); |
9b53a9e2 | 1423 | if (!machine_data->fsl_diu_info[i]) { |
9e52ba61 | 1424 | dev_err(&pdev->dev, "cannot allocate memory\n"); |
9b53a9e2 YS |
1425 | ret = -ENOMEM; |
1426 | goto error2; | |
1427 | } | |
1428 | mfbi = machine_data->fsl_diu_info[i]->par; | |
1429 | memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info)); | |
1430 | mfbi->parent = machine_data; | |
8b856f04 AG |
1431 | |
1432 | if (mfbi->index == 0) { | |
1433 | const u8 *prop; | |
1434 | int len; | |
1435 | ||
1436 | /* Get EDID */ | |
1437 | prop = of_get_property(np, "edid", &len); | |
1438 | if (prop && len == EDID_LENGTH) | |
1439 | mfbi->edid_data = kmemdup(prop, EDID_LENGTH, | |
1440 | GFP_KERNEL); | |
1441 | } | |
9b53a9e2 YS |
1442 | } |
1443 | ||
9e52ba61 | 1444 | dr.diu_reg = of_iomap(np, 0); |
9b53a9e2 | 1445 | if (!dr.diu_reg) { |
9e52ba61 | 1446 | dev_err(&pdev->dev, "cannot map DIU registers\n"); |
9b53a9e2 YS |
1447 | ret = -EFAULT; |
1448 | goto error2; | |
1449 | } | |
1450 | ||
4b5006ec AG |
1451 | diu_mode = in_be32(&dr.diu_reg->diu_mode); |
1452 | if (diu_mode != MFB_MODE1) | |
1453 | out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU */ | |
9b53a9e2 YS |
1454 | |
1455 | /* Get the IRQ of the DIU */ | |
1456 | machine_data->irq = irq_of_parse_and_map(np, 0); | |
1457 | ||
1458 | if (!machine_data->irq) { | |
9e52ba61 | 1459 | dev_err(&pdev->dev, "could not get DIU IRQ\n"); |
9b53a9e2 YS |
1460 | ret = -EINVAL; |
1461 | goto error; | |
1462 | } | |
1463 | machine_data->monitor_port = monitor_port; | |
1464 | ||
1465 | /* Area descriptor memory pool aligns to 64-bit boundary */ | |
9e52ba61 | 1466 | if (allocate_buf(&pdev->dev, &pool.ad, |
f3791889 | 1467 | sizeof(struct diu_ad) * FSL_AOI_NUM, 8)) |
9b53a9e2 YS |
1468 | return -ENOMEM; |
1469 | ||
1470 | /* Get memory for Gamma Table - 32-byte aligned memory */ | |
9e52ba61 | 1471 | if (allocate_buf(&pdev->dev, &pool.gamma, 768, 32)) { |
9b53a9e2 YS |
1472 | ret = -ENOMEM; |
1473 | goto error; | |
1474 | } | |
1475 | ||
1476 | /* For performance, cursor bitmap buffer aligns to 32-byte boundary */ | |
9e52ba61 | 1477 | if (allocate_buf(&pdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2, |
f3791889 | 1478 | 32)) { |
9b53a9e2 YS |
1479 | ret = -ENOMEM; |
1480 | goto error; | |
1481 | } | |
1482 | ||
1483 | i = ARRAY_SIZE(machine_data->fsl_diu_info); | |
1484 | machine_data->dummy_ad = (struct diu_ad *) | |
1485 | ((u32)pool.ad.vaddr + pool.ad.offset) + i; | |
1486 | machine_data->dummy_ad->paddr = pool.ad.paddr + | |
1487 | i * sizeof(struct diu_ad); | |
1488 | machine_data->dummy_aoi_virt = fsl_diu_alloc(64, &dummy_ad_addr); | |
1489 | if (!machine_data->dummy_aoi_virt) { | |
1490 | ret = -ENOMEM; | |
1491 | goto error; | |
1492 | } | |
1493 | machine_data->dummy_ad->addr = cpu_to_le32(dummy_ad_addr); | |
1494 | machine_data->dummy_ad->pix_fmt = 0x88882317; | |
1495 | machine_data->dummy_ad->src_size_g_alpha = cpu_to_le32((4 << 12) | 4); | |
1496 | machine_data->dummy_ad->aoi_size = cpu_to_le32((4 << 16) | 2); | |
1497 | machine_data->dummy_ad->offset_xyi = 0; | |
1498 | machine_data->dummy_ad->offset_xyd = 0; | |
1499 | machine_data->dummy_ad->next_ad = 0; | |
1500 | ||
4b5006ec AG |
1501 | /* |
1502 | * Let DIU display splash screen if it was pre-initialized | |
1503 | * by the bootloader, set dummy area descriptor otherwise. | |
1504 | */ | |
1505 | if (diu_mode != MFB_MODE1) | |
1506 | out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr); | |
1507 | ||
9b53a9e2 YS |
1508 | out_be32(&dr.diu_reg->desc[1], machine_data->dummy_ad->paddr); |
1509 | out_be32(&dr.diu_reg->desc[2], machine_data->dummy_ad->paddr); | |
1510 | ||
1511 | for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) { | |
1512 | machine_data->fsl_diu_info[i]->fix.smem_start = 0; | |
1513 | mfbi = machine_data->fsl_diu_info[i]->par; | |
1514 | mfbi->ad = (struct diu_ad *)((u32)pool.ad.vaddr | |
1515 | + pool.ad.offset) + i; | |
1516 | mfbi->ad->paddr = pool.ad.paddr + i * sizeof(struct diu_ad); | |
1517 | ret = install_fb(machine_data->fsl_diu_info[i]); | |
1518 | if (ret) { | |
9e52ba61 | 1519 | dev_err(&pdev->dev, "could not register fb %d\n", i); |
9b53a9e2 YS |
1520 | goto error; |
1521 | } | |
1522 | } | |
1523 | ||
1524 | if (request_irq_local(machine_data->irq)) { | |
9e52ba61 | 1525 | dev_err(&pdev->dev, "could not claim irq\n"); |
9b53a9e2 YS |
1526 | goto error; |
1527 | } | |
1528 | ||
12765517 | 1529 | sysfs_attr_init(&machine_data->dev_attr.attr); |
9b53a9e2 YS |
1530 | machine_data->dev_attr.attr.name = "monitor"; |
1531 | machine_data->dev_attr.attr.mode = S_IRUGO|S_IWUSR; | |
1532 | machine_data->dev_attr.show = show_monitor; | |
1533 | machine_data->dev_attr.store = store_monitor; | |
1534 | error = device_create_file(machine_data->fsl_diu_info[0]->dev, | |
1535 | &machine_data->dev_attr); | |
1536 | if (error) { | |
9e52ba61 | 1537 | dev_err(&pdev->dev, "could not create sysfs file %s\n", |
9b53a9e2 YS |
1538 | machine_data->dev_attr.attr.name); |
1539 | } | |
1540 | ||
9e52ba61 | 1541 | dev_set_drvdata(&pdev->dev, machine_data); |
9b53a9e2 YS |
1542 | return 0; |
1543 | ||
1544 | error: | |
1545 | for (i = ARRAY_SIZE(machine_data->fsl_diu_info); | |
1546 | i > 0; i--) | |
1547 | uninstall_fb(machine_data->fsl_diu_info[i - 1]); | |
1548 | if (pool.ad.vaddr) | |
9e52ba61 | 1549 | free_buf(&pdev->dev, &pool.ad, |
f3791889 | 1550 | sizeof(struct diu_ad) * FSL_AOI_NUM, 8); |
9b53a9e2 | 1551 | if (pool.gamma.vaddr) |
9e52ba61 | 1552 | free_buf(&pdev->dev, &pool.gamma, 768, 32); |
9b53a9e2 | 1553 | if (pool.cursor.vaddr) |
9e52ba61 | 1554 | free_buf(&pdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2, |
f3791889 | 1555 | 32); |
9b53a9e2 YS |
1556 | if (machine_data->dummy_aoi_virt) |
1557 | fsl_diu_free(machine_data->dummy_aoi_virt, 64); | |
1558 | iounmap(dr.diu_reg); | |
1559 | ||
1560 | error2: | |
1561 | for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) | |
1562 | if (machine_data->fsl_diu_info[i]) | |
1563 | framebuffer_release(machine_data->fsl_diu_info[i]); | |
1564 | kfree(machine_data); | |
1565 | ||
1566 | return ret; | |
1567 | } | |
1568 | ||
9e52ba61 | 1569 | static int fsl_diu_remove(struct platform_device *pdev) |
9b53a9e2 YS |
1570 | { |
1571 | struct fsl_diu_data *machine_data; | |
1572 | int i; | |
1573 | ||
9e52ba61 | 1574 | machine_data = dev_get_drvdata(&pdev->dev); |
9b53a9e2 YS |
1575 | disable_lcdc(machine_data->fsl_diu_info[0]); |
1576 | free_irq_local(machine_data->irq); | |
1577 | for (i = ARRAY_SIZE(machine_data->fsl_diu_info); i > 0; i--) | |
1578 | uninstall_fb(machine_data->fsl_diu_info[i - 1]); | |
1579 | if (pool.ad.vaddr) | |
9e52ba61 | 1580 | free_buf(&pdev->dev, &pool.ad, |
f3791889 | 1581 | sizeof(struct diu_ad) * FSL_AOI_NUM, 8); |
9b53a9e2 | 1582 | if (pool.gamma.vaddr) |
9e52ba61 | 1583 | free_buf(&pdev->dev, &pool.gamma, 768, 32); |
9b53a9e2 | 1584 | if (pool.cursor.vaddr) |
9e52ba61 | 1585 | free_buf(&pdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2, 32); |
9b53a9e2 YS |
1586 | if (machine_data->dummy_aoi_virt) |
1587 | fsl_diu_free(machine_data->dummy_aoi_virt, 64); | |
1588 | iounmap(dr.diu_reg); | |
1589 | for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) | |
1590 | if (machine_data->fsl_diu_info[i]) | |
1591 | framebuffer_release(machine_data->fsl_diu_info[i]); | |
1592 | kfree(machine_data); | |
1593 | ||
1594 | return 0; | |
1595 | } | |
1596 | ||
1597 | #ifndef MODULE | |
1598 | static int __init fsl_diu_setup(char *options) | |
1599 | { | |
1600 | char *opt; | |
1601 | unsigned long val; | |
1602 | ||
1603 | if (!options || !*options) | |
1604 | return 0; | |
1605 | ||
1606 | while ((opt = strsep(&options, ",")) != NULL) { | |
1607 | if (!*opt) | |
1608 | continue; | |
1609 | if (!strncmp(opt, "monitor=", 8)) { | |
7653aaab | 1610 | monitor_port = fsl_diu_name_to_port(opt + 8); |
9b53a9e2 YS |
1611 | } else if (!strncmp(opt, "bpp=", 4)) { |
1612 | if (!strict_strtoul(opt + 4, 10, &val)) | |
1613 | default_bpp = val; | |
1614 | } else | |
1615 | fb_mode = opt; | |
1616 | } | |
1617 | ||
1618 | return 0; | |
1619 | } | |
1620 | #endif | |
1621 | ||
1622 | static struct of_device_id fsl_diu_match[] = { | |
d24720a4 AG |
1623 | #ifdef CONFIG_PPC_MPC512x |
1624 | { | |
1625 | .compatible = "fsl,mpc5121-diu", | |
1626 | }, | |
1627 | #endif | |
9b53a9e2 YS |
1628 | { |
1629 | .compatible = "fsl,diu", | |
1630 | }, | |
1631 | {} | |
1632 | }; | |
1633 | MODULE_DEVICE_TABLE(of, fsl_diu_match); | |
1634 | ||
28541d0f | 1635 | static struct platform_driver fsl_diu_driver = { |
4018294b GL |
1636 | .driver = { |
1637 | .name = "fsl_diu", | |
1638 | .owner = THIS_MODULE, | |
1639 | .of_match_table = fsl_diu_match, | |
1640 | }, | |
9b53a9e2 YS |
1641 | .probe = fsl_diu_probe, |
1642 | .remove = fsl_diu_remove, | |
1643 | .suspend = fsl_diu_suspend, | |
1644 | .resume = fsl_diu_resume, | |
1645 | }; | |
1646 | ||
1647 | static int __init fsl_diu_init(void) | |
1648 | { | |
1649 | #ifdef CONFIG_NOT_COHERENT_CACHE | |
1650 | struct device_node *np; | |
1651 | const u32 *prop; | |
1652 | #endif | |
1653 | int ret; | |
1654 | #ifndef MODULE | |
1655 | char *option; | |
1656 | ||
1657 | /* | |
1658 | * For kernel boot options (in 'video=xxxfb:<options>' format) | |
1659 | */ | |
1660 | if (fb_get_options("fslfb", &option)) | |
1661 | return -ENODEV; | |
1662 | fsl_diu_setup(option); | |
7653aaab TT |
1663 | #else |
1664 | monitor_port = fsl_diu_name_to_port(monitor_string); | |
9b53a9e2 | 1665 | #endif |
154152ae | 1666 | pr_info("Freescale Display Interface Unit (DIU) framebuffer driver\n"); |
9b53a9e2 YS |
1667 | |
1668 | #ifdef CONFIG_NOT_COHERENT_CACHE | |
1669 | np = of_find_node_by_type(NULL, "cpu"); | |
1670 | if (!np) { | |
154152ae | 1671 | pr_err("fsl-diu-fb: can't find 'cpu' device node\n"); |
9b53a9e2 YS |
1672 | return -ENODEV; |
1673 | } | |
1674 | ||
1675 | prop = of_get_property(np, "d-cache-size", NULL); | |
5394ba0f | 1676 | if (prop == NULL) { |
154152ae TT |
1677 | pr_err("fsl-diu-fb: missing 'd-cache-size' property' " |
1678 | "in 'cpu' node\n"); | |
5394ba0f | 1679 | of_node_put(np); |
9b53a9e2 | 1680 | return -ENODEV; |
5394ba0f | 1681 | } |
9b53a9e2 | 1682 | |
4a85dc8b TT |
1683 | /* |
1684 | * Freescale PLRU requires 13/8 times the cache size to do a proper | |
1685 | * displacement flush | |
9b53a9e2 | 1686 | */ |
9e52ba61 | 1687 | coherence_data_size = be32_to_cpup(prop) * 13; |
9b53a9e2 YS |
1688 | coherence_data_size /= 8; |
1689 | ||
1690 | prop = of_get_property(np, "d-cache-line-size", NULL); | |
5394ba0f | 1691 | if (prop == NULL) { |
154152ae TT |
1692 | pr_err("fsl-diu-fb: missing 'd-cache-line-size' property' " |
1693 | "in 'cpu' node\n"); | |
5394ba0f | 1694 | of_node_put(np); |
9b53a9e2 | 1695 | return -ENODEV; |
5394ba0f | 1696 | } |
9e52ba61 | 1697 | d_cache_line_size = be32_to_cpup(prop); |
9b53a9e2 YS |
1698 | |
1699 | of_node_put(np); | |
1700 | coherence_data = vmalloc(coherence_data_size); | |
1701 | if (!coherence_data) | |
1702 | return -ENOMEM; | |
1703 | #endif | |
4a85dc8b | 1704 | |
28541d0f | 1705 | ret = platform_driver_register(&fsl_diu_driver); |
9b53a9e2 | 1706 | if (ret) { |
154152ae | 1707 | pr_err("fsl-diu-fb: failed to register platform driver\n"); |
9b53a9e2 YS |
1708 | #if defined(CONFIG_NOT_COHERENT_CACHE) |
1709 | vfree(coherence_data); | |
1710 | #endif | |
1711 | iounmap(dr.diu_reg); | |
1712 | } | |
1713 | return ret; | |
1714 | } | |
1715 | ||
1716 | static void __exit fsl_diu_exit(void) | |
1717 | { | |
28541d0f | 1718 | platform_driver_unregister(&fsl_diu_driver); |
9b53a9e2 YS |
1719 | #if defined(CONFIG_NOT_COHERENT_CACHE) |
1720 | vfree(coherence_data); | |
1721 | #endif | |
1722 | } | |
1723 | ||
1724 | module_init(fsl_diu_init); | |
1725 | module_exit(fsl_diu_exit); | |
1726 | ||
1727 | MODULE_AUTHOR("York Sun <yorksun@freescale.com>"); | |
1728 | MODULE_DESCRIPTION("Freescale DIU framebuffer driver"); | |
1729 | MODULE_LICENSE("GPL"); | |
1730 | ||
1731 | module_param_named(mode, fb_mode, charp, 0); | |
1732 | MODULE_PARM_DESC(mode, | |
1733 | "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" "); | |
1734 | module_param_named(bpp, default_bpp, ulong, 0); | |
154152ae | 1735 | MODULE_PARM_DESC(bpp, "Specify bit-per-pixel if not specified in 'mode'"); |
7653aaab TT |
1736 | module_param_named(monitor, monitor_string, charp, 0); |
1737 | MODULE_PARM_DESC(monitor, "Specify the monitor port " | |
1738 | "(\"dvi\", \"lvds\", or \"dlvds\") if supported by the platform"); | |
9b53a9e2 | 1739 |