Commit | Line | Data |
---|---|---|
9c92ab61 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
d6ff7d0f AC |
2 | /* |
3 | * linux/drivers/video/vt8500lcdfb.c | |
4 | * | |
5 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | |
6 | * | |
7 | * Based on skeletonfb.c and pxafb.c | |
d6ff7d0f AC |
8 | */ |
9 | ||
d6ff7d0f | 10 | #include <linux/delay.h> |
7ab0a484 TP |
11 | #include <linux/dma-mapping.h> |
12 | #include <linux/errno.h> | |
d6ff7d0f AC |
13 | #include <linux/fb.h> |
14 | #include <linux/init.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/io.h> | |
7ab0a484 TP |
17 | #include <linux/kernel.h> |
18 | #include <linux/mm.h> | |
19 | #include <linux/module.h> | |
d6ff7d0f | 20 | #include <linux/platform_device.h> |
7ab0a484 TP |
21 | #include <linux/slab.h> |
22 | #include <linux/string.h> | |
d6ff7d0f | 23 | #include <linux/wait.h> |
7ab0a484 | 24 | #include <video/of_display_timing.h> |
d6ff7d0f | 25 | |
d6ff7d0f AC |
26 | #include "vt8500lcdfb.h" |
27 | #include "wmt_ge_rops.h" | |
28 | ||
e7b99537 TP |
29 | #ifdef CONFIG_OF |
30 | #include <linux/of.h> | |
31 | #include <linux/of_fdt.h> | |
32 | #include <linux/memblock.h> | |
33 | #endif | |
34 | ||
35 | ||
d6ff7d0f AC |
36 | #define to_vt8500lcd_info(__info) container_of(__info, \ |
37 | struct vt8500lcd_info, fb) | |
38 | ||
39 | static int vt8500lcd_set_par(struct fb_info *info) | |
40 | { | |
41 | struct vt8500lcd_info *fbi = to_vt8500lcd_info(info); | |
42 | int reg_bpp = 5; /* 16bpp */ | |
43 | int i; | |
44 | unsigned long control0; | |
45 | ||
46 | if (!fbi) | |
47 | return -EINVAL; | |
48 | ||
49 | if (info->var.bits_per_pixel <= 8) { | |
50 | /* palettized */ | |
51 | info->var.red.offset = 0; | |
52 | info->var.red.length = info->var.bits_per_pixel; | |
53 | info->var.red.msb_right = 0; | |
54 | ||
55 | info->var.green.offset = 0; | |
56 | info->var.green.length = info->var.bits_per_pixel; | |
57 | info->var.green.msb_right = 0; | |
58 | ||
59 | info->var.blue.offset = 0; | |
60 | info->var.blue.length = info->var.bits_per_pixel; | |
61 | info->var.blue.msb_right = 0; | |
62 | ||
63 | info->var.transp.offset = 0; | |
64 | info->var.transp.length = 0; | |
65 | info->var.transp.msb_right = 0; | |
66 | ||
67 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; | |
68 | info->fix.line_length = info->var.xres_virtual / | |
69 | (8/info->var.bits_per_pixel); | |
70 | } else { | |
71 | /* non-palettized */ | |
72 | info->var.transp.offset = 0; | |
73 | info->var.transp.length = 0; | |
74 | info->var.transp.msb_right = 0; | |
75 | ||
76 | if (info->var.bits_per_pixel == 16) { | |
77 | /* RGB565 */ | |
78 | info->var.red.offset = 11; | |
79 | info->var.red.length = 5; | |
80 | info->var.red.msb_right = 0; | |
81 | info->var.green.offset = 5; | |
82 | info->var.green.length = 6; | |
83 | info->var.green.msb_right = 0; | |
84 | info->var.blue.offset = 0; | |
85 | info->var.blue.length = 5; | |
86 | info->var.blue.msb_right = 0; | |
87 | } else { | |
88 | /* Equal depths per channel */ | |
89 | info->var.red.offset = info->var.bits_per_pixel | |
90 | * 2 / 3; | |
91 | info->var.red.length = info->var.bits_per_pixel / 3; | |
92 | info->var.red.msb_right = 0; | |
93 | info->var.green.offset = info->var.bits_per_pixel / 3; | |
94 | info->var.green.length = info->var.bits_per_pixel / 3; | |
95 | info->var.green.msb_right = 0; | |
96 | info->var.blue.offset = 0; | |
97 | info->var.blue.length = info->var.bits_per_pixel / 3; | |
98 | info->var.blue.msb_right = 0; | |
99 | } | |
100 | ||
101 | info->fix.visual = FB_VISUAL_TRUECOLOR; | |
102 | info->fix.line_length = info->var.bits_per_pixel > 16 ? | |
103 | info->var.xres_virtual << 2 : | |
104 | info->var.xres_virtual << 1; | |
105 | } | |
106 | ||
107 | for (i = 0; i < 8; i++) { | |
0fc50517 | 108 | if (bpp_values[i] == info->var.bits_per_pixel) |
d6ff7d0f | 109 | reg_bpp = i; |
d6ff7d0f AC |
110 | } |
111 | ||
112 | control0 = readl(fbi->regbase) & ~0xf; | |
113 | writel(0, fbi->regbase); | |
114 | while (readl(fbi->regbase + 0x38) & 0x10) | |
115 | /* wait */; | |
116 | writel((((info->var.hsync_len - 1) & 0x3f) << 26) | |
117 | | ((info->var.left_margin & 0xff) << 18) | |
118 | | (((info->var.xres - 1) & 0x3ff) << 8) | |
119 | | (info->var.right_margin & 0xff), fbi->regbase + 0x4); | |
120 | writel((((info->var.vsync_len - 1) & 0x3f) << 26) | |
121 | | ((info->var.upper_margin & 0xff) << 18) | |
122 | | (((info->var.yres - 1) & 0x3ff) << 8) | |
123 | | (info->var.lower_margin & 0xff), fbi->regbase + 0x8); | |
124 | writel((((info->var.yres - 1) & 0x400) << 2) | |
125 | | ((info->var.xres - 1) & 0x400), fbi->regbase + 0x10); | |
126 | writel(0x80000000, fbi->regbase + 0x20); | |
127 | writel(control0 | (reg_bpp << 1) | 0x100, fbi->regbase); | |
128 | ||
129 | return 0; | |
130 | } | |
131 | ||
132 | static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) | |
133 | { | |
134 | chan &= 0xffff; | |
135 | chan >>= 16 - bf->length; | |
136 | return chan << bf->offset; | |
137 | } | |
138 | ||
139 | static int vt8500lcd_setcolreg(unsigned regno, unsigned red, unsigned green, | |
140 | unsigned blue, unsigned transp, | |
141 | struct fb_info *info) { | |
142 | struct vt8500lcd_info *fbi = to_vt8500lcd_info(info); | |
143 | int ret = 1; | |
144 | unsigned int val; | |
145 | if (regno >= 256) | |
146 | return -EINVAL; | |
147 | ||
148 | if (info->var.grayscale) | |
149 | red = green = blue = | |
150 | (19595 * red + 38470 * green + 7471 * blue) >> 16; | |
151 | ||
152 | switch (fbi->fb.fix.visual) { | |
153 | case FB_VISUAL_TRUECOLOR: | |
154 | if (regno < 16) { | |
155 | u32 *pal = fbi->fb.pseudo_palette; | |
156 | ||
157 | val = chan_to_field(red, &fbi->fb.var.red); | |
158 | val |= chan_to_field(green, &fbi->fb.var.green); | |
159 | val |= chan_to_field(blue, &fbi->fb.var.blue); | |
160 | ||
161 | pal[regno] = val; | |
162 | ret = 0; | |
163 | } | |
164 | break; | |
165 | ||
166 | case FB_VISUAL_STATIC_PSEUDOCOLOR: | |
167 | case FB_VISUAL_PSEUDOCOLOR: | |
168 | writew((red & 0xf800) | |
169 | | ((green >> 5) & 0x7e0) | |
170 | | ((blue >> 11) & 0x1f), | |
171 | fbi->palette_cpu + sizeof(u16) * regno); | |
172 | break; | |
173 | } | |
174 | ||
175 | return ret; | |
176 | } | |
177 | ||
178 | static int vt8500lcd_ioctl(struct fb_info *info, unsigned int cmd, | |
179 | unsigned long arg) | |
180 | { | |
181 | int ret = 0; | |
182 | struct vt8500lcd_info *fbi = to_vt8500lcd_info(info); | |
183 | ||
184 | if (cmd == FBIO_WAITFORVSYNC) { | |
185 | /* Unmask End of Frame interrupt */ | |
186 | writel(0xffffffff ^ (1 << 3), fbi->regbase + 0x3c); | |
187 | ret = wait_event_interruptible_timeout(fbi->wait, | |
188 | readl(fbi->regbase + 0x38) & (1 << 3), HZ / 10); | |
189 | /* Mask back to reduce unwanted interrupt traffic */ | |
190 | writel(0xffffffff, fbi->regbase + 0x3c); | |
191 | if (ret < 0) | |
192 | return ret; | |
193 | if (ret == 0) | |
194 | return -ETIMEDOUT; | |
195 | } | |
196 | ||
197 | return ret; | |
198 | } | |
199 | ||
200 | static int vt8500lcd_pan_display(struct fb_var_screeninfo *var, | |
201 | struct fb_info *info) | |
202 | { | |
203 | unsigned pixlen = info->fix.line_length / info->var.xres_virtual; | |
204 | unsigned off = pixlen * var->xoffset | |
205 | + info->fix.line_length * var->yoffset; | |
206 | struct vt8500lcd_info *fbi = to_vt8500lcd_info(info); | |
207 | ||
208 | writel((1 << 31) | |
8f0246d6 LP |
209 | | (((info->var.xres_virtual - info->var.xres) * pixlen / 4) << 20) |
210 | | (off >> 2), fbi->regbase + 0x20); | |
d6ff7d0f AC |
211 | return 0; |
212 | } | |
213 | ||
e41f1a98 AC |
214 | /* |
215 | * vt8500lcd_blank(): | |
216 | * Blank the display by setting all palette values to zero. Note, | |
217 | * True Color modes do not really use the palette, so this will not | |
218 | * blank the display in all modes. | |
219 | */ | |
220 | static int vt8500lcd_blank(int blank, struct fb_info *info) | |
221 | { | |
222 | int i; | |
223 | ||
224 | switch (blank) { | |
225 | case FB_BLANK_POWERDOWN: | |
226 | case FB_BLANK_VSYNC_SUSPEND: | |
227 | case FB_BLANK_HSYNC_SUSPEND: | |
228 | case FB_BLANK_NORMAL: | |
229 | if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR || | |
230 | info->fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR) | |
231 | for (i = 0; i < 256; i++) | |
232 | vt8500lcd_setcolreg(i, 0, 0, 0, 0, info); | |
1c49f35e | 233 | fallthrough; |
e41f1a98 AC |
234 | case FB_BLANK_UNBLANK: |
235 | if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR || | |
236 | info->fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR) | |
237 | fb_set_cmap(&info->cmap, info); | |
238 | } | |
239 | return 0; | |
240 | } | |
241 | ||
8a48ac33 | 242 | static const struct fb_ops vt8500lcd_ops = { |
d6ff7d0f | 243 | .owner = THIS_MODULE, |
63a11ada | 244 | __FB_DEFAULT_DMAMEM_OPS_RDWR, |
d6ff7d0f AC |
245 | .fb_set_par = vt8500lcd_set_par, |
246 | .fb_setcolreg = vt8500lcd_setcolreg, | |
247 | .fb_fillrect = wmt_ge_fillrect, | |
248 | .fb_copyarea = wmt_ge_copyarea, | |
249 | .fb_imageblit = sys_imageblit, | |
250 | .fb_sync = wmt_ge_sync, | |
251 | .fb_ioctl = vt8500lcd_ioctl, | |
252 | .fb_pan_display = vt8500lcd_pan_display, | |
e41f1a98 | 253 | .fb_blank = vt8500lcd_blank, |
63a11ada | 254 | // .fb_mmap needs DMA mmap |
d6ff7d0f AC |
255 | }; |
256 | ||
257 | static irqreturn_t vt8500lcd_handle_irq(int irq, void *dev_id) | |
258 | { | |
259 | struct vt8500lcd_info *fbi = dev_id; | |
260 | ||
261 | if (readl(fbi->regbase + 0x38) & (1 << 3)) | |
262 | wake_up_interruptible(&fbi->wait); | |
263 | ||
264 | writel(0xffffffff, fbi->regbase + 0x38); | |
265 | return IRQ_HANDLED; | |
266 | } | |
267 | ||
48c68c4f | 268 | static int vt8500lcd_probe(struct platform_device *pdev) |
d6ff7d0f AC |
269 | { |
270 | struct vt8500lcd_info *fbi; | |
271 | struct resource *res; | |
7ab0a484 | 272 | struct display_timings *disp_timing; |
d6ff7d0f AC |
273 | void *addr; |
274 | int irq, ret; | |
275 | ||
e7b99537 | 276 | struct fb_videomode of_mode; |
e7b99537 TP |
277 | u32 bpp; |
278 | dma_addr_t fb_mem_phys; | |
279 | unsigned long fb_mem_len; | |
280 | void *fb_mem_virt; | |
281 | ||
d6ff7d0f AC |
282 | ret = -ENOMEM; |
283 | fbi = NULL; | |
284 | ||
e7b99537 TP |
285 | fbi = devm_kzalloc(&pdev->dev, sizeof(struct vt8500lcd_info) |
286 | + sizeof(u32) * 16, GFP_KERNEL); | |
d33a7ee9 | 287 | if (!fbi) |
46ac2956 | 288 | return -ENOMEM; |
d6ff7d0f AC |
289 | |
290 | strcpy(fbi->fb.fix.id, "VT8500 LCD"); | |
291 | ||
292 | fbi->fb.fix.type = FB_TYPE_PACKED_PIXELS; | |
293 | fbi->fb.fix.xpanstep = 0; | |
294 | fbi->fb.fix.ypanstep = 1; | |
295 | fbi->fb.fix.ywrapstep = 0; | |
296 | fbi->fb.fix.accel = FB_ACCEL_NONE; | |
297 | ||
298 | fbi->fb.var.nonstd = 0; | |
299 | fbi->fb.var.activate = FB_ACTIVATE_NOW; | |
300 | fbi->fb.var.height = -1; | |
301 | fbi->fb.var.width = -1; | |
302 | fbi->fb.var.vmode = FB_VMODE_NONINTERLACED; | |
303 | ||
304 | fbi->fb.fbops = &vt8500lcd_ops; | |
a0331a4b | 305 | fbi->fb.flags = FBINFO_HWACCEL_COPYAREA |
d6ff7d0f AC |
306 | | FBINFO_HWACCEL_FILLRECT |
307 | | FBINFO_HWACCEL_YPAN | |
308 | | FBINFO_VIRTFB | |
309 | | FBINFO_PARTIAL_PAN_OK; | |
310 | fbi->fb.node = -1; | |
311 | ||
312 | addr = fbi; | |
313 | addr = addr + sizeof(struct vt8500lcd_info); | |
314 | fbi->fb.pseudo_palette = addr; | |
315 | ||
316 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
317 | if (res == NULL) { | |
318 | dev_err(&pdev->dev, "no I/O memory resource defined\n"); | |
46ac2956 | 319 | return -ENODEV; |
d6ff7d0f AC |
320 | } |
321 | ||
322 | res = request_mem_region(res->start, resource_size(res), "vt8500lcd"); | |
323 | if (res == NULL) { | |
324 | dev_err(&pdev->dev, "failed to request I/O memory\n"); | |
46ac2956 | 325 | return -EBUSY; |
d6ff7d0f AC |
326 | } |
327 | ||
328 | fbi->regbase = ioremap(res->start, resource_size(res)); | |
329 | if (fbi->regbase == NULL) { | |
330 | dev_err(&pdev->dev, "failed to map I/O memory\n"); | |
331 | ret = -EBUSY; | |
332 | goto failed_free_res; | |
333 | } | |
334 | ||
7ab0a484 | 335 | disp_timing = of_get_display_timings(pdev->dev.of_node); |
46ac2956 DC |
336 | if (!disp_timing) { |
337 | ret = -EINVAL; | |
338 | goto failed_free_io; | |
339 | } | |
e7b99537 | 340 | |
7ab0a484 TP |
341 | ret = of_get_fb_videomode(pdev->dev.of_node, &of_mode, |
342 | OF_USE_NATIVE_MODE); | |
343 | if (ret) | |
46ac2956 | 344 | goto failed_free_io; |
7ab0a484 TP |
345 | |
346 | ret = of_property_read_u32(pdev->dev.of_node, "bits-per-pixel", &bpp); | |
347 | if (ret) | |
46ac2956 | 348 | goto failed_free_io; |
e7b99537 TP |
349 | |
350 | /* try allocating the framebuffer */ | |
351 | fb_mem_len = of_mode.xres * of_mode.yres * 2 * (bpp / 8); | |
352 | fb_mem_virt = dma_alloc_coherent(&pdev->dev, fb_mem_len, &fb_mem_phys, | |
353 | GFP_KERNEL); | |
354 | if (!fb_mem_virt) { | |
355 | pr_err("%s: Failed to allocate framebuffer\n", __func__); | |
46ac2956 DC |
356 | ret = -ENOMEM; |
357 | goto failed_free_io; | |
cf6ac4ce | 358 | } |
e7b99537 TP |
359 | |
360 | fbi->fb.fix.smem_start = fb_mem_phys; | |
361 | fbi->fb.fix.smem_len = fb_mem_len; | |
63a11ada | 362 | fbi->fb.screen_buffer = fb_mem_virt; |
d6ff7d0f AC |
363 | |
364 | fbi->palette_size = PAGE_ALIGN(512); | |
365 | fbi->palette_cpu = dma_alloc_coherent(&pdev->dev, | |
366 | fbi->palette_size, | |
367 | &fbi->palette_phys, | |
368 | GFP_KERNEL); | |
369 | if (fbi->palette_cpu == NULL) { | |
370 | dev_err(&pdev->dev, "Failed to allocate palette buffer\n"); | |
371 | ret = -ENOMEM; | |
372 | goto failed_free_io; | |
373 | } | |
374 | ||
375 | irq = platform_get_irq(pdev, 0); | |
376 | if (irq < 0) { | |
d6ff7d0f AC |
377 | ret = -ENODEV; |
378 | goto failed_free_palette; | |
379 | } | |
380 | ||
f8798ccb | 381 | ret = request_irq(irq, vt8500lcd_handle_irq, 0, "LCD", fbi); |
d6ff7d0f AC |
382 | if (ret) { |
383 | dev_err(&pdev->dev, "request_irq failed: %d\n", ret); | |
384 | ret = -EBUSY; | |
385 | goto failed_free_palette; | |
386 | } | |
387 | ||
388 | init_waitqueue_head(&fbi->wait); | |
389 | ||
390 | if (fb_alloc_cmap(&fbi->fb.cmap, 256, 0) < 0) { | |
391 | dev_err(&pdev->dev, "Failed to allocate color map\n"); | |
392 | ret = -ENOMEM; | |
393 | goto failed_free_irq; | |
394 | } | |
395 | ||
e7b99537 TP |
396 | fb_videomode_to_var(&fbi->fb.var, &of_mode); |
397 | ||
398 | fbi->fb.var.xres_virtual = of_mode.xres; | |
399 | fbi->fb.var.yres_virtual = of_mode.yres * 2; | |
400 | fbi->fb.var.bits_per_pixel = bpp; | |
d6ff7d0f AC |
401 | |
402 | ret = vt8500lcd_set_par(&fbi->fb); | |
403 | if (ret) { | |
404 | dev_err(&pdev->dev, "Failed to set parameters\n"); | |
405 | goto failed_free_cmap; | |
406 | } | |
407 | ||
408 | writel(fbi->fb.fix.smem_start >> 22, fbi->regbase + 0x1c); | |
409 | writel((fbi->palette_phys & 0xfffffe00) | 1, fbi->regbase + 0x18); | |
410 | ||
411 | platform_set_drvdata(pdev, fbi); | |
412 | ||
413 | ret = register_framebuffer(&fbi->fb); | |
414 | if (ret < 0) { | |
415 | dev_err(&pdev->dev, | |
416 | "Failed to register framebuffer device: %d\n", ret); | |
417 | goto failed_free_cmap; | |
418 | } | |
419 | ||
420 | /* | |
421 | * Ok, now enable the LCD controller | |
422 | */ | |
423 | writel(readl(fbi->regbase) | 1, fbi->regbase); | |
424 | ||
425 | return 0; | |
426 | ||
427 | failed_free_cmap: | |
428 | if (fbi->fb.cmap.len) | |
429 | fb_dealloc_cmap(&fbi->fb.cmap); | |
430 | failed_free_irq: | |
431 | free_irq(irq, fbi); | |
432 | failed_free_palette: | |
433 | dma_free_coherent(&pdev->dev, fbi->palette_size, | |
434 | fbi->palette_cpu, fbi->palette_phys); | |
435 | failed_free_io: | |
436 | iounmap(fbi->regbase); | |
437 | failed_free_res: | |
438 | release_mem_region(res->start, resource_size(res)); | |
d6ff7d0f AC |
439 | return ret; |
440 | } | |
441 | ||
3ab20cdc | 442 | static void vt8500lcd_remove(struct platform_device *pdev) |
d6ff7d0f AC |
443 | { |
444 | struct vt8500lcd_info *fbi = platform_get_drvdata(pdev); | |
445 | struct resource *res; | |
446 | int irq; | |
447 | ||
448 | unregister_framebuffer(&fbi->fb); | |
449 | ||
450 | writel(0, fbi->regbase); | |
451 | ||
452 | if (fbi->fb.cmap.len) | |
453 | fb_dealloc_cmap(&fbi->fb.cmap); | |
454 | ||
455 | irq = platform_get_irq(pdev, 0); | |
456 | free_irq(irq, fbi); | |
457 | ||
458 | dma_free_coherent(&pdev->dev, fbi->palette_size, | |
459 | fbi->palette_cpu, fbi->palette_phys); | |
460 | ||
461 | iounmap(fbi->regbase); | |
462 | ||
463 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
464 | release_mem_region(res->start, resource_size(res)); | |
d6ff7d0f AC |
465 | } |
466 | ||
e7b99537 TP |
467 | static const struct of_device_id via_dt_ids[] = { |
468 | { .compatible = "via,vt8500-fb", }, | |
469 | {} | |
470 | }; | |
471 | ||
d6ff7d0f AC |
472 | static struct platform_driver vt8500lcd_driver = { |
473 | .probe = vt8500lcd_probe, | |
3ab20cdc | 474 | .remove_new = vt8500lcd_remove, |
d6ff7d0f | 475 | .driver = { |
d6ff7d0f | 476 | .name = "vt8500-lcd", |
e7b99537 | 477 | .of_match_table = of_match_ptr(via_dt_ids), |
d6ff7d0f AC |
478 | }, |
479 | }; | |
480 | ||
4277f2c4 | 481 | module_platform_driver(vt8500lcd_driver); |
d6ff7d0f AC |
482 | |
483 | MODULE_AUTHOR("Alexey Charkov <alchark@gmail.com>"); | |
484 | MODULE_DESCRIPTION("LCD controller driver for VIA VT8500"); | |
e7b99537 TP |
485 | MODULE_LICENSE("GPL v2"); |
486 | MODULE_DEVICE_TABLE(of, via_dt_ids); |