Merge tag 'ubifs-for-linus-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-2.6-block.git] / drivers / video / fbdev / ps3fb.c
CommitLineData
310d8c11
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1/*
2 * linux/drivers/video/ps3fb.c -- PS3 GPU frame buffer device
3 *
4 * Copyright (C) 2006 Sony Computer Entertainment Inc.
5 * Copyright 2006, 2007 Sony Corporation
6 *
7 * This file is based on :
8 *
9 * linux/drivers/video/vfb.c -- Virtual frame buffer device
10 *
11 * Copyright (C) 2002 James Simmons
12 *
13 * Copyright (C) 1997 Geert Uytterhoeven
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file COPYING in the main directory of this archive for
17 * more details.
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/errno.h>
23#include <linux/string.h>
24#include <linux/mm.h>
310d8c11 25#include <linux/interrupt.h>
310d8c11
GU
26#include <linux/console.h>
27#include <linux/ioctl.h>
1c0c8461
GU
28#include <linux/kthread.h>
29#include <linux/freezer.h>
84902b7a 30#include <linux/uaccess.h>
310d8c11 31#include <linux/fb.h>
d88ca7e1 32#include <linux/fbcon.h>
310d8c11 33#include <linux/init.h>
310d8c11 34
9413c883 35#include <asm/cell-regs.h>
310d8c11
GU
36#include <asm/lv1call.h>
37#include <asm/ps3av.h>
38#include <asm/ps3fb.h>
39#include <asm/ps3.h>
d3352c9f 40#include <asm/ps3gpu.h>
310d8c11 41
9e6b99bd
GU
42
43#define DEVICE_NAME "ps3fb"
44
9ac67a35
GU
45#define GPU_CMD_BUF_SIZE (2 * 1024 * 1024)
46#define GPU_FB_START (64 * 1024)
310d8c11 47#define GPU_IOIF (0x0d000000UL)
7bfc3c84 48#define GPU_ALIGN_UP(x) ALIGN((x), 64)
61e0b28e 49#define GPU_MAX_LINE_LENGTH (65536 - 64)
310d8c11 50
310d8c11
GU
51#define GPU_INTR_STATUS_VSYNC_0 0 /* vsync on head A */
52#define GPU_INTR_STATUS_VSYNC_1 1 /* vsync on head B */
53#define GPU_INTR_STATUS_FLIP_0 3 /* flip head A */
54#define GPU_INTR_STATUS_FLIP_1 4 /* flip head B */
55#define GPU_INTR_STATUS_QUEUE_0 5 /* queue head A */
56#define GPU_INTR_STATUS_QUEUE_1 6 /* queue head B */
57
58#define GPU_DRIVER_INFO_VERSION 0x211
59
60/* gpu internals */
61struct display_head {
62 u64 be_time_stamp;
63 u32 status;
64 u32 offset;
65 u32 res1;
66 u32 res2;
67 u32 field;
68 u32 reserved1;
69
70 u64 res3;
71 u32 raster;
72
73 u64 vblank_count;
74 u32 field_vsync;
75 u32 reserved2;
76};
77
78struct gpu_irq {
79 u32 irq_outlet;
80 u32 status;
81 u32 mask;
82 u32 video_cause;
83 u32 graph_cause;
84 u32 user_cause;
85
86 u32 res1;
87 u64 res2;
88
89 u32 reserved[4];
90};
91
92struct gpu_driver_info {
93 u32 version_driver;
94 u32 version_gpu;
95 u32 memory_size;
96 u32 hardware_channel;
97
98 u32 nvcore_frequency;
99 u32 memory_frequency;
100
101 u32 reserved[1063];
102 struct display_head display_head[8];
103 struct gpu_irq irq;
104};
105
106struct ps3fb_priv {
107 unsigned int irq_no;
310d8c11
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108
109 u64 context_handle, memory_handle;
310d8c11 110 struct gpu_driver_info *dinfo;
310d8c11
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111
112 u64 vblank_count; /* frame count */
113 wait_queue_head_t wait_vsync;
114
310d8c11
GU
115 atomic_t ext_flip; /* on/off flip with vsync */
116 atomic_t f_count; /* fb_open count */
117 int is_blanked;
1c0c8461
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118 int is_kicked;
119 struct task_struct *task;
310d8c11
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120};
121static struct ps3fb_priv ps3fb;
122
0333d835
GU
123struct ps3fb_par {
124 u32 pseudo_palette[16];
125 int mode_id, new_mode_id;
0333d835 126 unsigned int num_frames; /* num of frame buffers */
f1664ed8
GU
127 unsigned int width;
128 unsigned int height;
9f4f21b4
GU
129 unsigned int ddr_line_length;
130 unsigned int ddr_frame_size;
131 unsigned int xdr_frame_size;
7974f72a
GU
132 unsigned int full_offset; /* start of fullscreen DDR fb */
133 unsigned int fb_offset; /* start of actual DDR fb */
134 unsigned int pan_offset;
0333d835
GU
135};
136
310d8c11 137
34c422fb
GU
138#define FIRST_NATIVE_MODE_INDEX 10
139
310d8c11
GU
140static const struct fb_videomode ps3fb_modedb[] = {
141 /* 60 Hz broadcast modes (modes "1" to "5") */
142 {
143 /* 480i */
144 "480i", 60, 576, 384, 74074, 130, 89, 78, 57, 63, 6,
145 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
146 }, {
147 /* 480p */
148 "480p", 60, 576, 384, 37037, 130, 89, 78, 57, 63, 6,
149 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
150 }, {
151 /* 720p */
152 "720p", 60, 1124, 644, 13481, 298, 148, 57, 44, 80, 5,
153 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
154 }, {
155 /* 1080i */
156 "1080i", 60, 1688, 964, 13481, 264, 160, 94, 62, 88, 5,
157 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
158 }, {
159 /* 1080p */
160 "1080p", 60, 1688, 964, 6741, 264, 160, 94, 62, 88, 5,
161 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
162 },
163
164 /* 50 Hz broadcast modes (modes "6" to "10") */
165 {
166 /* 576i */
167 "576i", 50, 576, 460, 74074, 142, 83, 97, 63, 63, 5,
168 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
169 }, {
170 /* 576p */
171 "576p", 50, 576, 460, 37037, 142, 83, 97, 63, 63, 5,
172 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
173 }, {
174 /* 720p */
175 "720p", 50, 1124, 644, 13468, 298, 478, 57, 44, 80, 5,
176 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
177 }, {
a782eed6 178 /* 1080i */
310d8c11
GU
179 "1080i", 50, 1688, 964, 13468, 264, 600, 94, 62, 88, 5,
180 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
181 }, {
182 /* 1080p */
183 "1080p", 50, 1688, 964, 6734, 264, 600, 94, 62, 88, 5,
184 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
185 },
186
34c422fb 187 [FIRST_NATIVE_MODE_INDEX] =
310d8c11
GU
188 /* 60 Hz broadcast modes (full resolution versions of modes "1" to "5") */
189 {
190 /* 480if */
191 "480if", 60, 720, 480, 74074, 58, 17, 30, 9, 63, 6,
192 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
193 }, {
194 /* 480pf */
195 "480pf", 60, 720, 480, 37037, 58, 17, 30, 9, 63, 6,
196 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
197 }, {
198 /* 720pf */
199 "720pf", 60, 1280, 720, 13481, 220, 70, 19, 6, 80, 5,
200 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
201 }, {
202 /* 1080if */
203 "1080if", 60, 1920, 1080, 13481, 148, 44, 36, 4, 88, 5,
204 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
205 }, {
206 /* 1080pf */
207 "1080pf", 60, 1920, 1080, 6741, 148, 44, 36, 4, 88, 5,
208 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
209 },
210
211 /* 50 Hz broadcast modes (full resolution versions of modes "6" to "10") */
212 {
213 /* 576if */
214 "576if", 50, 720, 576, 74074, 70, 11, 39, 5, 63, 5,
215 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
216 }, {
217 /* 576pf */
218 "576pf", 50, 720, 576, 37037, 70, 11, 39, 5, 63, 5,
219 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
220 }, {
221 /* 720pf */
222 "720pf", 50, 1280, 720, 13468, 220, 400, 19, 6, 80, 5,
223 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
224 }, {
225 /* 1080if */
a782eed6 226 "1080if", 50, 1920, 1080, 13468, 148, 484, 36, 4, 88, 5,
310d8c11
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227 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
228 }, {
229 /* 1080pf */
230 "1080pf", 50, 1920, 1080, 6734, 148, 484, 36, 4, 88, 5,
231 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
34c422fb
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232 },
233
234 /* VESA modes (modes "11" to "13") */
235 {
236 /* WXGA */
237 "wxga", 60, 1280, 768, 12924, 160, 24, 29, 3, 136, 6,
238 0, FB_VMODE_NONINTERLACED,
239 FB_MODE_IS_VESA
240 }, {
241 /* SXGA */
242 "sxga", 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3,
243 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED,
244 FB_MODE_IS_VESA
245 }, {
246 /* WUXGA */
247 "wuxga", 60, 1920, 1200, 6494, 80, 48, 26, 3, 32, 6,
248 FB_SYNC_HOR_HIGH_ACT, FB_VMODE_NONINTERLACED,
249 FB_MODE_IS_VESA
310d8c11
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250 }
251};
252
253
254#define HEAD_A
255#define HEAD_B
256
2ce32e15
GU
257#define BPP 4 /* number of bytes per pixel */
258
310d8c11 259
bd685ac8 260static int ps3fb_mode;
9e6b99bd 261module_param(ps3fb_mode, int, 0);
310d8c11 262
48c68c4f 263static char *mode_option;
310d8c11 264
633bd111
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265static int ps3fb_cmp_mode(const struct fb_videomode *vmode,
266 const struct fb_var_screeninfo *var)
267{
a3665366
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268 long xres, yres, left_margin, right_margin, upper_margin, lower_margin;
269 long dx, dy;
270
271 /* maximum values */
272 if (var->xres > vmode->xres || var->yres > vmode->yres ||
273 var->pixclock > vmode->pixclock ||
274 var->hsync_len > vmode->hsync_len ||
275 var->vsync_len > vmode->vsync_len)
633bd111
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276 return -1;
277
a3665366
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278 /* progressive/interlaced must match */
279 if ((var->vmode & FB_VMODE_MASK) != vmode->vmode)
633bd111
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280 return -1;
281
a3665366
GU
282 /* minimum resolution */
283 xres = max(var->xres, 1U);
284 yres = max(var->yres, 1U);
285
286 /* minimum margins */
287 left_margin = max(var->left_margin, vmode->left_margin);
288 right_margin = max(var->right_margin, vmode->right_margin);
289 upper_margin = max(var->upper_margin, vmode->upper_margin);
290 lower_margin = max(var->lower_margin, vmode->lower_margin);
291
292 /* resolution + margins may not exceed native parameters */
293 dx = ((long)vmode->left_margin + (long)vmode->xres +
294 (long)vmode->right_margin) -
295 (left_margin + xres + right_margin);
296 if (dx < 0)
633bd111
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297 return -1;
298
a3665366
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299 dy = ((long)vmode->upper_margin + (long)vmode->yres +
300 (long)vmode->lower_margin) -
301 (upper_margin + yres + lower_margin);
302 if (dy < 0)
303 return -1;
304
305 /* exact match */
306 if (!dx && !dy)
307 return 0;
308
309 /* resolution difference */
310 return (vmode->xres - xres) * (vmode->yres - yres);
633bd111
GU
311}
312
34c422fb
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313static const struct fb_videomode *ps3fb_native_vmode(enum ps3av_mode_num id)
314{
315 return &ps3fb_modedb[FIRST_NATIVE_MODE_INDEX + id - 1];
316}
317
318static const struct fb_videomode *ps3fb_vmode(int id)
319{
320 u32 mode = id & PS3AV_MODE_MASK;
321
322 if (mode < PS3AV_MODE_480I || mode > PS3AV_MODE_WUXGA)
323 return NULL;
324
325 if (mode <= PS3AV_MODE_1080P50 && !(id & PS3AV_MODE_FULL)) {
326 /* Non-fullscreen broadcast mode */
327 return &ps3fb_modedb[mode - 1];
328 }
329
330 return ps3fb_native_vmode(mode);
331}
332
633bd111 333static unsigned int ps3fb_find_mode(struct fb_var_screeninfo *var,
61e0b28e 334 u32 *ddr_line_length, u32 *xdr_line_length)
310d8c11 335{
a3665366
GU
336 unsigned int id, best_id;
337 int diff, best_diff;
34c422fb 338 const struct fb_videomode *vmode;
a3665366 339 long gap;
633bd111 340
a3665366
GU
341 best_id = 0;
342 best_diff = INT_MAX;
343 pr_debug("%s: wanted %u [%u] %u x %u [%u] %u\n", __func__,
344 var->left_margin, var->xres, var->right_margin,
345 var->upper_margin, var->yres, var->lower_margin);
34c422fb
GU
346 for (id = PS3AV_MODE_480I; id <= PS3AV_MODE_WUXGA; id++) {
347 vmode = ps3fb_native_vmode(id);
a3665366
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348 diff = ps3fb_cmp_mode(vmode, var);
349 pr_debug("%s: mode %u: %u [%u] %u x %u [%u] %u: diff = %d\n",
350 __func__, id, vmode->left_margin, vmode->xres,
351 vmode->right_margin, vmode->upper_margin,
352 vmode->yres, vmode->lower_margin, diff);
353 if (diff < 0)
354 continue;
355 if (diff < best_diff) {
356 best_id = id;
357 if (!diff)
358 break;
359 best_diff = diff;
360 }
34c422fb 361 }
310d8c11 362
a3665366
GU
363 if (!best_id) {
364 pr_debug("%s: no suitable mode found\n", __func__);
365 return 0;
366 }
367
368 id = best_id;
369 vmode = ps3fb_native_vmode(id);
61e0b28e 370
34c422fb 371 *ddr_line_length = vmode->xres * BPP;
633bd111 372
a3665366
GU
373 /* minimum resolution */
374 if (!var->xres)
633bd111 375 var->xres = 1;
a3665366 376 if (!var->yres)
633bd111 377 var->yres = 1;
a3665366
GU
378
379 /* minimum virtual resolution */
380 if (var->xres_virtual < var->xres)
381 var->xres_virtual = var->xres;
382 if (var->yres_virtual < var->yres)
383 var->yres_virtual = var->yres;
384
385 /* minimum margins */
386 if (var->left_margin < vmode->left_margin)
387 var->left_margin = vmode->left_margin;
388 if (var->right_margin < vmode->right_margin)
389 var->right_margin = vmode->right_margin;
390 if (var->upper_margin < vmode->upper_margin)
391 var->upper_margin = vmode->upper_margin;
392 if (var->lower_margin < vmode->lower_margin)
393 var->lower_margin = vmode->lower_margin;
394
395 /* extra margins */
396 gap = ((long)vmode->left_margin + (long)vmode->xres +
397 (long)vmode->right_margin) -
398 ((long)var->left_margin + (long)var->xres +
399 (long)var->right_margin);
400 if (gap > 0) {
401 var->left_margin += gap/2;
402 var->right_margin += (gap+1)/2;
403 pr_debug("%s: rounded up H to %u [%u] %u\n", __func__,
404 var->left_margin, var->xres, var->right_margin);
405 }
406
407 gap = ((long)vmode->upper_margin + (long)vmode->yres +
408 (long)vmode->lower_margin) -
409 ((long)var->upper_margin + (long)var->yres +
410 (long)var->lower_margin);
411 if (gap > 0) {
412 var->upper_margin += gap/2;
413 var->lower_margin += (gap+1)/2;
414 pr_debug("%s: rounded up V to %u [%u] %u\n", __func__,
415 var->upper_margin, var->yres, var->lower_margin);
633bd111 416 }
61e0b28e 417
a3665366
GU
418 /* fixed fields */
419 var->pixclock = vmode->pixclock;
420 var->hsync_len = vmode->hsync_len;
421 var->vsync_len = vmode->vsync_len;
422 var->sync = vmode->sync;
423
61e0b28e 424 if (ps3_compare_firmware_version(1, 9, 0) >= 0) {
a3665366 425 *xdr_line_length = GPU_ALIGN_UP(var->xres_virtual * BPP);
61e0b28e
GU
426 if (*xdr_line_length > GPU_MAX_LINE_LENGTH)
427 *xdr_line_length = GPU_MAX_LINE_LENGTH;
428 } else
429 *xdr_line_length = *ddr_line_length;
430
34c422fb 431 if (vmode->sync & FB_SYNC_BROADCAST) {
633bd111 432 /* Full broadcast modes have the full mode bit set */
34c422fb
GU
433 if (vmode->xres == var->xres && vmode->yres == var->yres)
434 id |= PS3AV_MODE_FULL;
310d8c11
GU
435 }
436
34c422fb
GU
437 pr_debug("%s: mode %u\n", __func__, id);
438 return id;
310d8c11
GU
439}
440
f1664ed8
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441static void ps3fb_sync_image(struct device *dev, u64 frame_offset,
442 u64 dst_offset, u64 src_offset, u32 width,
61e0b28e
GU
443 u32 height, u32 dst_line_length,
444 u32 src_line_length)
310d8c11 445{
f1664ed8 446 int status;
61e0b28e
GU
447 u64 line_length;
448
449 line_length = dst_line_length;
450 if (src_line_length != dst_line_length)
451 line_length |= (u64)src_line_length << 32;
310d8c11 452
9ac67a35 453 src_offset += GPU_FB_START;
9b82f3e6
GU
454
455 mutex_lock(&ps3_gpu_mutex);
d3352c9f
GU
456 status = lv1_gpu_fb_blit(ps3fb.context_handle, dst_offset,
457 GPU_IOIF + src_offset,
458 L1GPU_FB_BLIT_WAIT_FOR_COMPLETION |
459 (width << 16) | height,
460 line_length);
9b82f3e6
GU
461 mutex_unlock(&ps3_gpu_mutex);
462
310d8c11 463 if (status)
d3352c9f
GU
464 dev_err(dev, "%s: lv1_gpu_fb_blit failed: %d\n", __func__,
465 status);
310d8c11 466#ifdef HEAD_A
d3352c9f 467 status = lv1_gpu_display_flip(ps3fb.context_handle, 0, frame_offset);
310d8c11 468 if (status)
d3352c9f
GU
469 dev_err(dev, "%s: lv1_gpu_display_flip failed: %d\n", __func__,
470 status);
310d8c11
GU
471#endif
472#ifdef HEAD_B
d3352c9f 473 status = lv1_gpu_display_flip(ps3fb.context_handle, 1, frame_offset);
310d8c11 474 if (status)
d3352c9f
GU
475 dev_err(dev, "%s: lv1_gpu_display_flip failed: %d\n", __func__,
476 status);
310d8c11 477#endif
f1664ed8
GU
478}
479
480static int ps3fb_sync(struct fb_info *info, u32 frame)
481{
482 struct ps3fb_par *par = info->par;
9f4f21b4 483 int error = 0;
61e0b28e 484 u64 ddr_base, xdr_base;
f1664ed8 485
f1664ed8
GU
486 if (frame > par->num_frames - 1) {
487 dev_dbg(info->device, "%s: invalid frame number (%u)\n",
488 __func__, frame);
489 error = -EINVAL;
490 goto out;
491 }
492
9f4f21b4
GU
493 xdr_base = frame * par->xdr_frame_size;
494 ddr_base = frame * par->ddr_frame_size;
f1664ed8 495
61e0b28e
GU
496 ps3fb_sync_image(info->device, ddr_base + par->full_offset,
497 ddr_base + par->fb_offset, xdr_base + par->pan_offset,
9f4f21b4
GU
498 par->width, par->height, par->ddr_line_length,
499 info->fix.line_length);
0333d835
GU
500
501out:
0333d835 502 return error;
310d8c11
GU
503}
504
310d8c11
GU
505static int ps3fb_open(struct fb_info *info, int user)
506{
507 atomic_inc(&ps3fb.f_count);
508 return 0;
509}
510
511static int ps3fb_release(struct fb_info *info, int user)
512{
513 if (atomic_dec_and_test(&ps3fb.f_count)) {
514 if (atomic_read(&ps3fb.ext_flip)) {
515 atomic_set(&ps3fb.ext_flip, 0);
ac751efa 516 if (console_trylock()) {
8dab6376 517 ps3fb_sync(info, 0); /* single buffer */
ac751efa 518 console_unlock();
8dab6376 519 }
310d8c11
GU
520 }
521 }
522 return 0;
523}
524
525 /*
526 * Setting the video mode has been split into two parts.
527 * First part, xxxfb_check_var, must not write anything
528 * to hardware, it should only verify and adjust var.
529 * This means it doesn't alter par but it does use hardware
530 * data from it to check this var.
531 */
532
533static int ps3fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
534{
61e0b28e 535 u32 xdr_line_length, ddr_line_length;
310d8c11 536 int mode;
310d8c11 537
61e0b28e 538 mode = ps3fb_find_mode(var, &ddr_line_length, &xdr_line_length);
310d8c11
GU
539 if (!mode)
540 return -EINVAL;
541
fc7028b7 542 /* Virtual screen */
61e0b28e 543 if (var->xres_virtual > xdr_line_length / BPP) {
535da7ff 544 dev_dbg(info->device,
fc7028b7 545 "Horizontal virtual screen size too large\n");
310d8c11
GU
546 return -EINVAL;
547 }
548
fc7028b7
GU
549 if (var->xoffset + var->xres > var->xres_virtual ||
550 var->yoffset + var->yres > var->yres_virtual) {
551 dev_dbg(info->device, "panning out-of-range\n");
552 return -EINVAL;
553 }
310d8c11
GU
554
555 /* We support ARGB8888 only */
556 if (var->bits_per_pixel > 32 || var->grayscale ||
557 var->red.offset > 16 || var->green.offset > 8 ||
558 var->blue.offset > 0 || var->transp.offset > 24 ||
559 var->red.length > 8 || var->green.length > 8 ||
560 var->blue.length > 8 || var->transp.length > 8 ||
561 var->red.msb_right || var->green.msb_right ||
562 var->blue.msb_right || var->transp.msb_right || var->nonstd) {
535da7ff 563 dev_dbg(info->device, "We support ARGB8888 only\n");
310d8c11
GU
564 return -EINVAL;
565 }
566
567 var->bits_per_pixel = 32;
568 var->red.offset = 16;
569 var->green.offset = 8;
570 var->blue.offset = 0;
571 var->transp.offset = 24;
572 var->red.length = 8;
573 var->green.length = 8;
574 var->blue.length = 8;
575 var->transp.length = 8;
576 var->red.msb_right = 0;
577 var->green.msb_right = 0;
578 var->blue.msb_right = 0;
579 var->transp.msb_right = 0;
580
581 /* Rotation is not supported */
582 if (var->rotate) {
535da7ff 583 dev_dbg(info->device, "Rotation is not supported\n");
310d8c11
GU
584 return -EINVAL;
585 }
586
587 /* Memory limit */
a286408c 588 if (var->yres_virtual * xdr_line_length > info->fix.smem_len) {
535da7ff 589 dev_dbg(info->device, "Not enough memory\n");
310d8c11
GU
590 return -ENOMEM;
591 }
592
593 var->height = -1;
594 var->width = -1;
595
596 return 0;
597}
598
599 /*
600 * This routine actually sets the video mode.
601 */
602
603static int ps3fb_set_par(struct fb_info *info)
604{
0333d835 605 struct ps3fb_par *par = info->par;
61e0b28e 606 unsigned int mode, ddr_line_length, xdr_line_length, lines, maxlines;
7974f72a 607 unsigned int ddr_xoff, ddr_yoff, offset;
9f4f21b4 608 const struct fb_videomode *vmode;
61e0b28e 609 u64 dst;
310d8c11 610
61e0b28e 611 mode = ps3fb_find_mode(&info->var, &ddr_line_length, &xdr_line_length);
310d8c11
GU
612 if (!mode)
613 return -EINVAL;
614
34c422fb 615 vmode = ps3fb_native_vmode(mode & PS3AV_MODE_MASK);
c95344a5 616
fc7028b7
GU
617 info->fix.xpanstep = info->var.xres_virtual > info->var.xres ? 1 : 0;
618 info->fix.ypanstep = info->var.yres_virtual > info->var.yres ? 1 : 0;
61e0b28e 619 info->fix.line_length = xdr_line_length;
fc7028b7 620
9f4f21b4
GU
621 par->ddr_line_length = ddr_line_length;
622 par->ddr_frame_size = vmode->yres * ddr_line_length;
623 par->xdr_frame_size = info->var.yres_virtual * xdr_line_length;
624
a286408c 625 par->num_frames = info->fix.smem_len /
9f4f21b4 626 max(par->ddr_frame_size, par->xdr_frame_size);
310d8c11
GU
627
628 /* Keep the special bits we cannot set using fb_var_screeninfo */
0333d835 629 par->new_mode_id = (par->new_mode_id & ~PS3AV_MODE_MASK) | mode;
310d8c11 630
f1664ed8
GU
631 par->width = info->var.xres;
632 par->height = info->var.yres;
d9a4ba6a
GU
633
634 /* Start of the virtual frame buffer (relative to fullscreen) */
9f4f21b4
GU
635 ddr_xoff = info->var.left_margin - vmode->left_margin;
636 ddr_yoff = info->var.upper_margin - vmode->upper_margin;
637 offset = ddr_yoff * ddr_line_length + ddr_xoff * BPP;
d9a4ba6a 638
f1664ed8
GU
639 par->fb_offset = GPU_ALIGN_UP(offset);
640 par->full_offset = par->fb_offset - offset;
61e0b28e 641 par->pan_offset = info->var.yoffset * xdr_line_length +
fc7028b7 642 info->var.xoffset * BPP;
f1664ed8 643
0333d835
GU
644 if (par->new_mode_id != par->mode_id) {
645 if (ps3av_set_video_mode(par->new_mode_id)) {
646 par->new_mode_id = par->mode_id;
647 return -EINVAL;
648 }
649 par->mode_id = par->new_mode_id;
650 }
310d8c11 651
f1664ed8 652 /* Clear XDR frame buffer memory */
bdb61647 653 memset(info->screen_buffer, 0, info->fix.smem_len);
f1664ed8
GU
654
655 /* Clear DDR frame buffer memory */
9f4f21b4 656 lines = vmode->yres * par->num_frames;
f1664ed8
GU
657 if (par->full_offset)
658 lines++;
a286408c 659 maxlines = info->fix.smem_len / ddr_line_length;
61e0b28e 660 for (dst = 0; lines; dst += maxlines * ddr_line_length) {
f1664ed8 661 unsigned int l = min(lines, maxlines);
9f4f21b4 662 ps3fb_sync_image(info->device, 0, dst, 0, vmode->xres, l,
61e0b28e 663 ddr_line_length, ddr_line_length);
f1664ed8
GU
664 lines -= l;
665 }
666
310d8c11
GU
667 return 0;
668}
669
670 /*
671 * Set a single color register. The values supplied are already
672 * rounded down to the hardware's capabilities (according to the
673 * entries in the var structure). Return != 0 for invalid regno.
674 */
675
676static int ps3fb_setcolreg(unsigned int regno, unsigned int red,
677 unsigned int green, unsigned int blue,
678 unsigned int transp, struct fb_info *info)
679{
680 if (regno >= 16)
681 return 1;
682
683 red >>= 8;
684 green >>= 8;
685 blue >>= 8;
686 transp >>= 8;
687
688 ((u32 *)info->pseudo_palette)[regno] = transp << 24 | red << 16 |
689 green << 8 | blue;
690 return 0;
691}
692
fc7028b7
GU
693static int ps3fb_pan_display(struct fb_var_screeninfo *var,
694 struct fb_info *info)
695{
696 struct ps3fb_par *par = info->par;
697
698 par->pan_offset = var->yoffset * info->fix.line_length +
699 var->xoffset * BPP;
700 return 0;
701}
702
310d8c11
GU
703 /*
704 * As we have a virtual frame buffer, we need our own mmap function
705 */
706
707static int ps3fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
708{
11bd5933 709 int r;
310d8c11 710
11bd5933 711 r = vm_iomap_memory(vma, info->fix.smem_start, info->fix.smem_len);
310d8c11 712
535da7ff 713 dev_dbg(info->device, "ps3fb: mmap framebuffer P(%lx)->V(%lx)\n",
b358c6cf 714 info->fix.smem_start + (vma->vm_pgoff << PAGE_SHIFT),
11bd5933
TV
715 vma->vm_start);
716
717 return r;
310d8c11
GU
718}
719
720 /*
721 * Blank the display
722 */
723
724static int ps3fb_blank(int blank, struct fb_info *info)
725{
726 int retval;
727
535da7ff 728 dev_dbg(info->device, "%s: blank:%d\n", __func__, blank);
310d8c11
GU
729 switch (blank) {
730 case FB_BLANK_POWERDOWN:
731 case FB_BLANK_HSYNC_SUSPEND:
732 case FB_BLANK_VSYNC_SUSPEND:
733 case FB_BLANK_NORMAL:
734 retval = ps3av_video_mute(1); /* mute on */
735 if (!retval)
736 ps3fb.is_blanked = 1;
737 break;
738
739 default: /* unblank */
740 retval = ps3av_video_mute(0); /* mute off */
741 if (!retval)
742 ps3fb.is_blanked = 0;
743 break;
744 }
745 return retval;
746}
747
748static int ps3fb_get_vblank(struct fb_vblank *vblank)
749{
3cc2c177 750 memset(vblank, 0, sizeof(*vblank));
310d8c11
GU
751 vblank->flags = FB_VBLANK_HAVE_VSYNC;
752 return 0;
753}
754
15e4d001 755static int ps3fb_wait_for_vsync(u32 crtc)
310d8c11
GU
756{
757 int ret;
758 u64 count;
759
760 count = ps3fb.vblank_count;
761 ret = wait_event_interruptible_timeout(ps3fb.wait_vsync,
762 count != ps3fb.vblank_count,
763 HZ / 10);
764 if (!ret)
765 return -ETIMEDOUT;
766
767 return 0;
768}
769
310d8c11
GU
770
771 /*
772 * ioctl
773 */
774
775static int ps3fb_ioctl(struct fb_info *info, unsigned int cmd,
776 unsigned long arg)
777{
778 void __user *argp = (void __user *)arg;
0333d835 779 u32 val;
310d8c11
GU
780 int retval = -EFAULT;
781
782 switch (cmd) {
783 case FBIOGET_VBLANK:
784 {
785 struct fb_vblank vblank;
535da7ff 786 dev_dbg(info->device, "FBIOGET_VBLANK:\n");
310d8c11
GU
787 retval = ps3fb_get_vblank(&vblank);
788 if (retval)
789 break;
790
791 if (copy_to_user(argp, &vblank, sizeof(vblank)))
792 retval = -EFAULT;
793 break;
794 }
795
796 case FBIO_WAITFORVSYNC:
797 {
798 u32 crt;
535da7ff 799 dev_dbg(info->device, "FBIO_WAITFORVSYNC:\n");
310d8c11
GU
800 if (get_user(crt, (u32 __user *) arg))
801 break;
802
803 retval = ps3fb_wait_for_vsync(crt);
804 break;
805 }
806
807 case PS3FB_IOCTL_SETMODE:
808 {
0333d835 809 struct ps3fb_par *par = info->par;
34c422fb 810 const struct fb_videomode *vmode;
310d8c11
GU
811 struct fb_var_screeninfo var;
812
813 if (copy_from_user(&val, argp, sizeof(val)))
814 break;
815
64072901 816 if (!(val & PS3AV_MODE_MASK)) {
ce4c371a 817 u32 id = ps3av_get_auto_mode();
64072901
MK
818 if (id > 0)
819 val = (val & ~PS3AV_MODE_MASK) | id;
820 }
535da7ff 821 dev_dbg(info->device, "PS3FB_IOCTL_SETMODE:%x\n", val);
310d8c11 822 retval = -EINVAL;
34c422fb
GU
823 vmode = ps3fb_vmode(val);
824 if (vmode) {
310d8c11 825 var = info->var;
34c422fb 826 fb_videomode_to_var(&var, vmode);
ac751efa 827 console_lock();
310d8c11
GU
828 /* Force, in case only special bits changed */
829 var.activate |= FB_ACTIVATE_FORCE;
0333d835 830 par->new_mode_id = val;
310d8c11 831 retval = fb_set_var(info, &var);
d88ca7e1
TH
832 if (!retval)
833 fbcon_update_vcs(info, var.activate & FB_ACTIVATE_ALL);
ac751efa 834 console_unlock();
310d8c11 835 }
310d8c11
GU
836 break;
837 }
838
839 case PS3FB_IOCTL_GETMODE:
840 val = ps3av_get_mode();
535da7ff 841 dev_dbg(info->device, "PS3FB_IOCTL_GETMODE:%x\n", val);
310d8c11
GU
842 if (!copy_to_user(argp, &val, sizeof(val)))
843 retval = 0;
844 break;
845
846 case PS3FB_IOCTL_SCREENINFO:
847 {
0333d835 848 struct ps3fb_par *par = info->par;
310d8c11 849 struct ps3fb_ioctl_res res;
535da7ff 850 dev_dbg(info->device, "PS3FB_IOCTL_SCREENINFO:\n");
61e0b28e
GU
851 res.xres = info->fix.line_length / BPP;
852 res.yres = info->var.yres_virtual;
853 res.xoff = (res.xres - info->var.xres) / 2;
854 res.yoff = (res.yres - info->var.yres) / 2;
0333d835 855 res.num_frames = par->num_frames;
310d8c11
GU
856 if (!copy_to_user(argp, &res, sizeof(res)))
857 retval = 0;
858 break;
859 }
860
861 case PS3FB_IOCTL_ON:
535da7ff 862 dev_dbg(info->device, "PS3FB_IOCTL_ON:\n");
310d8c11
GU
863 atomic_inc(&ps3fb.ext_flip);
864 retval = 0;
865 break;
866
867 case PS3FB_IOCTL_OFF:
535da7ff 868 dev_dbg(info->device, "PS3FB_IOCTL_OFF:\n");
eca28743 869 atomic_dec_if_positive(&ps3fb.ext_flip);
310d8c11
GU
870 retval = 0;
871 break;
872
873 case PS3FB_IOCTL_FSEL:
874 if (copy_from_user(&val, argp, sizeof(val)))
875 break;
876
535da7ff 877 dev_dbg(info->device, "PS3FB_IOCTL_FSEL:%d\n", val);
ac751efa 878 console_lock();
535da7ff 879 retval = ps3fb_sync(info, val);
ac751efa 880 console_unlock();
310d8c11
GU
881 break;
882
883 default:
884 retval = -ENOIOCTLCMD;
885 break;
886 }
887 return retval;
888}
889
890static int ps3fbd(void *arg)
891{
535da7ff
GU
892 struct fb_info *info = arg;
893
83144186 894 set_freezable();
1c0c8461
GU
895 while (!kthread_should_stop()) {
896 try_to_freeze();
897 set_current_state(TASK_INTERRUPTIBLE);
898 if (ps3fb.is_kicked) {
899 ps3fb.is_kicked = 0;
ac751efa 900 console_lock();
535da7ff 901 ps3fb_sync(info, 0); /* single buffer */
ac751efa 902 console_unlock();
1c0c8461
GU
903 }
904 schedule();
310d8c11
GU
905 }
906 return 0;
907}
908
909static irqreturn_t ps3fb_vsync_interrupt(int irq, void *ptr)
910{
535da7ff 911 struct device *dev = ptr;
310d8c11
GU
912 u64 v1;
913 int status;
914 struct display_head *head = &ps3fb.dinfo->display_head[1];
915
916 status = lv1_gpu_context_intr(ps3fb.context_handle, &v1);
917 if (status) {
535da7ff
GU
918 dev_err(dev, "%s: lv1_gpu_context_intr failed: %d\n", __func__,
919 status);
310d8c11
GU
920 return IRQ_NONE;
921 }
922
923 if (v1 & (1 << GPU_INTR_STATUS_VSYNC_1)) {
924 /* VSYNC */
925 ps3fb.vblank_count = head->vblank_count;
1c0c8461
GU
926 if (ps3fb.task && !ps3fb.is_blanked &&
927 !atomic_read(&ps3fb.ext_flip)) {
928 ps3fb.is_kicked = 1;
929 wake_up_process(ps3fb.task);
930 }
310d8c11
GU
931 wake_up_interruptible(&ps3fb.wait_vsync);
932 }
933
934 return IRQ_HANDLED;
935}
936
310d8c11 937
8a48ac33 938static const struct fb_ops ps3fb_ops = {
25ec15ab 939 .owner = THIS_MODULE,
310d8c11
GU
940 .fb_open = ps3fb_open,
941 .fb_release = ps3fb_release,
92c4579d
GU
942 .fb_read = fb_sys_read,
943 .fb_write = fb_sys_write,
310d8c11
GU
944 .fb_check_var = ps3fb_check_var,
945 .fb_set_par = ps3fb_set_par,
946 .fb_setcolreg = ps3fb_setcolreg,
fc7028b7 947 .fb_pan_display = ps3fb_pan_display,
92c4579d
GU
948 .fb_fillrect = sys_fillrect,
949 .fb_copyarea = sys_copyarea,
950 .fb_imageblit = sys_imageblit,
310d8c11
GU
951 .fb_mmap = ps3fb_mmap,
952 .fb_blank = ps3fb_blank,
953 .fb_ioctl = ps3fb_ioctl,
954 .fb_compat_ioctl = ps3fb_ioctl
955};
956
799b88de 957static const struct fb_fix_screeninfo ps3fb_fix = {
9e6b99bd 958 .id = DEVICE_NAME,
310d8c11
GU
959 .type = FB_TYPE_PACKED_PIXELS,
960 .visual = FB_VISUAL_TRUECOLOR,
961 .accel = FB_ACCEL_NONE,
962};
963
48c68c4f 964static int ps3fb_probe(struct ps3_system_bus_device *dev)
310d8c11
GU
965{
966 struct fb_info *info;
0333d835 967 struct ps3fb_par *par;
ca971ea3 968 int retval;
310d8c11
GU
969 u64 ddr_lpar = 0;
970 u64 lpar_dma_control = 0;
971 u64 lpar_driver_info = 0;
972 u64 lpar_reports = 0;
973 u64 lpar_reports_size = 0;
974 u64 xdr_lpar;
bb94f077 975 struct gpu_driver_info *dinfo;
a286408c 976 void *fb_start;
9f4f21b4 977 int status;
1c0c8461 978 struct task_struct *task;
ee592a5b 979 unsigned long max_ps3fb_size;
310d8c11 980
9ac67a35
GU
981 if (ps3fb_videomemory.size < GPU_CMD_BUF_SIZE) {
982 dev_err(&dev->core, "%s: Not enough video memory\n", __func__);
983 return -ENOMEM;
984 }
985
ca971ea3
GU
986 retval = ps3_open_hv_device(dev);
987 if (retval) {
535da7ff
GU
988 dev_err(&dev->core, "%s: ps3_open_hv_device failed\n",
989 __func__);
9e6b99bd
GU
990 goto err;
991 }
992
993 if (!ps3fb_mode)
994 ps3fb_mode = ps3av_get_mode();
084ffff2 995 dev_dbg(&dev->core, "ps3fb_mode: %d\n", ps3fb_mode);
9e6b99bd 996
9e6b99bd
GU
997 atomic_set(&ps3fb.f_count, -1); /* fbcon opens ps3fb */
998 atomic_set(&ps3fb.ext_flip, 0); /* for flip with vsync */
999 init_waitqueue_head(&ps3fb.wait_vsync);
9e6b99bd 1000
bb94f077 1001#ifdef HEAD_A
d3352c9f 1002 status = lv1_gpu_display_sync(0x0, 0, L1GPU_DISPLAY_SYNC_VSYNC);
bb94f077 1003 if (status) {
d3352c9f 1004 dev_err(&dev->core, "%s: lv1_gpu_display_sync failed: %d\n",
bb94f077 1005 __func__, status);
ca971ea3
GU
1006 retval = -ENODEV;
1007 goto err_close_device;
bb94f077
GU
1008 }
1009#endif
1010#ifdef HEAD_B
d3352c9f 1011 status = lv1_gpu_display_sync(0x0, 1, L1GPU_DISPLAY_SYNC_VSYNC);
bb94f077 1012 if (status) {
d3352c9f 1013 dev_err(&dev->core, "%s: lv1_gpu_display_sync failed: %d\n",
bb94f077 1014 __func__, status);
ca971ea3
GU
1015 retval = -ENODEV;
1016 goto err_close_device;
bb94f077
GU
1017 }
1018#endif
9e6b99bd 1019
7bfc3c84 1020 max_ps3fb_size = ALIGN(GPU_IOIF, 256*1024*1024) - GPU_IOIF;
ee592a5b
GU
1021 if (ps3fb_videomemory.size > max_ps3fb_size) {
1022 dev_info(&dev->core, "Limiting ps3fb mem size to %lu bytes\n",
1023 max_ps3fb_size);
1024 ps3fb_videomemory.size = max_ps3fb_size;
1025 }
1026
310d8c11 1027 /* get gpu context handle */
ee592a5b 1028 status = lv1_gpu_memory_allocate(ps3fb_videomemory.size, 0, 0, 0, 0,
310d8c11
GU
1029 &ps3fb.memory_handle, &ddr_lpar);
1030 if (status) {
535da7ff
GU
1031 dev_err(&dev->core, "%s: lv1_gpu_memory_allocate failed: %d\n",
1032 __func__, status);
8ead8a2e 1033 retval = -ENOMEM;
ca971ea3 1034 goto err_close_device;
310d8c11 1035 }
5d9ee3ff 1036 dev_dbg(&dev->core, "ddr:lpar:0x%llx\n", ddr_lpar);
310d8c11
GU
1037
1038 status = lv1_gpu_context_allocate(ps3fb.memory_handle, 0,
1039 &ps3fb.context_handle,
1040 &lpar_dma_control, &lpar_driver_info,
1041 &lpar_reports, &lpar_reports_size);
1042 if (status) {
535da7ff 1043 dev_err(&dev->core,
d3352c9f 1044 "%s: lv1_gpu_context_allocate failed: %d\n", __func__,
535da7ff 1045 status);
8ead8a2e 1046 retval = -ENOMEM;
310d8c11
GU
1047 goto err_gpu_memory_free;
1048 }
1049
1050 /* vsync interrupt */
bb94f077
GU
1051 dinfo = (void __force *)ioremap(lpar_driver_info, 128 * 1024);
1052 if (!dinfo) {
535da7ff 1053 dev_err(&dev->core, "%s: ioremap failed\n", __func__);
8ead8a2e 1054 retval = -ENOMEM;
310d8c11
GU
1055 goto err_gpu_context_free;
1056 }
1057
bb94f077
GU
1058 ps3fb.dinfo = dinfo;
1059 dev_dbg(&dev->core, "version_driver:%x\n", dinfo->version_driver);
1060 dev_dbg(&dev->core, "irq outlet:%x\n", dinfo->irq.irq_outlet);
1061 dev_dbg(&dev->core, "version_gpu: %x memory_size: %x ch: %x "
1062 "core_freq: %d mem_freq:%d\n", dinfo->version_gpu,
1063 dinfo->memory_size, dinfo->hardware_channel,
1064 dinfo->nvcore_frequency/1000000,
1065 dinfo->memory_frequency/1000000);
1066
1067 if (dinfo->version_driver != GPU_DRIVER_INFO_VERSION) {
1068 dev_err(&dev->core, "%s: version_driver err:%x\n", __func__,
1069 dinfo->version_driver);
1070 retval = -EINVAL;
1071 goto err_iounmap_dinfo;
1072 }
1073
1074 retval = ps3_irq_plug_setup(PS3_BINDING_CPU_ANY, dinfo->irq.irq_outlet,
1075 &ps3fb.irq_no);
1076 if (retval) {
1077 dev_err(&dev->core, "%s: ps3_alloc_irq failed %d\n", __func__,
1078 retval);
310d8c11 1079 goto err_iounmap_dinfo;
bb94f077
GU
1080 }
1081
1082 retval = request_irq(ps3fb.irq_no, ps3fb_vsync_interrupt,
f8798ccb 1083 0, DEVICE_NAME, &dev->core);
bb94f077
GU
1084 if (retval) {
1085 dev_err(&dev->core, "%s: request_irq failed %d\n", __func__,
1086 retval);
1087 goto err_destroy_plug;
1088 }
1089
1090 dinfo->irq.mask = (1 << GPU_INTR_STATUS_VSYNC_1) |
1091 (1 << GPU_INTR_STATUS_FLIP_1);
310d8c11 1092
2ce32e15 1093 /* Clear memory to prevent kernel info leakage into userspace */
a286408c 1094 memset(ps3fb_videomemory.address, 0, ps3fb_videomemory.size);
2ce32e15 1095
a286408c 1096 xdr_lpar = ps3_mm_phys_to_lpar(__pa(ps3fb_videomemory.address));
bb94f077
GU
1097
1098 status = lv1_gpu_context_iomap(ps3fb.context_handle, GPU_IOIF,
e78d0c5c
GU
1099 xdr_lpar, ps3fb_videomemory.size,
1100 CBE_IOPTE_PP_W | CBE_IOPTE_PP_R |
1101 CBE_IOPTE_M);
bb94f077
GU
1102 if (status) {
1103 dev_err(&dev->core, "%s: lv1_gpu_context_iomap failed: %d\n",
1104 __func__, status);
1105 retval = -ENXIO;
1106 goto err_free_irq;
1107 }
1108
1109 dev_dbg(&dev->core, "video:%p ioif:%lx lpar:%llx size:%lx\n",
1110 ps3fb_videomemory.address, GPU_IOIF, xdr_lpar,
1111 ps3fb_videomemory.size);
1112
d3352c9f
GU
1113 status = lv1_gpu_fb_setup(ps3fb.context_handle, xdr_lpar,
1114 GPU_CMD_BUF_SIZE, GPU_IOIF);
bb94f077 1115 if (status) {
d3352c9f 1116 dev_err(&dev->core, "%s: lv1_gpu_fb_setup failed: %d\n",
bb94f077
GU
1117 __func__, status);
1118 retval = -ENXIO;
e78d0c5c 1119 goto err_context_unmap;
bb94f077 1120 }
310d8c11 1121
0333d835 1122 info = framebuffer_alloc(sizeof(struct ps3fb_par), &dev->core);
8ead8a2e
PST
1123 if (!info) {
1124 retval = -ENOMEM;
c204ff65 1125 goto err_context_fb_close;
8ead8a2e 1126 }
310d8c11 1127
0333d835
GU
1128 par = info->par;
1129 par->mode_id = ~ps3fb_mode; /* != ps3fb_mode, to trigger change */
1130 par->new_mode_id = ps3fb_mode;
0333d835
GU
1131 par->num_frames = 1;
1132
310d8c11 1133 info->fbops = &ps3fb_ops;
310d8c11 1134 info->fix = ps3fb_fix;
a286408c
GU
1135
1136 /*
1137 * The GPU command buffer is at the start of video memory
1138 * As we don't use the full command buffer, we can put the actual
1139 * frame buffer at offset GPU_FB_START and save some precious XDR
1140 * memory
1141 */
1142 fb_start = ps3fb_videomemory.address + GPU_FB_START;
bdb61647 1143 info->screen_buffer = fb_start;
f6b3df62 1144 info->fix.smem_start = __pa(fb_start);
a286408c
GU
1145 info->fix.smem_len = ps3fb_videomemory.size - GPU_FB_START;
1146
0333d835 1147 info->pseudo_palette = par->pseudo_palette;
b3e148d7 1148 info->flags = FBINFO_READS_FAST |
fc7028b7 1149 FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
310d8c11
GU
1150
1151 retval = fb_alloc_cmap(&info->cmap, 256, 0);
1152 if (retval < 0)
1153 goto err_framebuffer_release;
1154
1155 if (!fb_find_mode(&info->var, info, mode_option, ps3fb_modedb,
0333d835 1156 ARRAY_SIZE(ps3fb_modedb),
34c422fb 1157 ps3fb_vmode(par->new_mode_id), 32)) {
310d8c11
GU
1158 retval = -EINVAL;
1159 goto err_fb_dealloc;
1160 }
1161
1162 fb_videomode_to_modelist(ps3fb_modedb, ARRAY_SIZE(ps3fb_modedb),
1163 &info->modelist);
1164
1165 retval = register_framebuffer(info);
1166 if (retval < 0)
1167 goto err_fb_dealloc;
1168
cd4a157d 1169 ps3_system_bus_set_drvdata(dev, info);
310d8c11 1170
513bf560 1171 fb_info(info, "using %u KiB of video memory\n", info->fix.smem_len >> 10);
310d8c11 1172
9e6b99bd 1173 task = kthread_run(ps3fbd, info, DEVICE_NAME);
1c0c8461
GU
1174 if (IS_ERR(task)) {
1175 retval = PTR_ERR(task);
1176 goto err_unregister_framebuffer;
1177 }
1178
1179 ps3fb.task = task;
1180
310d8c11
GU
1181 return 0;
1182
1c0c8461
GU
1183err_unregister_framebuffer:
1184 unregister_framebuffer(info);
310d8c11
GU
1185err_fb_dealloc:
1186 fb_dealloc_cmap(&info->cmap);
1187err_framebuffer_release:
1188 framebuffer_release(info);
c204ff65
GU
1189err_context_fb_close:
1190 lv1_gpu_fb_close(ps3fb.context_handle);
e78d0c5c
GU
1191err_context_unmap:
1192 lv1_gpu_context_iomap(ps3fb.context_handle, GPU_IOIF, xdr_lpar,
1193 ps3fb_videomemory.size, CBE_IOPTE_M);
310d8c11 1194err_free_irq:
fcbe6e97 1195 free_irq(ps3fb.irq_no, &dev->core);
bb94f077 1196err_destroy_plug:
dc4f60c2 1197 ps3_irq_plug_destroy(ps3fb.irq_no);
310d8c11 1198err_iounmap_dinfo:
a286408c 1199 iounmap((u8 __force __iomem *)ps3fb.dinfo);
310d8c11
GU
1200err_gpu_context_free:
1201 lv1_gpu_context_free(ps3fb.context_handle);
1202err_gpu_memory_free:
1203 lv1_gpu_memory_free(ps3fb.memory_handle);
ca971ea3
GU
1204err_close_device:
1205 ps3_close_hv_device(dev);
310d8c11
GU
1206err:
1207 return retval;
1208}
1209
6d247e4d 1210static void ps3fb_shutdown(struct ps3_system_bus_device *dev)
310d8c11 1211{
cd4a157d 1212 struct fb_info *info = ps3_system_bus_get_drvdata(dev);
e78d0c5c 1213 u64 xdr_lpar = ps3_mm_phys_to_lpar(__pa(ps3fb_videomemory.address));
9e6b99bd 1214
535da7ff 1215 dev_dbg(&dev->core, " -> %s:%d\n", __func__, __LINE__);
9e6b99bd 1216
9b82f3e6 1217 atomic_inc(&ps3fb.ext_flip); /* flip off */
310d8c11 1218 ps3fb.dinfo->irq.mask = 0;
310d8c11 1219
1c0c8461
GU
1220 if (ps3fb.task) {
1221 struct task_struct *task = ps3fb.task;
1222 ps3fb.task = NULL;
1223 kthread_stop(task);
1224 }
310d8c11 1225 if (ps3fb.irq_no) {
fcbe6e97 1226 free_irq(ps3fb.irq_no, &dev->core);
dc4f60c2 1227 ps3_irq_plug_destroy(ps3fb.irq_no);
310d8c11 1228 }
ba21611c
JK
1229 if (info) {
1230 unregister_framebuffer(info);
1231 fb_dealloc_cmap(&info->cmap);
1232 framebuffer_release(info);
cd4a157d 1233 ps3_system_bus_set_drvdata(dev, NULL);
ba21611c 1234 }
a286408c 1235 iounmap((u8 __force __iomem *)ps3fb.dinfo);
c204ff65 1236 lv1_gpu_fb_close(ps3fb.context_handle);
e78d0c5c
GU
1237 lv1_gpu_context_iomap(ps3fb.context_handle, GPU_IOIF, xdr_lpar,
1238 ps3fb_videomemory.size, CBE_IOPTE_M);
02aad32c
GU
1239 lv1_gpu_context_free(ps3fb.context_handle);
1240 lv1_gpu_memory_free(ps3fb.memory_handle);
9e6b99bd 1241 ps3_close_hv_device(dev);
535da7ff 1242 dev_dbg(&dev->core, " <- %s:%d\n", __func__, __LINE__);
310d8c11
GU
1243}
1244
9e6b99bd 1245static struct ps3_system_bus_driver ps3fb_driver = {
46d01492
GU
1246 .match_id = PS3_MATCH_ID_GPU,
1247 .match_sub_id = PS3_MATCH_SUB_ID_GPU_FB,
9e6b99bd
GU
1248 .core.name = DEVICE_NAME,
1249 .core.owner = THIS_MODULE,
1250 .probe = ps3fb_probe,
1251 .remove = ps3fb_shutdown,
1252 .shutdown = ps3fb_shutdown,
310d8c11
GU
1253};
1254
9e6b99bd 1255static int __init ps3fb_setup(void)
310d8c11 1256{
9e6b99bd 1257 char *options;
310d8c11 1258
9e6b99bd 1259#ifdef MODULE
310d8c11 1260 return 0;
310d8c11
GU
1261#endif
1262
9e6b99bd
GU
1263 if (fb_get_options(DEVICE_NAME, &options))
1264 return -ENXIO;
310d8c11 1265
9e6b99bd
GU
1266 if (!options || !*options)
1267 return 0;
310d8c11 1268
9e6b99bd
GU
1269 while (1) {
1270 char *this_opt = strsep(&options, ",");
310d8c11 1271
9e6b99bd
GU
1272 if (!this_opt)
1273 break;
1274 if (!*this_opt)
1275 continue;
1276 if (!strncmp(this_opt, "mode:", 5))
1277 ps3fb_mode = simple_strtoul(this_opt + 5, NULL, 0);
1278 else
1279 mode_option = this_opt;
310d8c11 1280 }
9e6b99bd
GU
1281 return 0;
1282}
310d8c11 1283
9e6b99bd
GU
1284static int __init ps3fb_init(void)
1285{
1286 if (!ps3fb_videomemory.address || ps3fb_setup())
1287 return -ENXIO;
310d8c11 1288
9e6b99bd 1289 return ps3_system_bus_driver_register(&ps3fb_driver);
310d8c11
GU
1290}
1291
310d8c11
GU
1292static void __exit ps3fb_exit(void)
1293{
535da7ff 1294 pr_debug(" -> %s:%d\n", __func__, __LINE__);
9e6b99bd 1295 ps3_system_bus_driver_unregister(&ps3fb_driver);
535da7ff 1296 pr_debug(" <- %s:%d\n", __func__, __LINE__);
310d8c11
GU
1297}
1298
9e6b99bd 1299module_init(ps3fb_init);
310d8c11
GU
1300module_exit(ps3fb_exit);
1301
1302MODULE_LICENSE("GPL");
9e6b99bd
GU
1303MODULE_DESCRIPTION("PS3 GPU Frame Buffer Driver");
1304MODULE_AUTHOR("Sony Computer Entertainment Inc.");
46d01492 1305MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_FB);