projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[linux-2.6-block.git] / drivers / video / fbdev / offb.c
CommitLineData
1da177e4
LT		 1/*
2 * linux/drivers/video/offb.c -- Open Firmware based frame buffer device
3 *
4 * Copyright (C) 1997 Geert Uytterhoeven
5 *
6 * This driver is partly based on the PowerMac console driver:
7 *
8 * Copyright (C) 1996 Paul Mackerras
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive for
12 * more details.
13 */
14
1da177e4
LT		 15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/errno.h>
18#include <linux/string.h>
19#include <linux/mm.h>
1da177e4
LT		 20#include <linux/vmalloc.h>
21#include <linux/delay.h>
22ae782f
GL		 22#include <linux/of.h>
23#include <linux/of_address.h>
1da177e4
LT		 24#include <linux/interrupt.h>
25#include <linux/fb.h>
26#include <linux/init.h>
27#include <linux/ioport.h>
f365cfd0 28#include <linux/pci.h>
1da177e4 29#include <asm/io.h>
1da177e4 30
1da177e4
LT		 31#ifdef CONFIG_PPC32
32#include <asm/bootx.h>
33#endif
34
35#include "macmodes.h"
36
37/* Supported palette hacks */
38enum {
39 cmap_unknown,
9b961ed2 40 cmap_simple, /* ATI Mach64 */
1da177e4
LT		 41 cmap_r128, /* ATI Rage128 */
42 cmap_M3A, /* ATI Rage Mobility M3 Head A */
43 cmap_M3B, /* ATI Rage Mobility M3 Head B */
44 cmap_radeon, /* ATI Radeon */
45 cmap_gxt2000, /* IBM GXT2000 */
57a20d8f 46 cmap_avivo, /* ATI R5xx */
9b961ed2 47 cmap_qemu, /* qemu vga */
1da177e4
LT		 48};
49
50struct offb_par {
51 volatile void __iomem *cmap_adr;
52 volatile void __iomem *cmap_data;
53 int cmap_type;
54 int blanked;
55};
56
57struct offb_par default_par;
58
1da177e4
LT		 59#ifdef CONFIG_PPC32
60extern boot_infos_t *boot_infos;
61#endif
62
57a20d8f
BH		 63/* Definitions used by the Avivo palette hack */
64#define AVIVO_DC_LUT_RW_SELECT 0x6480
65#define AVIVO_DC_LUT_RW_MODE 0x6484
66#define AVIVO_DC_LUT_RW_INDEX 0x6488
67#define AVIVO_DC_LUT_SEQ_COLOR 0x648c
68#define AVIVO_DC_LUT_PWL_DATA 0x6490
69#define AVIVO_DC_LUT_30_COLOR 0x6494
70#define AVIVO_DC_LUT_READ_PIPE_SELECT 0x6498
71#define AVIVO_DC_LUT_WRITE_EN_MASK 0x649c
72#define AVIVO_DC_LUT_AUTOFILL 0x64a0
73
74#define AVIVO_DC_LUTA_CONTROL 0x64c0
75#define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE 0x64c4
76#define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN 0x64c8
77#define AVIVO_DC_LUTA_BLACK_OFFSET_RED 0x64cc
78#define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE 0x64d0
79#define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN 0x64d4
80#define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8
81
82#define AVIVO_DC_LUTB_CONTROL 0x6cc0
83#define AVIVO_DC_LUTB_BLACK_OFFSET_BLUE 0x6cc4
84#define AVIVO_DC_LUTB_BLACK_OFFSET_GREEN 0x6cc8
85#define AVIVO_DC_LUTB_BLACK_OFFSET_RED 0x6ccc
86#define AVIVO_DC_LUTB_WHITE_OFFSET_BLUE 0x6cd0
87#define AVIVO_DC_LUTB_WHITE_OFFSET_GREEN 0x6cd4
88#define AVIVO_DC_LUTB_WHITE_OFFSET_RED 0x6cd8
1da177e4
LT		 89
90 /*
91 * Set a single color register. The values supplied are already
92 * rounded down to the hardware's capabilities (according to the
93 * entries in the var structure). Return != 0 for invalid regno.
94 */
95
96static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
97 u_int transp, struct fb_info *info)
98{
99 struct offb_par *par = (struct offb_par *) info->par;
1bb0b7d2
BH		 100
101 if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
102 u32 *pal = info->pseudo_palette;
103 u32 cr = red >> (16 - info->var.red.length);
104 u32 cg = green >> (16 - info->var.green.length);
105 u32 cb = blue >> (16 - info->var.blue.length);
106 u32 value;
107
108 if (regno >= 16)
109 return -EINVAL;
110
111 value = (cr << info->var.red.offset) |
112 (cg << info->var.green.offset) |
113 (cb << info->var.blue.offset);
114 if (info->var.transp.length > 0) {
115 u32 mask = (1 << info->var.transp.length) - 1;
116 mask <<= info->var.transp.offset;
117 value |= mask;
ab134466 118 }
68986c9f 119 pal[regno] = value;
1bb0b7d2 120 return 0;
ab134466
BH		 121 }
122
1bb0b7d2
BH		 123 if (regno > 255)
124 return -EINVAL;
125
1da177e4
LT		 126 red >>= 8;
127 green >>= 8;
128 blue >>= 8;
129
ab134466
BH		 130 if (!par->cmap_adr)
131 return 0;
132
1da177e4 133 switch (par->cmap_type) {
9b961ed2 134 case cmap_simple:
1da177e4
LT		 135 writeb(regno, par->cmap_adr);
136 writeb(red, par->cmap_data);
137 writeb(green, par->cmap_data);
138 writeb(blue, par->cmap_data);
139 break;
140 case cmap_M3A:
141 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
142 out_le32(par->cmap_adr + 0x58,
143 in_le32(par->cmap_adr + 0x58) & ~0x20);
144 case cmap_r128:
145 /* Set palette index & data */
146 out_8(par->cmap_adr + 0xb0, regno);
147 out_le32(par->cmap_adr + 0xb4,
148 (red << 16 | green << 8 | blue));
149 break;
150 case cmap_M3B:
151 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
152 out_le32(par->cmap_adr + 0x58,
153 in_le32(par->cmap_adr + 0x58) | 0x20);
154 /* Set palette index & data */
155 out_8(par->cmap_adr + 0xb0, regno);
156 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
157 break;
158 case cmap_radeon:
159 /* Set palette index & data (could be smarter) */
160 out_8(par->cmap_adr + 0xb0, regno);
161 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
162 break;
163 case cmap_gxt2000:
441cbd8d 164 out_le32(((unsigned __iomem *) par->cmap_adr) + regno,
1da177e4
LT		 165 (red << 16 | green << 8 | blue));
166 break;
57a20d8f
BH		 167 case cmap_avivo:
168 /* Write to both LUTs for now */
169 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
170 writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
171 writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
172 par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
173 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
174 writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
175 writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
176 par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
177 break;
1da177e4
LT		 178 }
179
1da177e4
LT		 180 return 0;
181}
182
183 /*
184 * Blank the display.
185 */
186
187static int offb_blank(int blank, struct fb_info *info)
188{
189 struct offb_par *par = (struct offb_par *) info->par;
190 int i, j;
191
192 if (!par->cmap_adr)
193 return 0;
194
195 if (!par->blanked)
196 if (!blank)
197 return 0;
198
199 par->blanked = blank;
200
201 if (blank)
202 for (i = 0; i < 256; i++) {
203 switch (par->cmap_type) {
9b961ed2 204 case cmap_simple:
1da177e4
LT		 205 writeb(i, par->cmap_adr);
206 for (j = 0; j < 3; j++)
207 writeb(0, par->cmap_data);
208 break;
209 case cmap_M3A:
210 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
211 out_le32(par->cmap_adr + 0x58,
212 in_le32(par->cmap_adr + 0x58) & ~0x20);
213 case cmap_r128:
214 /* Set palette index & data */
215 out_8(par->cmap_adr + 0xb0, i);
216 out_le32(par->cmap_adr + 0xb4, 0);
217 break;
218 case cmap_M3B:
219 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
220 out_le32(par->cmap_adr + 0x58,
221 in_le32(par->cmap_adr + 0x58) | 0x20);
222 /* Set palette index & data */
223 out_8(par->cmap_adr + 0xb0, i);
224 out_le32(par->cmap_adr + 0xb4, 0);
225 break;
226 case cmap_radeon:
227 out_8(par->cmap_adr + 0xb0, i);
228 out_le32(par->cmap_adr + 0xb4, 0);
229 break;
230 case cmap_gxt2000:
441cbd8d 231 out_le32(((unsigned __iomem *) par->cmap_adr) + i,
1da177e4
LT		 232 0);
233 break;
57a20d8f
BH		 234 case cmap_avivo:
235 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
236 writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
237 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
238 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
239 writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
240 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
241 break;
1da177e4
LT		 242 }
243 } else
244 fb_set_cmap(&info->cmap, info);
245 return 0;
246}
247
57a20d8f
BH		 248static int offb_set_par(struct fb_info *info)
249{
250 struct offb_par *par = (struct offb_par *) info->par;
251
252 /* On avivo, initialize palette control */
253 if (par->cmap_type == cmap_avivo) {
254 writel(0, par->cmap_adr + AVIVO_DC_LUTA_CONTROL);
255 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_BLUE);
256 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_GREEN);
257 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_RED);
258 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_BLUE);
259 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_GREEN);
260 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_RED);
261 writel(0, par->cmap_adr + AVIVO_DC_LUTB_CONTROL);
262 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_BLUE);
263 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_GREEN);
264 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_RED);
265 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_BLUE);
266 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_GREEN);
267 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_RED);
268 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
269 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
270 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
271 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
272 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
273 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
274 }
275 return 0;
276}
277
ceae8cbe
DA		 278static void offb_destroy(struct fb_info *info)
279{
280 if (info->screen_base)
281 iounmap(info->screen_base);
1471ca9a 282 release_mem_region(info->apertures->ranges[0].base, info->apertures->ranges[0].size);
9cbaf4d9 283 fb_dealloc_cmap(&info->cmap);
ceae8cbe
DA		 284 framebuffer_release(info);
285}
286
57a20d8f
BH		 287static struct fb_ops offb_ops = {
288 .owner = THIS_MODULE,
ceae8cbe 289 .fb_destroy = offb_destroy,
57a20d8f
BH		 290 .fb_setcolreg = offb_setcolreg,
291 .fb_set_par = offb_set_par,
292 .fb_blank = offb_blank,
293 .fb_fillrect = cfb_fillrect,
294 .fb_copyarea = cfb_copyarea,
295 .fb_imageblit = cfb_imageblit,
296};
1da177e4 297
73ea6959
BH		 298static void __iomem *offb_map_reg(struct device_node *np, int index,
299 unsigned long offset, unsigned long size)
1da177e4 300{
212c0cbd 301 const __be32 *addrp;
441cbd8d
BH		 302 u64 asize, taddr;
303 unsigned int flags;
304
305 addrp = of_get_pci_address(np, index, &asize, &flags);
306 if (addrp == NULL)
307 addrp = of_get_address(np, index, &asize, &flags);
308 if (addrp == NULL)
309 return NULL;
310 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
311 return NULL;
312 if ((offset + size) > asize)
313 return NULL;
314 taddr = of_translate_address(np, addrp);
315 if (taddr == OF_BAD_ADDR)
316 return NULL;
317 return ioremap(taddr + offset, size);
1da177e4
LT		 318}
319
57a20d8f
BH		 320static void offb_init_palette_hacks(struct fb_info *info, struct device_node *dp,
321 const char *name, unsigned long address)
322{
323 struct offb_par *par = (struct offb_par *) info->par;
324
325 if (dp && !strncmp(name, "ATY,Rage128", 11)) {
326 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
327 if (par->cmap_adr)
328 par->cmap_type = cmap_r128;
329 } else if (dp && (!strncmp(name, "ATY,RageM3pA", 12)
330 || !strncmp(name, "ATY,RageM3p12A", 14))) {
331 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
332 if (par->cmap_adr)
333 par->cmap_type = cmap_M3A;
334 } else if (dp && !strncmp(name, "ATY,RageM3pB", 12)) {
335 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
336 if (par->cmap_adr)
337 par->cmap_type = cmap_M3B;
338 } else if (dp && !strncmp(name, "ATY,Rage6", 9)) {
339 par->cmap_adr = offb_map_reg(dp, 1, 0, 0x1fff);
340 if (par->cmap_adr)
341 par->cmap_type = cmap_radeon;
342 } else if (!strncmp(name, "ATY,", 4)) {
343 unsigned long base = address & 0xff000000UL;
344 par->cmap_adr =
345 ioremap(base + 0x7ff000, 0x1000) + 0xcc0;
346 par->cmap_data = par->cmap_adr + 1;
9b961ed2 347 par->cmap_type = cmap_simple;
57a20d8f
BH		 348 } else if (dp && (of_device_is_compatible(dp, "pci1014,b7") ||
349 of_device_is_compatible(dp, "pci1014,21c"))) {
350 par->cmap_adr = offb_map_reg(dp, 0, 0x6000, 0x1000);
351 if (par->cmap_adr)
352 par->cmap_type = cmap_gxt2000;
353 } else if (dp && !strncmp(name, "vga,Display-", 12)) {
354 /* Look for AVIVO initialized by SLOF */
355 struct device_node *pciparent = of_get_parent(dp);
356 const u32 *vid, *did;
357 vid = of_get_property(pciparent, "vendor-id", NULL);
358 did = of_get_property(pciparent, "device-id", NULL);
359 /* This will match most R5xx */
360 if (vid && did && *vid == 0x1002 &&
361 ((*did >= 0x7100 && *did < 0x7800) ||
362 (*did >= 0x9400))) {
363 par->cmap_adr = offb_map_reg(pciparent, 2, 0, 0x10000);
364 if (par->cmap_adr)
365 par->cmap_type = cmap_avivo;
366 }
367 of_node_put(pciparent);
9b961ed2 368 } else if (dp && of_device_is_compatible(dp, "qemu,std-vga")) {
212c0cbd
CLG		 369#ifdef __BIG_ENDIAN
370 const __be32 io_of_addr[3] = { 0x01000000, 0x0, 0x0 };
371#else
372 const __be32 io_of_addr[3] = { 0x00000001, 0x0, 0x0 };
373#endif
9b961ed2
BH		 374 u64 io_addr = of_translate_address(dp, io_of_addr);
375 if (io_addr != OF_BAD_ADDR) {
376 par->cmap_adr = ioremap(io_addr + 0x3c8, 2);
377 if (par->cmap_adr) {
378 par->cmap_type = cmap_simple;
379 par->cmap_data = par->cmap_adr + 1;
380 }
381 }
57a20d8f
BH		 382 }
383 info->fix.visual = (par->cmap_type != cmap_unknown) ?
384 FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_STATIC_PSEUDOCOLOR;
385}
386
6d7e6533 387static void __init offb_init_fb(const char *name,
1da177e4
LT		 388 int width, int height, int depth,
389 int pitch, unsigned long address,
7f29b87a 390 int foreign_endian, struct device_node *dp)
1da177e4 391{
c055fe07 392 unsigned long res_size = pitch * height;
1da177e4
LT		 393 struct offb_par *par = &default_par;
394 unsigned long res_start = address;
395 struct fb_fix_screeninfo *fix;
396 struct fb_var_screeninfo *var;
397 struct fb_info *info;
1da177e4
LT		 398
399 if (!request_mem_region(res_start, res_size, "offb"))
400 return;
401
402 printk(KERN_INFO
403 "Using unsupported %dx%d %s at %lx, depth=%d, pitch=%d\n",
404 width, height, name, address, depth, pitch);
ab134466 405 if (depth != 8 && depth != 15 && depth != 16 && depth != 32) {
6d7e6533 406 printk(KERN_ERR "%pOF: can't use depth = %d\n", dp, depth);
1da177e4
LT		 407 release_mem_region(res_start, res_size);
408 return;
409 }
410
4113819e 411 info = framebuffer_alloc(sizeof(u32) * 16, NULL);
6d7e6533 412
1da177e4
LT		 413 if (info == 0) {
414 release_mem_region(res_start, res_size);
415 return;
416 }
1da177e4
LT		 417
418 fix = &info->fix;
419 var = &info->var;
57a20d8f 420 info->par = par;
1da177e4 421
5c63e407
RH		 422 if (name) {
423 strcpy(fix->id, "OFfb ");
424 strncat(fix->id, name, sizeof(fix->id) - sizeof("OFfb "));
425 fix->id[sizeof(fix->id) - 1] = '\0';
426 } else
427 snprintf(fix->id, sizeof(fix->id), "OFfb %pOFn", dp);
428
1da177e4
LT		 429
430 var->xres = var->xres_virtual = width;
431 var->yres = var->yres_virtual = height;
432 fix->line_length = pitch;
433
434 fix->smem_start = address;
435 fix->smem_len = pitch * height;
436 fix->type = FB_TYPE_PACKED_PIXELS;
437 fix->type_aux = 0;
438
439 par->cmap_type = cmap_unknown;
57a20d8f
BH		 440 if (depth == 8)
441 offb_init_palette_hacks(info, dp, name, address);
442 else
73ea6959 443 fix->visual = FB_VISUAL_TRUECOLOR;
1da177e4
LT		 444
445 var->xoffset = var->yoffset = 0;
1da177e4
LT		 446 switch (depth) {
447 case 8:
448 var->bits_per_pixel = 8;
449 var->red.offset = 0;
450 var->red.length = 8;
451 var->green.offset = 0;
452 var->green.length = 8;
453 var->blue.offset = 0;
454 var->blue.length = 8;
455 var->transp.offset = 0;
456 var->transp.length = 0;
457 break;
ab134466 458 case 15: /* RGB 555 */
1da177e4
LT		 459 var->bits_per_pixel = 16;
460 var->red.offset = 10;
461 var->red.length = 5;
462 var->green.offset = 5;
463 var->green.length = 5;
464 var->blue.offset = 0;
465 var->blue.length = 5;
466 var->transp.offset = 0;
467 var->transp.length = 0;
468 break;
ab134466
BH		 469 case 16: /* RGB 565 */
470 var->bits_per_pixel = 16;
471 var->red.offset = 11;
472 var->red.length = 5;
473 var->green.offset = 5;
474 var->green.length = 6;
475 var->blue.offset = 0;
476 var->blue.length = 5;
477 var->transp.offset = 0;
478 var->transp.length = 0;
479 break;
1da177e4
LT		 480 case 32: /* RGB 888 */
481 var->bits_per_pixel = 32;
482 var->red.offset = 16;
483 var->red.length = 8;
484 var->green.offset = 8;
485 var->green.length = 8;
486 var->blue.offset = 0;
487 var->blue.length = 8;
488 var->transp.offset = 24;
489 var->transp.length = 8;
490 break;
491 }
492 var->red.msb_right = var->green.msb_right = var->blue.msb_right =
493 var->transp.msb_right = 0;
494 var->grayscale = 0;
495 var->nonstd = 0;
496 var->activate = 0;
497 var->height = var->width = -1;
498 var->pixclock = 10000;
499 var->left_margin = var->right_margin = 16;
500 var->upper_margin = var->lower_margin = 16;
501 var->hsync_len = var->vsync_len = 8;
502 var->sync = 0;
503 var->vmode = FB_VMODE_NONINTERLACED;
504
ceae8cbe 505 /* set offb aperture size for generic probing */
1471ca9a
MS		 506 info->apertures = alloc_apertures(1);
507 if (!info->apertures)
508 goto out_aper;
509 info->apertures->ranges[0].base = address;
510 info->apertures->ranges[0].size = fix->smem_len;
ceae8cbe 511
1da177e4
LT		 512 info->fbops = &offb_ops;
513 info->screen_base = ioremap(address, fix->smem_len);
1da177e4 514 info->pseudo_palette = (void *) (info + 1);
ceae8cbe 515 info->flags = FBINFO_DEFAULT | FBINFO_MISC_FIRMWARE | foreign_endian;
1da177e4
LT		 516
517 fb_alloc_cmap(&info->cmap, 256, 0);
518
1471ca9a
MS		 519 if (register_framebuffer(info) < 0)
520 goto out_err;
1da177e4 521
6d7e6533 522 fb_info(info, "Open Firmware frame buffer device on %pOF\n", dp);
1471ca9a
MS		 523 return;
524
525out_err:
9cbaf4d9 526 fb_dealloc_cmap(&info->cmap);
1471ca9a
MS		 527 iounmap(info->screen_base);
528out_aper:
529 iounmap(par->cmap_adr);
530 par->cmap_adr = NULL;
531 framebuffer_release(info);
532 release_mem_region(res_start, res_size);
1da177e4
LT		 533}
534
73ea6959
BH		 535
536static void __init offb_init_nodriver(struct device_node *dp, int no_real_node)
537{
538 unsigned int len;
539 int i, width = 640, height = 480, depth = 8, pitch = 640;
540 unsigned int flags, rsize, addr_prop = 0;
541 unsigned long max_size = 0;
542 u64 rstart, address = OF_BAD_ADDR;
212c0cbd 543 const __be32 *pp, *addrp, *up;
73ea6959 544 u64 asize;
7f29b87a
AV		 545 int foreign_endian = 0;
546
547#ifdef __BIG_ENDIAN
548 if (of_get_property(dp, "little-endian", NULL))
549 foreign_endian = FBINFO_FOREIGN_ENDIAN;
550#else
551 if (of_get_property(dp, "big-endian", NULL))
552 foreign_endian = FBINFO_FOREIGN_ENDIAN;
553#endif
73ea6959 554
40cd3a45 555 pp = of_get_property(dp, "linux,bootx-depth", &len);
73ea6959 556 if (pp == NULL)
40cd3a45 557 pp = of_get_property(dp, "depth", &len);
73ea6959 558 if (pp && len == sizeof(u32))
212c0cbd 559 depth = be32_to_cpup(pp);
73ea6959 560
40cd3a45 561 pp = of_get_property(dp, "linux,bootx-width", &len);
73ea6959 562 if (pp == NULL)
40cd3a45 563 pp = of_get_property(dp, "width", &len);
73ea6959 564 if (pp && len == sizeof(u32))
212c0cbd 565 width = be32_to_cpup(pp);
73ea6959 566
40cd3a45 567 pp = of_get_property(dp, "linux,bootx-height", &len);
73ea6959 568 if (pp == NULL)
40cd3a45 569 pp = of_get_property(dp, "height", &len);
73ea6959 570 if (pp && len == sizeof(u32))
212c0cbd 571 height = be32_to_cpup(pp);
73ea6959 572
40cd3a45 573 pp = of_get_property(dp, "linux,bootx-linebytes", &len);
73ea6959 574 if (pp == NULL)
40cd3a45 575 pp = of_get_property(dp, "linebytes", &len);
441cbd8d 576 if (pp && len == sizeof(u32) && (*pp != 0xffffffffu))
212c0cbd 577 pitch = be32_to_cpup(pp);
73ea6959
BH		 578 else
579 pitch = width * ((depth + 7) / 8);
580
581 rsize = (unsigned long)pitch * (unsigned long)height;
582
583 /* Ok, now we try to figure out the address of the framebuffer.
584 *
585 * Unfortunately, Open Firmware doesn't provide a standard way to do
586 * so. All we can do is a dodgy heuristic that happens to work in
587 * practice. On most machines, the "address" property contains what
588 * we need, though not on Matrox cards found in IBM machines. What I've
589 * found that appears to give good results is to go through the PCI
590 * ranges and pick one that is both big enough and if possible encloses
591 * the "address" property. If none match, we pick the biggest
592 */
40cd3a45 593 up = of_get_property(dp, "linux,bootx-addr", &len);
73ea6959 594 if (up == NULL)
40cd3a45 595 up = of_get_property(dp, "address", &len);
73ea6959
BH		 596 if (up && len == sizeof(u32))
597 addr_prop = *up;
598
599 /* Hack for when BootX is passing us */
600 if (no_real_node)
601 goto skip_addr;
602
603 for (i = 0; (addrp = of_get_address(dp, i, &asize, &flags))
604 != NULL; i++) {
605 int match_addrp = 0;
606
607 if (!(flags & IORESOURCE_MEM))
608 continue;
609 if (asize < rsize)
610 continue;
611 rstart = of_translate_address(dp, addrp);
612 if (rstart == OF_BAD_ADDR)
613 continue;
614 if (addr_prop && (rstart <= addr_prop) &&
615 ((rstart + asize) >= (addr_prop + rsize)))
616 match_addrp = 1;
617 if (match_addrp) {
618 address = addr_prop;
619 break;
620 }
621 if (rsize > max_size) {
622 max_size = rsize;
623 address = OF_BAD_ADDR;
624 }
625
626 if (address == OF_BAD_ADDR)
627 address = rstart;
628 }
629 skip_addr:
630 if (address == OF_BAD_ADDR && addr_prop)
631 address = (u64)addr_prop;
632 if (address != OF_BAD_ADDR) {
5bda8f7b
YX		 633#ifdef CONFIG_PCI
634 const __be32 *vidp, *didp;
635 u32 vid, did;
636 struct pci_dev *pdev;
637
638 vidp = of_get_property(dp, "vendor-id", NULL);
639 didp = of_get_property(dp, "device-id", NULL);
640 if (vidp && didp) {
641 vid = be32_to_cpup(vidp);
642 did = be32_to_cpup(didp);
643 pdev = pci_get_device(vid, did, NULL);
644 if (!pdev || pci_enable_device(pdev))
645 return;
646 }
647#endif
73ea6959
BH		 648 /* kludge for valkyrie */
649 if (strcmp(dp->name, "valkyrie") == 0)
650 address += 0x1000;
5c63e407 651 offb_init_fb(no_real_node ? "bootx" : NULL,
73ea6959 652 width, height, depth, pitch, address,
7f29b87a 653 foreign_endian, no_real_node ? NULL : dp);
73ea6959
BH		 654 }
655}
656
657static int __init offb_init(void)
658{
659 struct device_node *dp = NULL, *boot_disp = NULL;
660
661 if (fb_get_options("offb", NULL))
662 return -ENODEV;
663
664 /* Check if we have a MacOS display without a node spec */
40cd3a45 665 if (of_get_property(of_chosen, "linux,bootx-noscreen", NULL) != NULL) {
73ea6959
BH		 666 /* The old code tried to work out which node was the MacOS
667 * display based on the address. I'm dropping that since the
668 * lack of a node spec only happens with old BootX versions
669 * (users can update) and with this code, they'll still get
670 * a display (just not the palette hacks).
671 */
672 offb_init_nodriver(of_chosen, 1);
673 }
674
8d225568 675 for_each_node_by_type(dp, "display") {
40cd3a45
SR		 676 if (of_get_property(dp, "linux,opened", NULL) &&
677 of_get_property(dp, "linux,boot-display", NULL)) {
73ea6959
BH		 678 boot_disp = dp;
679 offb_init_nodriver(dp, 0);
680 }
681 }
8d225568 682 for_each_node_by_type(dp, "display") {
40cd3a45 683 if (of_get_property(dp, "linux,opened", NULL) &&
73ea6959
BH		 684 dp != boot_disp)
685 offb_init_nodriver(dp, 0);
686 }
687
688 return 0;
689}
690
691
1da177e4
LT		 692module_init(offb_init);
693MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)