[linux-block.git] / drivers / video / bw2.c

/* bw2.c: BWTWO frame buffer driver
 *
 * Copyright (C) 2003 David S. Miller (davem@redhat.com)
 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
 *
 * Driver layout based loosely on tgafb.c, see that file for credits.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/fb.h>
#include <linux/mm.h>

#include <asm/io.h>
#include <asm/sbus.h>
#include <asm/oplib.h>
#include <asm/fbio.h>

#ifdef CONFIG_SPARC32
#include <asm/sun4paddr.h>
#endif

#include "sbuslib.h"

/*
 * Local functions.
 */

static int bw2_blank(int, struct fb_info *);

static int bw2_mmap(struct fb_info *, struct vm_area_struct *);
static int bw2_ioctl(struct fb_info *, unsigned int, unsigned long);

/*
 *  Frame buffer operations
 */

static struct fb_ops bw2_ops = {
	.owner			= THIS_MODULE,
	.fb_blank		= bw2_blank,
	.fb_fillrect		= cfb_fillrect,
	.fb_copyarea		= cfb_copyarea,
	.fb_imageblit		= cfb_imageblit,
	.fb_mmap		= bw2_mmap,
	.fb_ioctl		= bw2_ioctl,
#ifdef CONFIG_COMPAT
	.fb_compat_ioctl	= sbusfb_compat_ioctl,
#endif
};

/* OBio addresses for the bwtwo registers */
#define BWTWO_REGISTER_OFFSET 0x400000

struct bt_regs {
	volatile u32 addr;
	volatile u32 color_map;
	volatile u32 control;
	volatile u32 cursor;
};

struct bw2_regs {
	struct bt_regs	cmap;
	volatile u8	control;
	volatile u8	status;
	volatile u8	cursor_start;
	volatile u8	cursor_end;
	volatile u8	h_blank_start;
	volatile u8	h_blank_end;
	volatile u8	h_sync_start;
	volatile u8	h_sync_end;
	volatile u8	comp_sync_end;
	volatile u8	v_blank_start_high;
	volatile u8	v_blank_start_low;
	volatile u8	v_blank_end;
	volatile u8	v_sync_start;
	volatile u8	v_sync_end;
	volatile u8	xfer_holdoff_start;
	volatile u8	xfer_holdoff_end;
};

/* Status Register Constants */
#define BWTWO_SR_RES_MASK	0x70
#define BWTWO_SR_1600_1280	0x50
#define BWTWO_SR_1152_900_76_A	0x40
#define BWTWO_SR_1152_900_76_B	0x60
#define BWTWO_SR_ID_MASK	0x0f
#define BWTWO_SR_ID_MONO	0x02
#define BWTWO_SR_ID_MONO_ECL	0x03
#define BWTWO_SR_ID_MSYNC	0x04
#define BWTWO_SR_ID_NOCONN	0x0a

/* Control Register Constants */
#define BWTWO_CTL_ENABLE_INTS   0x80
#define BWTWO_CTL_ENABLE_VIDEO  0x40
#define BWTWO_CTL_ENABLE_TIMING 0x20
#define BWTWO_CTL_ENABLE_CURCMP 0x10
#define BWTWO_CTL_XTAL_MASK     0x0C
#define BWTWO_CTL_DIVISOR_MASK  0x03

/* Status Register Constants */
#define BWTWO_STAT_PENDING_INT  0x80
#define BWTWO_STAT_MSENSE_MASK  0x70
#define BWTWO_STAT_ID_MASK      0x0f

struct bw2_par {
	spinlock_t		lock;
	struct bw2_regs		__iomem *regs;

	u32			flags;
#define BW2_FLAG_BLANKED	0x00000001

	unsigned long		physbase;
	unsigned long		fbsize;

	struct sbus_dev		*sdev;
};

/**
 *      bw2_blank - Optional function.  Blanks the display.
 *      @blank_mode: the blank mode we want.
 *      @info: frame buffer structure that represents a single frame buffer
 */
static int
bw2_blank(int blank, struct fb_info *info)
{
	struct bw2_par *par = (struct bw2_par *) info->par;
	struct bw2_regs __iomem *regs = par->regs;
	unsigned long flags;
	u8 val;

	spin_lock_irqsave(&par->lock, flags);

	switch (blank) {
	case FB_BLANK_UNBLANK: /* Unblanking */
		val = sbus_readb(&regs->control);
		val |= BWTWO_CTL_ENABLE_VIDEO;
		sbus_writeb(val, &regs->control);
		par->flags &= ~BW2_FLAG_BLANKED;
		break;

	case FB_BLANK_NORMAL: /* Normal blanking */
	case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
	case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
	case FB_BLANK_POWERDOWN: /* Poweroff */
		val = sbus_readb(&regs->control);
		val &= ~BWTWO_CTL_ENABLE_VIDEO;
		sbus_writeb(val, &regs->control);
		par->flags |= BW2_FLAG_BLANKED;
		break;
	}

	spin_unlock_irqrestore(&par->lock, flags);

	return 0;
}

static struct sbus_mmap_map bw2_mmap_map[] = {
	{
		.size = SBUS_MMAP_FBSIZE(1)
	},
	{ .size = 0 }
};

static int bw2_mmap(struct fb_info *info, struct vm_area_struct *vma)
{
	struct bw2_par *par = (struct bw2_par *)info->par;

	return sbusfb_mmap_helper(bw2_mmap_map,
				  par->physbase, par->fbsize,
				  (par->sdev ?
				   par->sdev->reg_addrs[0].which_io :
				   0),
				  vma);
}

static int bw2_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
{
	struct bw2_par *par = (struct bw2_par *) info->par;

	return sbusfb_ioctl_helper(cmd, arg, info,
				   FBTYPE_SUN2BW, 1, par->fbsize);
}

/*
 *  Initialisation
 */

static void
bw2_init_fix(struct fb_info *info, int linebytes)
{
	strlcpy(info->fix.id, "bwtwo", sizeof(info->fix.id));

	info->fix.type = FB_TYPE_PACKED_PIXELS;
	info->fix.visual = FB_VISUAL_MONO01;

	info->fix.line_length = linebytes;

	info->fix.accel = FB_ACCEL_SUN_BWTWO;
}

static u8 bw2regs_1600[] __initdata = {
	0x14, 0x8b,	0x15, 0x28,	0x16, 0x03,	0x17, 0x13,
	0x18, 0x7b,	0x19, 0x05,	0x1a, 0x34,	0x1b, 0x2e,
	0x1c, 0x00,	0x1d, 0x0a,	0x1e, 0xff,	0x1f, 0x01,
	0x10, 0x21,	0
};

static u8 bw2regs_ecl[] __initdata = {
	0x14, 0x65,	0x15, 0x1e,	0x16, 0x04,	0x17, 0x0c,
	0x18, 0x5e,	0x19, 0x03,	0x1a, 0xa7,	0x1b, 0x23,
	0x1c, 0x00,	0x1d, 0x08,	0x1e, 0xff,	0x1f, 0x01,
	0x10, 0x20,	0
};

static u8 bw2regs_analog[] __initdata = {
	0x14, 0xbb,	0x15, 0x2b,	0x16, 0x03,	0x17, 0x13,
	0x18, 0xb0,	0x19, 0x03,	0x1a, 0xa6,	0x1b, 0x22,
	0x1c, 0x01,	0x1d, 0x05,	0x1e, 0xff,	0x1f, 0x01,
	0x10, 0x20,	0
};

static u8 bw2regs_76hz[] __initdata = {
	0x14, 0xb7,	0x15, 0x27,	0x16, 0x03,	0x17, 0x0f,
	0x18, 0xae,	0x19, 0x03,	0x1a, 0xae,	0x1b, 0x2a,
	0x1c, 0x01,	0x1d, 0x09,	0x1e, 0xff,	0x1f, 0x01,
	0x10, 0x24,	0
};

static u8 bw2regs_66hz[] __initdata = {
	0x14, 0xbb,	0x15, 0x2b,	0x16, 0x04,	0x17, 0x14,
	0x18, 0xae,	0x19, 0x03,	0x1a, 0xa8,	0x1b, 0x24,
	0x1c, 0x01,	0x1d, 0x05,	0x1e, 0xff,	0x1f, 0x01,
	0x10, 0x20,	0
};

static void bw2_do_default_mode(struct bw2_par *par, struct fb_info *info,
				int *linebytes)
{
	u8 status, mon;
	u8 *p;

	status = sbus_readb(&par->regs->status);
	mon = status & BWTWO_SR_RES_MASK;
	switch (status & BWTWO_SR_ID_MASK) {
	case BWTWO_SR_ID_MONO_ECL:
		if (mon == BWTWO_SR_1600_1280) {
			p = bw2regs_1600;
			info->var.xres = info->var.xres_virtual = 1600;
			info->var.yres = info->var.yres_virtual = 1280;
			*linebytes = 1600 / 8;
		} else
			p = bw2regs_ecl;
		break;

	case BWTWO_SR_ID_MONO:
		p = bw2regs_analog;
		break;

	case BWTWO_SR_ID_MSYNC:
		if (mon == BWTWO_SR_1152_900_76_A ||
		    mon == BWTWO_SR_1152_900_76_B)
			p = bw2regs_76hz;
		else
			p = bw2regs_66hz;
		break;

	case BWTWO_SR_ID_NOCONN:
		return;

	default:
		prom_printf("bw2: can't handle SR %02x\n",
			    status);
		prom_halt();
	}
	for ( ; *p; p += 2) {
		u8 __iomem *regp = &((u8 __iomem *)par->regs)[p[0]];
		sbus_writeb(p[1], regp);
	}
}

struct all_info {
	struct fb_info info;
	struct bw2_par par;
	struct list_head list;
};
static LIST_HEAD(bw2_list);

static void bw2_init_one(struct sbus_dev *sdev)
{
	struct all_info *all;
	struct resource *resp;
#ifdef CONFIG_SUN4
	struct resource res;
#endif
	int linebytes;

	all = kmalloc(sizeof(*all), GFP_KERNEL);
	if (!all) {
		printk(KERN_ERR "bw2: Cannot allocate memory.\n");
		return;
	}
	memset(all, 0, sizeof(*all));

	INIT_LIST_HEAD(&all->list);

	spin_lock_init(&all->par.lock);
	all->par.sdev = sdev;

#ifdef CONFIG_SUN4
	if (!sdev) {
		all->par.physbase = sun4_bwtwo_physaddr;
		res.start = sun4_bwtwo_physaddr;
		res.end = res.start + BWTWO_REGISTER_OFFSET + sizeof(struct bw2_regs) - 1;
		res.flags = IORESOURCE_IO;
		resp = &res;
		all->info.var.xres = all->info.var.xres_virtual = 1152;
		all->info.var.yres = all->info.var.yres_virtual = 900;
		all->info.var.bits_per_pixel = 1;
		linebytes = 1152 / 8;
	} else
#else
	{
		BUG_ON(!sdev);
		all->par.physbase = sdev->reg_addrs[0].phys_addr;
		resp = &sdev->resource[0];
		sbusfb_fill_var(&all->info.var, (sdev ? sdev->prom_node : 0), 1);
		linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
					       all->info.var.xres);
	}
#endif
	all->info.var.red.length = all->info.var.green.length =
		all->info.var.blue.length = all->info.var.bits_per_pixel;
	all->info.var.red.offset = all->info.var.green.offset =
		all->info.var.blue.offset = 0;

	all->par.regs = sbus_ioremap(resp, BWTWO_REGISTER_OFFSET,
			     sizeof(struct bw2_regs), "bw2 regs");

	if (sdev && !prom_getbool(sdev->prom_node, "width"))
		bw2_do_default_mode(&all->par, &all->info, &linebytes);

	all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);

	all->info.flags = FBINFO_DEFAULT;
	all->info.fbops = &bw2_ops;
#if defined(CONFIG_SPARC32)
	if (sdev)
		all->info.screen_base = (char __iomem *)
			prom_getintdefault(sdev->prom_node, "address", 0);
#endif
	if (!all->info.screen_base)
		all->info.screen_base =
			sbus_ioremap(resp, 0, all->par.fbsize, "bw2 ram");
	all->info.par = &all->par;

	bw2_blank(0, &all->info);

	bw2_init_fix(&all->info, linebytes);

	if (register_framebuffer(&all->info) < 0) {
		printk(KERN_ERR "bw2: Could not register framebuffer.\n");
		kfree(all);
		return;
	}

	list_add(&all->list, &bw2_list);

	printk("bw2: bwtwo at %lx:%lx\n",
	       (long) (sdev ? sdev->reg_addrs[0].which_io : 0),
	       (long) all->par.physbase);
}

int __init bw2_init(void)
{
	struct sbus_bus *sbus;
	struct sbus_dev *sdev;

	if (fb_get_options("bw2fb", NULL))
		return -ENODEV;

#ifdef CONFIG_SUN4
	bw2_init_one(NULL);
#endif
	for_all_sbusdev(sdev, sbus) {
		if (!strcmp(sdev->prom_name, "bwtwo"))
			bw2_init_one(sdev);
	}

	return 0;
}

void __exit bw2_exit(void)
{
	struct list_head *pos, *tmp;

	list_for_each_safe(pos, tmp, &bw2_list) {
		struct all_info *all = list_entry(pos, typeof(*all), list);

		unregister_framebuffer(&all->info);
		kfree(all);
	}
}

int __init
bw2_setup(char *arg)
{
	/* No cmdline options yet... */
	return 0;
}

module_init(bw2_init);

#ifdef MODULE
module_exit(bw2_exit);
#endif

MODULE_DESCRIPTION("framebuffer driver for BWTWO chipsets");
MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4 LT	1	/* bw2.c: BWTWO frame buffer driver
	2	*
	3	* Copyright (C) 2003 David S. Miller (davem@redhat.com)
	4	* Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
	5	* Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
	6	* Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
	7	*
	8	* Driver layout based loosely on tgafb.c, see that file for credits.
	9	*/
	10
	11	#include <linux/module.h>
	12	#include <linux/kernel.h>
	13	#include <linux/errno.h>
	14	#include <linux/string.h>
	15	#include <linux/slab.h>
	16	#include <linux/delay.h>
	17	#include <linux/init.h>
	18	#include <linux/fb.h>
	19	#include <linux/mm.h>
	20
	21	#include <asm/io.h>
	22	#include <asm/sbus.h>
	23	#include <asm/oplib.h>
	24	#include <asm/fbio.h>
	25
	26	#ifdef CONFIG_SPARC32
	27	#include <asm/sun4paddr.h>
	28	#endif
	29
	30	#include "sbuslib.h"
	31
	32	/*
	33	* Local functions.
	34	*/
	35
	36	static int bw2_blank(int, struct fb_info *);
	37
216d526c	38	static int bw2_mmap(struct fb_info , struct vm_area_struct );
67a6680d	39	static int bw2_ioctl(struct fb_info *, unsigned int, unsigned long);
1da177e4 LT	40
	41	/*
	42	* Frame buffer operations
	43	*/
	44
	45	static struct fb_ops bw2_ops = {
	46	.owner = THIS_MODULE,
	47	.fb_blank = bw2_blank,
	48	.fb_fillrect = cfb_fillrect,
	49	.fb_copyarea = cfb_copyarea,
	50	.fb_imageblit = cfb_imageblit,
	51	.fb_mmap = bw2_mmap,
	52	.fb_ioctl = bw2_ioctl,
9ffb83bc CH	53	#ifdef CONFIG_COMPAT
	54	.fb_compat_ioctl = sbusfb_compat_ioctl,
	55	#endif
1da177e4 LT	56	};
	57
	58	/* OBio addresses for the bwtwo registers */
	59	#define BWTWO_REGISTER_OFFSET 0x400000
	60
	61	struct bt_regs {
	62	volatile u32 addr;
	63	volatile u32 color_map;
	64	volatile u32 control;
	65	volatile u32 cursor;
	66	};
	67
	68	struct bw2_regs {
	69	struct bt_regs cmap;
	70	volatile u8 control;
	71	volatile u8 status;
	72	volatile u8 cursor_start;
	73	volatile u8 cursor_end;
	74	volatile u8 h_blank_start;
	75	volatile u8 h_blank_end;
	76	volatile u8 h_sync_start;
	77	volatile u8 h_sync_end;
	78	volatile u8 comp_sync_end;
	79	volatile u8 v_blank_start_high;
	80	volatile u8 v_blank_start_low;
	81	volatile u8 v_blank_end;
	82	volatile u8 v_sync_start;
	83	volatile u8 v_sync_end;
	84	volatile u8 xfer_holdoff_start;
	85	volatile u8 xfer_holdoff_end;
	86	};
	87
	88	/* Status Register Constants */
	89	#define BWTWO_SR_RES_MASK 0x70
	90	#define BWTWO_SR_1600_1280 0x50
	91	#define BWTWO_SR_1152_900_76_A 0x40
	92	#define BWTWO_SR_1152_900_76_B 0x60
	93	#define BWTWO_SR_ID_MASK 0x0f
	94	#define BWTWO_SR_ID_MONO 0x02
	95	#define BWTWO_SR_ID_MONO_ECL 0x03
	96	#define BWTWO_SR_ID_MSYNC 0x04
	97	#define BWTWO_SR_ID_NOCONN 0x0a
	98
	99	/* Control Register Constants */
	100	#define BWTWO_CTL_ENABLE_INTS 0x80
	101	#define BWTWO_CTL_ENABLE_VIDEO 0x40
	102	#define BWTWO_CTL_ENABLE_TIMING 0x20
	103	#define BWTWO_CTL_ENABLE_CURCMP 0x10
	104	#define BWTWO_CTL_XTAL_MASK 0x0C
	105	#define BWTWO_CTL_DIVISOR_MASK 0x03
	106
	107	/* Status Register Constants */
	108	#define BWTWO_STAT_PENDING_INT 0x80
	109	#define BWTWO_STAT_MSENSE_MASK 0x70
	110	#define BWTWO_STAT_ID_MASK 0x0f
	111
	112	struct bw2_par {
	113	spinlock_t lock;
	114	struct bw2_regs __iomem *regs;
	115
	116	u32 flags;
	117	#define BW2_FLAG_BLANKED 0x00000001
	118
	119	unsigned long physbase;
120	unsigned long fbsize;
121
122	struct sbus_dev *sdev;
1da177e4 LT	123	};
	124
	125	/**
	126	* bw2_blank - Optional function. Blanks the display.
	127	* @blank_mode: the blank mode we want.
	128	* @info: frame buffer structure that represents a single frame buffer
	129	*/
	130	static int
	131	bw2_blank(int blank, struct fb_info *info)
	132	{
	133	struct bw2_par par = (struct bw2_par ) info->par;
	134	struct bw2_regs __iomem *regs = par->regs;
	135	unsigned long flags;
	136	u8 val;
	137
	138	spin_lock_irqsave(&par->lock, flags);
	139
	140	switch (blank) {
	141	case FB_BLANK_UNBLANK: /* Unblanking */
	142	val = sbus_readb(&regs->control);
	143	val \|= BWTWO_CTL_ENABLE_VIDEO;
	144	sbus_writeb(val, &regs->control);
	145	par->flags &= ~BW2_FLAG_BLANKED;
	146	break;
	147
	148	case FB_BLANK_NORMAL: /* Normal blanking */
	149	case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
	150	case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
	151	case FB_BLANK_POWERDOWN: /* Poweroff */
	152	val = sbus_readb(&regs->control);
	153	val &= ~BWTWO_CTL_ENABLE_VIDEO;
	154	sbus_writeb(val, &regs->control);
	155	par->flags \|= BW2_FLAG_BLANKED;
	156	break;
	157	}
	158
	159	spin_unlock_irqrestore(&par->lock, flags);
	160
	161	return 0;
	162	}
	163
	164	static struct sbus_mmap_map bw2_mmap_map[] = {
	165	{
	166	.size = SBUS_MMAP_FBSIZE(1)
	167	},
	168	{ .size = 0 }
	169	};
	170
216d526c	171	static int bw2_mmap(struct fb_info info, struct vm_area_struct vma)
1da177e4 LT	172	{
	173	struct bw2_par par = (struct bw2_par )info->par;
	174
	175	return sbusfb_mmap_helper(bw2_mmap_map,
	176	par->physbase, par->fbsize,
	177	(par->sdev ?
	178	par->sdev->reg_addrs[0].which_io :
	179	0),
	180	vma);
	181	}
	182
67a6680d	183	static int bw2_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
1da177e4 LT	184	{
	185	struct bw2_par par = (struct bw2_par ) info->par;
	186
	187	return sbusfb_ioctl_helper(cmd, arg, info,
	188	FBTYPE_SUN2BW, 1, par->fbsize);
	189	}
	190
	191	/*
	192	* Initialisation
	193	*/
	194
	195	static void
	196	bw2_init_fix(struct fb_info *info, int linebytes)
	197	{
	198	strlcpy(info->fix.id, "bwtwo", sizeof(info->fix.id));
	199
	200	info->fix.type = FB_TYPE_PACKED_PIXELS;
	201	info->fix.visual = FB_VISUAL_MONO01;
	202
	203	info->fix.line_length = linebytes;
	204
	205	info->fix.accel = FB_ACCEL_SUN_BWTWO;
	206	}
	207
	208	static u8 bw2regs_1600[] __initdata = {
	209	0x14, 0x8b, 0x15, 0x28, 0x16, 0x03, 0x17, 0x13,
	210	0x18, 0x7b, 0x19, 0x05, 0x1a, 0x34, 0x1b, 0x2e,
	211	0x1c, 0x00, 0x1d, 0x0a, 0x1e, 0xff, 0x1f, 0x01,
	212	0x10, 0x21, 0
	213	};
	214
	215	static u8 bw2regs_ecl[] __initdata = {
	216	0x14, 0x65, 0x15, 0x1e, 0x16, 0x04, 0x17, 0x0c,
	217	0x18, 0x5e, 0x19, 0x03, 0x1a, 0xa7, 0x1b, 0x23,
	218	0x1c, 0x00, 0x1d, 0x08, 0x1e, 0xff, 0x1f, 0x01,
	219	0x10, 0x20, 0
	220	};
	221
	222	static u8 bw2regs_analog[] __initdata = {
	223	0x14, 0xbb, 0x15, 0x2b, 0x16, 0x03, 0x17, 0x13,
	224	0x18, 0xb0, 0x19, 0x03, 0x1a, 0xa6, 0x1b, 0x22,
	225	0x1c, 0x01, 0x1d, 0x05, 0x1e, 0xff, 0x1f, 0x01,
	226	0x10, 0x20, 0
	227	};
	228
	229	static u8 bw2regs_76hz[] __initdata = {
	230	0x14, 0xb7, 0x15, 0x27, 0x16, 0x03, 0x17, 0x0f,
	231	0x18, 0xae, 0x19, 0x03, 0x1a, 0xae, 0x1b, 0x2a,
	232	0x1c, 0x01, 0x1d, 0x09, 0x1e, 0xff, 0x1f, 0x01,
	233	0x10, 0x24, 0
	234	};
	235
	236	static u8 bw2regs_66hz[] __initdata = {
	237	0x14, 0xbb, 0x15, 0x2b, 0x16, 0x04, 0x17, 0x14,
	238	0x18, 0xae, 0x19, 0x03, 0x1a, 0xa8, 0x1b, 0x24,
	239	0x1c, 0x01, 0x1d, 0x05, 0x1e, 0xff, 0x1f, 0x01,
	240	0x10, 0x20, 0
	241	};
	242
	243	static void bw2_do_default_mode(struct bw2_par par, struct fb_info info,
	244	int *linebytes)
	245	{
	246	u8 status, mon;
	247	u8 *p;
248
249	status = sbus_readb(&par->regs->status);
250	mon = status & BWTWO_SR_RES_MASK;
251	switch (status & BWTWO_SR_ID_MASK) {
252	case BWTWO_SR_ID_MONO_ECL:
253	if (mon == BWTWO_SR_1600_1280) {
254	p = bw2regs_1600;
255	info->var.xres = info->var.xres_virtual = 1600;
256	info->var.yres = info->var.yres_virtual = 1280;
257	*linebytes = 1600 / 8;
258	} else
259	p = bw2regs_ecl;
260	break;
261
262	case BWTWO_SR_ID_MONO:
263	p = bw2regs_analog;
264	break;
265
266	case BWTWO_SR_ID_MSYNC:
267	if (mon == BWTWO_SR_1152_900_76_A \|\|
268	mon == BWTWO_SR_1152_900_76_B)
269	p = bw2regs_76hz;
270	else
271	p = bw2regs_66hz;
272	break;
273
274	case BWTWO_SR_ID_NOCONN:
275	return;
276
277	default:
278	prom_printf("bw2: can't handle SR %02x\n",
279	status);
280	prom_halt();
281	}
282	for ( ; *p; p += 2) {
283	u8 __iomem regp = &((u8 __iomem )par->regs)[p[0]];
284	sbus_writeb(p[1], regp);
285	}
286	}
287
288	struct all_info {
289	struct fb_info info;
290	struct bw2_par par;
291	struct list_head list;
292	};
293	static LIST_HEAD(bw2_list);
294
295	static void bw2_init_one(struct sbus_dev *sdev)
296	{
297	struct all_info *all;
298	struct resource *resp;
299	#ifdef CONFIG_SUN4
300	struct resource res;
301	#endif
302	int linebytes;
303
304	all = kmalloc(sizeof(*all), GFP_KERNEL);
305	if (!all) {
306	printk(KERN_ERR "bw2: Cannot allocate memory.\n");
307	return;
308	}
309	memset(all, 0, sizeof(*all));
310
311	INIT_LIST_HEAD(&all->list);
312
313	spin_lock_init(&all->par.lock);
314	all->par.sdev = sdev;
315
316	#ifdef CONFIG_SUN4
317	if (!sdev) {
318	all->par.physbase = sun4_bwtwo_physaddr;
319	res.start = sun4_bwtwo_physaddr;
320	res.end = res.start + BWTWO_REGISTER_OFFSET + sizeof(struct bw2_regs) - 1;
321	res.flags = IORESOURCE_IO;
322	resp = &res;
323	all->info.var.xres = all->info.var.xres_virtual = 1152;
324	all->info.var.yres = all->info.var.yres_virtual = 900;
325	all->info.var.bits_per_pixel = 1;
326	linebytes = 1152 / 8;
327	} else
328	#else
329	{
232443e2	330	BUG_ON(!sdev);
1da177e4 LT	331	all->par.physbase = sdev->reg_addrs[0].phys_addr;
	332	resp = &sdev->resource[0];
	333	sbusfb_fill_var(&all->info.var, (sdev ? sdev->prom_node : 0), 1);
	334	linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
	335	all->info.var.xres);
	336	}
	337	#endif
	338	all->info.var.red.length = all->info.var.green.length =
	339	all->info.var.blue.length = all->info.var.bits_per_pixel;
	340	all->info.var.red.offset = all->info.var.green.offset =
	341	all->info.var.blue.offset = 0;
	342
	343	all->par.regs = sbus_ioremap(resp, BWTWO_REGISTER_OFFSET,
	344	sizeof(struct bw2_regs), "bw2 regs");
	345
	346	if (sdev && !prom_getbool(sdev->prom_node, "width"))
	347	bw2_do_default_mode(&all->par, &all->info, &linebytes);
	348
	349	all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
	350
	351	all->info.flags = FBINFO_DEFAULT;
	352	all->info.fbops = &bw2_ops;
	353	#if defined(CONFIG_SPARC32)
	354	if (sdev)
	355	all->info.screen_base = (char __iomem *)
	356	prom_getintdefault(sdev->prom_node, "address", 0);
	357	#endif
	358	if (!all->info.screen_base)
	359	all->info.screen_base =
	360	sbus_ioremap(resp, 0, all->par.fbsize, "bw2 ram");
	361	all->info.par = &all->par;
	362
	363	bw2_blank(0, &all->info);
	364
	365	bw2_init_fix(&all->info, linebytes);
	366
	367	if (register_framebuffer(&all->info) < 0) {
	368	printk(KERN_ERR "bw2: Could not register framebuffer.\n");
	369	kfree(all);
	370	return;
	371	}
	372
	373	list_add(&all->list, &bw2_list);
	374
	375	printk("bw2: bwtwo at %lx:%lx\n",
	376	(long) (sdev ? sdev->reg_addrs[0].which_io : 0),
	377	(long) all->par.physbase);
	378	}
	379
	380	int __init bw2_init(void)
	381	{
	382	struct sbus_bus *sbus;
	383	struct sbus_dev *sdev;
	384
	385	if (fb_get_options("bw2fb", NULL))
	386	return -ENODEV;
	387
	388	#ifdef CONFIG_SUN4
	389	bw2_init_one(NULL);
	390	#endif
	391	for_all_sbusdev(sdev, sbus) {
	392	if (!strcmp(sdev->prom_name, "bwtwo"))
	393	bw2_init_one(sdev);
	394	}
395
396	return 0;
397	}
398
399	void __exit bw2_exit(void)
400	{
401	struct list_head pos, tmp;
402
403	list_for_each_safe(pos, tmp, &bw2_list) {
404	struct all_info all = list_entry(pos, typeof(all), list);
405
406	unregister_framebuffer(&all->info);
407	kfree(all);
408	}
409	}
410
411	int __init
412	bw2_setup(char *arg)
413	{
414	/* No cmdline options yet... */
415	return 0;
416	}
417
418	module_init(bw2_init);
419
420	#ifdef MODULE
421	module_exit(bw2_exit);
422	#endif
423
424	MODULE_DESCRIPTION("framebuffer driver for BWTWO chipsets");
425	MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
426	MODULE_LICENSE("GPL");