[linux-block.git] / drivers / vfio / pci / vfio_pci_private.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (C) 2012 Red Hat, Inc.  All rights reserved.
 *     Author: Alex Williamson <alex.williamson@redhat.com>
 *
 * Derived from original vfio:
 * Copyright 2010 Cisco Systems, Inc.  All rights reserved.
 * Author: Tom Lyon, pugs@cisco.com
 */

#include <linux/mutex.h>
#include <linux/pci.h>
#include <linux/irqbypass.h>
#include <linux/types.h>
#include <linux/uuid.h>

#ifndef VFIO_PCI_PRIVATE_H
#define VFIO_PCI_PRIVATE_H

#define VFIO_PCI_OFFSET_SHIFT   40

#define VFIO_PCI_OFFSET_TO_INDEX(off)	(off >> VFIO_PCI_OFFSET_SHIFT)
#define VFIO_PCI_INDEX_TO_OFFSET(index)	((u64)(index) << VFIO_PCI_OFFSET_SHIFT)
#define VFIO_PCI_OFFSET_MASK	(((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1)

/* Special capability IDs predefined access */
#define PCI_CAP_ID_INVALID		0xFF	/* default raw access */
#define PCI_CAP_ID_INVALID_VIRT		0xFE	/* default virt access */

/* Cap maximum number of ioeventfds per device (arbitrary) */
#define VFIO_PCI_IOEVENTFD_MAX		1000

struct vfio_pci_ioeventfd {
	struct list_head	next;
	struct virqfd		*virqfd;
	void __iomem		*addr;
	uint64_t		data;
	loff_t			pos;
	int			bar;
	int			count;
};

struct vfio_pci_irq_ctx {
	struct eventfd_ctx	*trigger;
	struct virqfd		*unmask;
	struct virqfd		*mask;
	char			*name;
	bool			masked;
	struct irq_bypass_producer	producer;
};

struct vfio_pci_device;
struct vfio_pci_region;

struct vfio_pci_regops {
	size_t	(*rw)(struct vfio_pci_device *vdev, char __user *buf,
		      size_t count, loff_t *ppos, bool iswrite);
	void	(*release)(struct vfio_pci_device *vdev,
			   struct vfio_pci_region *region);
	int	(*mmap)(struct vfio_pci_device *vdev,
			struct vfio_pci_region *region,
			struct vm_area_struct *vma);
	int	(*add_capability)(struct vfio_pci_device *vdev,
				  struct vfio_pci_region *region,
				  struct vfio_info_cap *caps);
};

struct vfio_pci_region {
	u32				type;
	u32				subtype;
	const struct vfio_pci_regops	*ops;
	void				*data;
	size_t				size;
	u32				flags;
};

struct vfio_pci_dummy_resource {
	struct resource		resource;
	int			index;
	struct list_head	res_next;
};

struct vfio_pci_reflck {
	struct kref		kref;
	struct mutex		lock;
};

struct vfio_pci_vf_token {
	struct mutex		lock;
	uuid_t			uuid;
	int			users;
};

struct vfio_pci_device {
	struct pci_dev		*pdev;
	void __iomem		*barmap[PCI_STD_NUM_BARS];
	bool			bar_mmap_supported[PCI_STD_NUM_BARS];
	u8			*pci_config_map;
	u8			*vconfig;
	struct perm_bits	*msi_perm;
	spinlock_t		irqlock;
	struct mutex		igate;
	struct vfio_pci_irq_ctx	*ctx;
	int			num_ctx;
	int			irq_type;
	int			num_regions;
	struct vfio_pci_region	*region;
	u8			msi_qmax;
	u8			msix_bar;
	u16			msix_size;
	u32			msix_offset;
	u32			rbar[7];
	bool			pci_2_3;
	bool			virq_disabled;
	bool			reset_works;
	bool			extended_caps;
	bool			bardirty;
	bool			has_vga;
	bool			needs_reset;
	bool			nointx;
	bool			needs_pm_restore;
	struct pci_saved_state	*pci_saved_state;
	struct pci_saved_state	*pm_save;
	struct vfio_pci_reflck	*reflck;
	int			refcnt;
	int			ioeventfds_nr;
	struct eventfd_ctx	*err_trigger;
	struct eventfd_ctx	*req_trigger;
	struct list_head	dummy_resources_list;
	struct mutex		ioeventfds_lock;
	struct list_head	ioeventfds_list;
	struct vfio_pci_vf_token	*vf_token;
};

#define is_intx(vdev) (vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX)
#define is_msi(vdev) (vdev->irq_type == VFIO_PCI_MSI_IRQ_INDEX)
#define is_msix(vdev) (vdev->irq_type == VFIO_PCI_MSIX_IRQ_INDEX)
#define is_irq_none(vdev) (!(is_intx(vdev) || is_msi(vdev) || is_msix(vdev)))
#define irq_is(vdev, type) (vdev->irq_type == type)

extern void vfio_pci_intx_mask(struct vfio_pci_device *vdev);
extern void vfio_pci_intx_unmask(struct vfio_pci_device *vdev);

extern int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev,
				   uint32_t flags, unsigned index,
				   unsigned start, unsigned count, void *data);

extern ssize_t vfio_pci_config_rw(struct vfio_pci_device *vdev,
				  char __user *buf, size_t count,
				  loff_t *ppos, bool iswrite);

extern ssize_t vfio_pci_bar_rw(struct vfio_pci_device *vdev, char __user *buf,
			       size_t count, loff_t *ppos, bool iswrite);

extern ssize_t vfio_pci_vga_rw(struct vfio_pci_device *vdev, char __user *buf,
			       size_t count, loff_t *ppos, bool iswrite);

extern long vfio_pci_ioeventfd(struct vfio_pci_device *vdev, loff_t offset,
			       uint64_t data, int count, int fd);

extern int vfio_pci_init_perm_bits(void);
extern void vfio_pci_uninit_perm_bits(void);

extern int vfio_config_init(struct vfio_pci_device *vdev);
extern void vfio_config_free(struct vfio_pci_device *vdev);

extern int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
					unsigned int type, unsigned int subtype,
					const struct vfio_pci_regops *ops,
					size_t size, u32 flags, void *data);

extern int vfio_pci_set_power_state(struct vfio_pci_device *vdev,
				    pci_power_t state);

#ifdef CONFIG_VFIO_PCI_IGD
extern int vfio_pci_igd_init(struct vfio_pci_device *vdev);
#else
static inline int vfio_pci_igd_init(struct vfio_pci_device *vdev)
{
	return -ENODEV;
}
#endif
#ifdef CONFIG_VFIO_PCI_NVLINK2
extern int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev);
extern int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev);
#else
static inline int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev)
{
	return -ENODEV;
}

static inline int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev)
{
	return -ENODEV;
}
#endif
#endif /* VFIO_PCI_PRIVATE_H */
Commit	Line	Data
d2912cb1	1	/* SPDX-License-Identifier: GPL-2.0-only */
89e1f7d4 AW	2	/*
	3	* Copyright (C) 2012 Red Hat, Inc. All rights reserved.
	4	* Author: Alex Williamson <alex.williamson@redhat.com>
	5	*
89e1f7d4 AW	6	* Derived from original vfio:
	7	* Copyright 2010 Cisco Systems, Inc. All rights reserved.
	8	* Author: Tom Lyon, pugs@cisco.com
	9	*/
	10
	11	#include <linux/mutex.h>
	12	#include <linux/pci.h>
6d7425f1	13	#include <linux/irqbypass.h>
28541d41	14	#include <linux/types.h>
cc20d799	15	#include <linux/uuid.h>
89e1f7d4 AW	16
	17	#ifndef VFIO_PCI_PRIVATE_H
	18	#define VFIO_PCI_PRIVATE_H
	19
	20	#define VFIO_PCI_OFFSET_SHIFT 40
	21
	22	#define VFIO_PCI_OFFSET_TO_INDEX(off) (off >> VFIO_PCI_OFFSET_SHIFT)
	23	#define VFIO_PCI_INDEX_TO_OFFSET(index) ((u64)(index) << VFIO_PCI_OFFSET_SHIFT)
	24	#define VFIO_PCI_OFFSET_MASK (((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1)
	25
345d7104 AW	26	/* Special capability IDs predefined access */
	27	#define PCI_CAP_ID_INVALID 0xFF /* default raw access */
	28	#define PCI_CAP_ID_INVALID_VIRT 0xFE /* default virt access */
	29
30656177 AW	30	/* Cap maximum number of ioeventfds per device (arbitrary) */
	31	#define VFIO_PCI_IOEVENTFD_MAX 1000
	32
	33	struct vfio_pci_ioeventfd {
	34	struct list_head next;
	35	struct virqfd *virqfd;
	36	void __iomem *addr;
	37	uint64_t data;
	38	loff_t pos;
	39	int bar;
	40	int count;
	41	};
	42
89e1f7d4 AW	43	struct vfio_pci_irq_ctx {
	44	struct eventfd_ctx *trigger;
	45	struct virqfd *unmask;
	46	struct virqfd *mask;
	47	char *name;
	48	bool masked;
6d7425f1	49	struct irq_bypass_producer producer;
89e1f7d4 AW	50	};
89e1f7d4 AW	51
28541d41 AW	52	struct vfio_pci_device;
	53	struct vfio_pci_region;
	54
	55	struct vfio_pci_regops {
	56	size_t (rw)(struct vfio_pci_device vdev, char __user *buf,
	57	size_t count, loff_t *ppos, bool iswrite);
	58	void (release)(struct vfio_pci_device vdev,
	59	struct vfio_pci_region *region);
a15b1883 AK	60	int (mmap)(struct vfio_pci_device vdev,
	61	struct vfio_pci_region *region,
	62	struct vm_area_struct *vma);
c2c0f1cd AK	63	int (add_capability)(struct vfio_pci_device vdev,
	64	struct vfio_pci_region *region,
	65	struct vfio_info_cap *caps);
28541d41 AW	66	};
	67
	68	struct vfio_pci_region {
	69	u32 type;
	70	u32 subtype;
	71	const struct vfio_pci_regops *ops;
	72	void *data;
	73	size_t size;
	74	u32 flags;
	75	};
	76
05f0c03f YX	77	struct vfio_pci_dummy_resource {
	78	struct resource resource;
	79	int index;
	80	struct list_head res_next;
	81	};
	82
e309df5b AW	83	struct vfio_pci_reflck {
	84	struct kref kref;
	85	struct mutex lock;
	86	};
	87
cc20d799 AW	88	struct vfio_pci_vf_token {
	89	struct mutex lock;
	90	uuid_t uuid;
	91	int users;
	92	};
	93
89e1f7d4 AW	94	struct vfio_pci_device {
89e1f7d4 AW	95	struct pci_dev *pdev;
c9c13ba4 DE	96	void __iomem *barmap[PCI_STD_NUM_BARS];
c9c13ba4 DE	97	bool bar_mmap_supported[PCI_STD_NUM_BARS];
89e1f7d4 AW	98	u8 *pci_config_map;
	99	u8 *vconfig;
	100	struct perm_bits *msi_perm;
	101	spinlock_t irqlock;
	102	struct mutex igate;
89e1f7d4 AW	103	struct vfio_pci_irq_ctx *ctx;
	104	int num_ctx;
	105	int irq_type;
28541d41 AW	106	int num_regions;
28541d41 AW	107	struct vfio_pci_region *region;
89e1f7d4 AW	108	u8 msi_qmax;
	109	u8 msix_bar;
	110	u16 msix_size;
	111	u32 msix_offset;
	112	u32 rbar[7];
	113	bool pci_2_3;
	114	bool virq_disabled;
	115	bool reset_works;
	116	bool extended_caps;
	117	bool bardirty;
84237a82	118	bool has_vga;
bc4fba77	119	bool needs_reset;
45074405	120	bool nointx;
51ef3a00	121	bool needs_pm_restore;
89e1f7d4	122	struct pci_saved_state *pci_saved_state;
51ef3a00	123	struct pci_saved_state *pm_save;
e309df5b	124	struct vfio_pci_reflck *reflck;
61d79256	125	int refcnt;
30656177	126	int ioeventfds_nr;
dad9f897	127	struct eventfd_ctx *err_trigger;
6140a8f5	128	struct eventfd_ctx *req_trigger;
05f0c03f	129	struct list_head dummy_resources_list;
30656177 AW	130	struct mutex ioeventfds_lock;
30656177 AW	131	struct list_head ioeventfds_list;
cc20d799	132	struct vfio_pci_vf_token *vf_token;
89e1f7d4 AW	133	};
	134
	135	#define is_intx(vdev) (vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX)
	136	#define is_msi(vdev) (vdev->irq_type == VFIO_PCI_MSI_IRQ_INDEX)
	137	#define is_msix(vdev) (vdev->irq_type == VFIO_PCI_MSIX_IRQ_INDEX)
	138	#define is_irq_none(vdev) (!(is_intx(vdev) \|\| is_msi(vdev) \|\| is_msix(vdev)))
	139	#define irq_is(vdev, type) (vdev->irq_type == type)
	140
	141	extern void vfio_pci_intx_mask(struct vfio_pci_device *vdev);
	142	extern void vfio_pci_intx_unmask(struct vfio_pci_device *vdev);
	143
	144	extern int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev,
	145	uint32_t flags, unsigned index,
	146	unsigned start, unsigned count, void *data);
	147
906ee99d AW	148	extern ssize_t vfio_pci_config_rw(struct vfio_pci_device *vdev,
	149	char __user *buf, size_t count,
	150	loff_t *ppos, bool iswrite);
	151
	152	extern ssize_t vfio_pci_bar_rw(struct vfio_pci_device vdev, char __user buf,
	153	size_t count, loff_t *ppos, bool iswrite);
89e1f7d4	154
84237a82 AW	155	extern ssize_t vfio_pci_vga_rw(struct vfio_pci_device vdev, char __user buf,
	156	size_t count, loff_t *ppos, bool iswrite);
	157
30656177 AW	158	extern long vfio_pci_ioeventfd(struct vfio_pci_device *vdev, loff_t offset,
	159	uint64_t data, int count, int fd);
	160
89e1f7d4 AW	161	extern int vfio_pci_init_perm_bits(void);
	162	extern void vfio_pci_uninit_perm_bits(void);
	163
89e1f7d4 AW	164	extern int vfio_config_init(struct vfio_pci_device *vdev);
89e1f7d4 AW	165	extern void vfio_config_free(struct vfio_pci_device *vdev);
28541d41 AW	166
	167	extern int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
	168	unsigned int type, unsigned int subtype,
	169	const struct vfio_pci_regops *ops,
	170	size_t size, u32 flags, void *data);
51ef3a00 AW	171
	172	extern int vfio_pci_set_power_state(struct vfio_pci_device *vdev,
	173	pci_power_t state);
	174
5846ff54	175	#ifdef CONFIG_VFIO_PCI_IGD
f572a960	176	extern int vfio_pci_igd_init(struct vfio_pci_device *vdev);
5846ff54	177	#else
f572a960	178	static inline int vfio_pci_igd_init(struct vfio_pci_device *vdev)
5846ff54 AW	179	{
	180	return -ENODEV;
	181	}
	182	#endif
7f928917 AK	183	#ifdef CONFIG_VFIO_PCI_NVLINK2
	184	extern int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev);
	185	extern int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev);
	186	#else
	187	static inline int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev)
	188	{
	189	return -ENODEV;
	190	}
	191
	192	static inline int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev)
	193	{
	194	return -ENODEV;
	195	}
	196	#endif
89e1f7d4	197	#endif /* VFIO_PCI_PRIVATE_H */